Micronas VDP3132Y, VDP3131Y Datasheet

VDP 313xY

Video Processor Family

Edition August 15, 2000
6251-519-1AI

ADVANCE INFORMATION

MICRONAS

MICRONAS

VDP 313xY ADVANCE INFORMATION

Contents
Page Section Title
5 1. Introduction

5 1.1. Features
5 1.2. System Architecture
6 1.3. Video Processor Family

7 2. Functional Description

7 2.1. Introduction
7 2.2. Video Front End
7 2.2.1. Input Selection
7 2.2.2. Clamping
7 2.2.3. Automatic Gain Control
7 2.2.4. Analog-to-Digital Converters
7 2.2.5. Digitally Controlled Clock Oscillator
8 2.3. Adaptive Comb Filter
9 2.4. Color Decoder
9 2.4.1. IF-Compensation
10 2.4.2. Demodulator
10 2.4.3. Chrominance Filter
10 2.4.4. Frequency Demodulator
10 2.4.5. Burst Detection / Saturation Control
10 2.4.6. Color Killer Operation
11 2.4.7. Automatic standard recognition
11 2.4.8. PAL Compensation/1-H Comb Filter
12 2.4.9. Luminance Notch Filter
12 2.4.10. Skew Filtering
13 2.5. Horizontal Scaler
13 2.6. Blackline Detector
13 2.7. Test Pattern Generator
14 2.8. Video Sync Processing
14 2.9. Macrovision detection
15 2.10. Display Part
15 2.10.1. Luminance Contrast Adjustment
15 2.10.2. Black Level Expander
16 2.10.3. Dynamic Peaking
17 2.10.4. Digital Brightness Adjustment
17 2.10.5. Soft Limiter
17 2.10.6. Chrominance Interpolation
18 2.10.7. Chrominance Transient Improvement
18 2.10.8. Inverse Matrix
18 2.10.9. RGB Processing
18 2.10.10. Picture Frame Generator
19 2.10.11. Priority Decoder
19 2.10.12. Scan Velocity Modulation
19 2.10.13. Display Phase Shifter
21 2.11. Video Back End
21 2.11.1. CRT Measurement and Control
22 2.11.2. SCART Output Signal

2 Micronas

ADVANCE INFORMATION

Contents, continued
Page Section Title

23 2.11.3. Average Beam Current Limiter
23 2.11.4. Analog RGB Insertion
24 2.11.5. Fast Blank Monitor
24 2.11.6. Half Contrast Control
24 2.11.7. IO Port Expander
26 2.12. Synchronization and Deflection
26 2.12.1. Deflection Processi ng
27 2.12.2. Angle & Bow Correction
27 2.12.3. Horizontal Phase Adjustment
27 2.12.4. Vertical and East/West Deflection
28 2.12.5. EHT Compensation
28 2.12.6. Protection Circuitry
28 2.13. Reset and Power On
29 2.14. Serial Interface
29 2.14.1. I
30 2.14.2. Control and Status Registers
48 2.14.2.1. Scaler Adjustment
51 2.14.2.2. Calculation of Vertical and East-West Deflection Coefficients

2

C-Bus Interface

VDP 313xY

52 3. Specifications

52 3.1. Outline Dimensions
52 3.2. Pin Connections and Short Descriptions
55 3.3. Pin Descriptions
56 3.4. Pin Configuration
57 3.5. Pin Circuits
59 3.6. Electrical Characteristics
59 3.6.1. Absolute Maximum Ratings
59 3.6.2. Recommended Operating Conditions
60 3.6.2.1. Analog Input and Output Recommendations
61 3.6.3. Recommended Crystal Characteristics
62 3.6.4. Characteristics
62 3.6.4.1. General Characteristic s

2

62 3.6.4.2. I
62 3.6.4.3. Reset Input
63 3.6.4.4. Power-up Sequence
64 3.6.4.5. Test Input
64 3.6.4.6. Analog Video Front-End and A/D Converters
66 3.6.4.7. Horizontal Flyback Input
66 3.6.4.8. Horizontal Drive Output
66 3.6.4.9. Vertical Protection Input
66 3.6.4.10. Vertical Safety Input
67 3.6.4.11. Vertical and East/West D/A Converter Output
67 3.6.4.12. Combined Sync, Vertical Sync, Interlace and Front Sync Output
67 3.6.4.13. CLK20 Output
67 3.6.4.14. Sense A/D Converter Input
67 3.6.4.15. Range Switch Output
68 3.6.4.16. Scan Velocity Modulation Output

C Bus Interface

Micronas 3

VDP 313xY ADVANCE INFORMATION

Contents, continued
Page Section Title

68 3.6.4.17. D/A Converter Reference
69 3.6.4.18. Analog RGB and FB Inputs
70 3.6.4.19. Half Contrast Switch Input
70 3.6.4.20. Analog RGB Outputs, D/A Converters
73 3.6.4.21. IO Ports

74 4. Application Circuit

76 5. Data Sheet History

4 Micronas

ADVANCE INFORMATION VDP 313xY

Video Processor Family

1. Introduction

The VDP 313xY is a video IC family of high-quality sin­gle-chip video processor s. Modular design a nd a sub­micron technology allow the economic integration of
features in all classes of TV sets. The VDP 313xY fam­ily is based on the VDP 31xxB including YC

RCB

inputs

for DVD component signals.
The main features of the VDP 3130Y are

1.1. Features
Video Decoding and Processing

– four CVBS, one S-VHS input,

one YC

component input

RCB

– integrated high-quality A/D converters and associ-

ated clamp and AGC circuits
– adaptive 2H comb filter Y/C separator
– multistandard color decoder PAL/NTSC/SECAM

including all substandards

– black-level expander
– dynamic peaking
– soft limiter (gamma correction)
– color transient improvement

RGB Processing and Deflection

– programmable RGB matrix
– two analog RGB / Fastblank inputs
– half-contrast switch
– picture frame generator
– scan velocity modulation output
– high-performance H/V deflection
– separate ADC for tube measurements
– EHT compensation
– angle and bow correction
– one 20.25 MHz crystal, few external components

2

–I

C-Bus Interface

– 64-pin PSDIP package

– multistandard sync decoder
– automatic standard recognition
– black-line detector
– linear horizontal scaling (0.25...4), as well as nonlin-

ear horizontal scaling “Panoramavision”

CIN1
CIN2/CRIN
CBIN

VIN1
VIN2
VIN3
VIN4
VOUT

20.25 MHz

Analog
Frontend

AGC,
2×8bit ADC

Clock Gen.
DCO

2H
Adaptive
Combfilter

2

I

C

Color
Decoder

NTSC,
PAL,
SECAM

1.2. System Architecture

Fig. 1–1 shows the block diagram of the video proces­sor

Horizontal
Scaler

Panorama
Mode

Sync and Deflection

Display
Processor

RGB Matrix,
CLUT,
Scan Veloc.

Analog
Backend

3×10 bit DAC,
Tube Control,
RGB Switch

Measurement
ADC

SVM

RGB/FB IN1
RGB/FB IN2
Half Contrast

RGB OUT

2

C

I

H/V/EW

Sense

Fig. 1–1: Block diagram of the VDP 313xY

Micronas 5

VDP 313xY ADVANCE INFORMATION

1.3. Video Processor Family

Each member of the family contains the entire vide o,
display, and deflection processing for 4:3 and 16:9, 50/
60 Hz TV sets. Its performanc e and flexibility allow the
user to standardize his product development. Hard­ware and software applications can profit from the
modularity, as well as manufacturing, systems suppor t
or maintenance. An overview of the VDP 313xY vide o

processor family is shown in Fig. 1–2.

VDP 313xY

Family

1H Combfilter

Horizontal Scaler

2H adapt. Comb

Color Trans. Impr.

Scan Vel. Mod.

The new VDP 313xY family is th e next generation of
Video and Deflection Processors. The main differ­ences towards the VDP 31xxB family are

–YC
– angle and bow correction
– automatic standard recognition
– detection of Macrovision signals
– no dig. RGB interface for TPU 3050
– no stand-by input mode and CLK5 output
– minor changes of pinout

RGB Insertion

Prog. RGB Matrix

component input

RCB

Tube Control

VDP 3134Y
VDP 3133Y
VDP 3132Y
VDP 3131Y
VDP 3130Y

Fig. 1–2: VDP 313xY family overview

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6 Micronas

ADVANCE INFORMATION VDP 313xY

2. Functional Description

2.1. Introduction

The VDP 313xY includes compl ete video, display and
deflection proces sing. All processing is d one digitally,
the video fronten d and video backend are interfacing
to the analog wor ld. M ost funct ions of the V DP c an be
controlled by software via I

2

C-Bus interface (see

Section 2.14.1. on page 29).

2.2. Video Front End

This block provides the analog int erfaces to all video
inputs and mainly car ries out analog- to-digital conver­sion for the following digital vid eo processing. A block

diagram is given in Fig. 2–1.
Most of the functional blocks in the front-end are digi-

tally control led (clamping, AGC, and clock-DCO). T he
control loops are closed by the Fast Processor (FP)
embedded in the video decoder.

2.2.1. Input Selection

rent sources. The clampi ng level is the back porch of
the video signal.

S-VHS chrominan ce is also AC coupled. T he inp ut pin
is internally biased to the center of the ADC input
range.

The chrominance inputs for YC

need to be AC

RCB

coupled using clamping capacitors. It is strongly rec­ommended to use 5 MHz anti-a lias low-pass filters on
each input. Each c hannel is sampled at 10.125 MHz
with a resolution of 8 bit and a clamping level of 128.

2.2.3. Automatic Gain Control

A digitally worki ng automatic gain control adjusts the
magnitude of the s elected baseband by +6/–4.5 dB in
64 logarithmi c steps to the o ptimal range of the AD C.
The gain of the video inp ut stage inclu ding the ADC i s
213 steps/V with the AGC set to 0 dB.

The gain of the c hrominan ce path in the YC
is fix and adapted to a nominal amplitude of 0.7 V

RCB

mode

pp

However, if an overflow of the ADC occurs an
extended signal range of 1 V

can be selected.

pp

.

Up to seven analog inputs can be connected. Four
inputs are for input of composite video or S- VHS lumi­nance signal. These inputs are clamped to the sync
back porch and are am plified by a vari able gain a mpli­fier. Two inputs are for connection of S-VHS car­rier-chrominance signal. These inputs are internally
biased and have a fixed gain amplifier. For analog
YC

signals (e.g. from DVD players) the selected

RCB

luminance input is used together with CBIN and CRIN.

2.2.2. Clamping

The composite v ideo input signals a re AC coupled to
the IC. The clamping voltage is stored o n the coup ling
capacitors and is gen erated by digitally control led cur-

CVBS/Y
CVBS/Y
CVBS/Y
CVBS/Y
Chroma
Chroma

VIN1
VIN2
VIN3
VIN4
CIN1
CIN2

CRIN

input

clamp

mux

bias ADC

AGC

+6/–4.5 dB

gain

mux

clamp

Chroma

CBIN

Fig. 2–1: Video front-end

2.2.4. Analog-to-Digital Converters

Two ADCs are provided to digitize the input signals.
Each converter runs with 20.25 MHz and has 8 bit res­olution. An integrated bandgap circuit generates the
required reference voltages for the converters. The two
ADCs are of a 2-stage subranging type.

2.2.5. Digitally Controlled Clock Oscillator

The clock generation i s also a p art of the an alog front
end. The crys tal oscillator is controll ed digitally by the
control processor. The clock frequency can be
adjusted wit hin ±150 ppm.

ADC

digital CVBS or Luma

digital Chroma

system clocks

reference
generation

DVCO

±150
ppm

frequency

20.25 MHz

Micronas 7

VDP 313xY ADVANCE INFORMATION

2.3. Adaptive Comb Filter

The adaptive comb filter is used for high-quality lumi­nance/chrominance separation for PAL or NTSC sig­nals. The comb filter improves the luminance resolu­tion (bandwidth) and reduces interferences like
cross-luminance and cross-color artifacts. The adap­tive algorithm can eliminate most of the mentioned
errors without introducing new artifacts or noise.

A block diagram of the comb filter is shown in Fig. 2–1.
The filter uses two line delays to process the infor ma­tion of three adjacent video lines. To have a fixed
phase relationship of the color subcarri er in the three
channels, the syst em clock (20.25 MHz) i s fractionally
locked to the color subcarrie r. This allows the proc es s­ing of all color standards and substandards using a
single crystal frequency.

The CVBS signal in the three channels is filtered at the
subcarrier frequency by a set of bandpass /notch fil­ters. The output of the three c hannels is used by the
adaption logic to select the weighting that is used to
reconstruct the luminance/chrominance signal from
the 4 bandpass/notc h filter signals. By using sof t mix­ing of the 4 signals switching ar tifacts of the adaption
algorithm are completely suppressed.

The comb filter uses the middle line as reference,
therefore, the comb filter delay is one line. If the comb
filter is switched off, the delay lines are used to pass
the luminance/ chromina nce signal s from the A/D con­verters to the lumin ance/ chrominance outputs. Thus,
the comb filter delay is always one line.

Various parameters of the comb filter are adjustable,
hence giving to the user the a bility to adjust his own
desired picture quality.

Two parame ters (KY, KC) set the glo bal gain of lumi­nance and chrominance comb separately; these val­ues directly weigh the adaption algorithm output. In
this way, it is possible to obtain a luminance/chromi­nance separation ranging from standard notch/band­pass to full comb decoding.

The parameter KB allows to choo se between the two
proposed comb b ooster mo des. This so-called feature
widely improves vertical high to l ow frequency transi­tions areas, the typical example being a multiburst to
dc change. For KB = 0, this improvement is kept mod­erate, whereas, in case of KB = 1, it is maximum, but
the risk to increase the “hanging dots” amount for
some given color transitions is higher.

Using the default setting, the comb filte r has separate
luminance and chrom inance decision algorithms; it is
however possible to switch the chrominance comb fac­tor to the current luminance ad aption output by settin g
CC to 1.

Another interestin g feature is the programmable limita­tion of the luminanc e comb amount; proper lim itation,
associated to adequate lum inance peaking, gives rise
to an enhanced 2-D r esolutio n homogene ity. This limi­tation is set by the parameter CLIM, ranging from 0 (no
limitation) to 31 (max. limitation).

The DAA parameter (1:off, 0:on) is used to disable/
enable a very effic ient built-in “ rain effect” suppres sor;
many comb filters show this side effect which gives
some vertical correlation to a 2-D uniform random
area, due to the ver tical filtering. This unna tural-look­ing phenomenon is mostly visible on tuner images,
since they are always corrupted by some noise; and
this looks like rain.

Bandpass
Filter

CVBS Input

Bandpass/

1H Delay Line

1H Delay Line

Chroma Input

Fig. 2–1: Block diagram of the adaptive comb filter (PAL mode)

8 Micronas

Notch
Filter

Bandpass
Filter

Luma / Chroma Mixers

Adaption Logic

Luma Output

Chroma Output

ADVANCE INFORMATION VDP 313xY

2.4. Color Decoder

In this block, the standard luminance/chrominance
(luma/chroma) separation and multistandard color
demodulation is carried out. The color demodulation
uses an asynchronous clock, thus allowing a unified
architecture for all color standards.

A block diagram of the color decoder is shown in

Fig. 2–3. The luminance as well as the chrominance
processing, is shown here. The color decoder provides
also some special modes, e.g. wide band chrominance
format which is intended for S-VHS wide bandwidth
chrominance.

If the adaptive comb filter is used for luminance/
chrominance separation, the color decoder uses the
S-VHS mode processing. The output of the color
decoder is YC

in a 4:2:2 format.

RCB

2.4.1. IF-Compensation

With off-air or mistuned rec eption, any attenuation at
higher frequencies or asymmetry around the color
subcarrier is compensated. Four different settings of
the IF-compensation are possible:

– flat (no c ompensation)
–6dB/octave
–12dB/octave
–10dB/MHz

The last setting gives a very large boost to high fre­quencies. It is provided for SECAM signals that are
decoded using a S AW filter specified originally for the
PAL standard.

Luma / CVBS

Chroma

Fig. 2–2: Frequency response of chrominance IF-com­pensation

Notch
Filter

MUXMUX

1 H Delay

CrossSwitch

Luma

Chroma

ACC

IF Compensation

Mixer

DC-Reject

Lowpass Filter
Phase/Freq
Demodulator

ColorPLL/ColorACC

Fig. 2–3: Color decoder

Micronas 9

VDP 313xY ADVANCE INFORMATION

PAL/NTSC

SECAM

2.4.2. Demodulator

The entire signal ( which might s till contain luminance)
is now quadrature-mixed to the base band. The mixin g
frequency is equal to the subcarrier for PAL and NTSC,
thus achieving the chrominance demodulation. For
SECAM, the mixing frequency is 4.286 MHz giv ing the
quadrature baseband components of the FM modu­lated chrominance. After the mixer, a lowpass filter
selects the chrominance components; a downsam­pling stage converts the color difference signals to a
multiplexed half rate data stream.

The subcarrier frequency in the de modulator is gener­ated by direct digital synthesis; therefore, substan­dards such as PAL 3.58 or NTSC 4.43 can also be
demodulated.

2.4.3. Chrominance Filter

The demodulation is followed by a lowpass filter for the
color difference signals for PAL/NTSC. SECAM
requires a modified lowpass function with bell-filter
characteristic. At the output of the lowpass filter, all
luminance information is eliminated.

The lowpass filters are calcul ated in time mul tiplex for
the two color signa ls. Three bandwidth settings ( nar­row, normal, broad) are available for each standard.
For PAL/NTSC, a wide band chrominanc e filter can be
selected. This filter is intended for high bandwidth
chrominance signals, e.g. a nonstandard wide band­width S-VHS signal.

2.4.4. Frequency Demodulator

The frequency demodulator for demodulating the
SECAM signal is implemented as a CORDIC-struc­ture. It calculates the phase and magnitude of the
quadrature components by coordinate rotation.

The phase output of the C ORDIC processor is differ­entiated to obtain the demodulated frequency. After
the deemphasis filter, the Dr and Db signals are scaled
to standard C
over-switch.

2.4.5. Burst Detection / Saturation Control

In the PAL /NTSC-system the burst is the reference for
the color signal. The pha se and magnitude outputs of
the CORDIC are gated with the c olor key and used for
controlling the phas e-lock-loop (APC) of the demodu­lator and the automatic color control (ACC) in PAL/
NTSC.

The ACC has a control range of +30...−6dB.
Color saturation can be selected once for all color

standards. In PA L/NTSC i t is use d as reference for the
ACC. In SECAM the necessary gains are calculated
automatically.

For SECAM decoding, the frequency of the burst is
measured. Thus, the c urrent chrominance carri er fre­quency can be identified and is used to control the
SECAM processing. The burst measurements also
control the color killer operation; they are used for
automatic standard detection as well.

amplitudes and fed to the cross-

RCB

Fig. 2–4: Frequency response of chrominance filters

2.4.6. Color Killer Operation

The color killer us es the burst-phase/ burst-frequency
measurement to identify a PAL/NTSC or SECAM color
signal. For PAL /NTSC, the color i s switched off (killed)
as long as the color subcarrier PLL is not l ocked. For
SECAM, the killer is controlled by the toggle of the
burst frequency. The burst amplitude measu rement is
used to switch-off the color if the burst amplitude is
below a programmable threshold. Thus, color will be
killed for very noisy signals. The colo r amplitude killer
has a programmable hysteresis.

10 Micronas

ADVANCE INFORMATION VDP 313xY

2.4.7. Automatic standard recognition

The burst-frequency measurement is also used for
automatic standard r ecognition (together with the s ta­tus of horizonta l and vertic al locking) thus allowing a
completely independent search of the line and color
standard of the input signal. The following standards
can be distinguished:

–PAL B,G,H,I
–NTSC M
– SECAM
–NTSC 44
–PAL M
–PAL N
–PAL 60

For a preselection of a llowed standards, the recogni­tion can be enabled/disabled via I

2

C bus for each stan-

dard separately.
If at least one standard is enabled, the VDP 313xY

checks regularly the horizontal and vertical locking of
the input signal a nd the state of the color killer. If an
error exists for several adjacent fields a new standard
search is started. Depending on the measured line
number and burst frequency the current standard is
selected.

For error handling the recognition algorithm delivers
the following status information:

– search active (busy)
– search terminated, but failed

2.4.8. PAL Compensation/1-H Comb Filt er

The color decoder us es one fully in tegrated delay line.
Only active video is stored.

The delay line application depe nds on the color stan­dard:

– NTSC: 1-H comb filter or color compensation
– PAL: color compensatio n
– SECAM: crossover-switch

In the NTSC compensated mode, Fig. 2–5 c), the color
signal is averaged for two adjacent lines. Thus,
cross-color distortion and chrominance noise is
reduced. In the NTSC combfilter mode, Fig. 2–5 d), the
delay line is in the composite signal path, thus allowing
reduction of cross-color components, as well as
cross-luminance. T he loss of vertic al resolution in the
luminance channel is compen sated by addin g the ver­tical detail signal wi th removed color informa tion. If the
2-H adaptive comb filter is us ed, then the 1-H NTSC
comb filter should not be used.

CVBS

8

Notch
filter

Chroma
Process.

Y

CRC

Luma

chroma

B

8

8

Chroma
Process.

Y

C

RCB

a) conventional b) S-VHS

– found standard is disabled
– vertical standard invalid
– no color found
– standard switched

CVBS

8

Notch
filter

Chroma
Process.

1H
Delay

c) compensated

CVBS

8

1H
Delay

Notch
filter

Chroma
Process.

d) comb filter

Fig. 2–5: NTSC color decoding options

Y

CRC

Y

CRC

B

B

Micronas 11

VDP 313xY ADVANCE INFORMATION

Chroma

8

CVBS

Y

8

Luma

Y

8

CRC

B

a) conventional

b) S-VHS

C

RCB

Notch
filter

Chroma
Process.

1H
Delay

1H
Delay

Chroma
Process.

MUX

8

CVBS

Y

CRC

B

Notch
filter

Chroma
Process.

1H
Delay

2.4.9. Luminance Notch Filter

If a composite video signa l is applied, the color infor­mation is suppressed by a programmable notch filter.
The position of the filter center fr equency depends on
the subcarrier fr equency for PAL/NTSC. For SECAM,
the notch is directly controlled by the chrominance car­rier frequency. This considerably reduces the
cross-luminance. The frequency responses for all

three systems are shown in Fig. 2–8.

dB

10

0

–10

Fig. 2–6: PAL color decoding options

–20

–30

Fig. 2–7: SECAM color decoding

–40

024 68 10

MHz

PAL/NTSC notch filter

dB

10

0

–10

–20

–30

–40

024 68 10

MHz

SECAM notch filter

Fig. 2–8: Frequency responses of the luminance
notch filter for PAL, NTSC, SECAM

2.4.10.Skew Filtering

The system clock is fre e-r unnin g and not locked to the
TV line frequency. Therefore, the ADC sampling pat­tern is not orthogonal. The decoded YC

RCB

signals
are converted to an or thogo nal samplin g raster by the
skew filters, which are part of the scaler block.

The skew filters allow the applicati on of a group delay
to the input signals without introducing waveform or
frequency response distortion.

12 Micronas

The amount of ph ase shift of th is filter is controlled by
the horizontal PLL1. The ac curacy of the filter s is 1/32
clocks for luminance and 1 /4 clocks for chrominance.
Thus the 4:2:2 YC

data is in an o rthogonal pixel

RCB

format even in the case of nonstandard input signals
such as VCR.

ADVANCE INFORMATION VDP 313xY

2.5. Horizontal Scaler

The 4:2:2 YC

signal from the co lo r dec od er i s pro-

RCB

cessed by the horizontal scaler. The scaler block
allows a linear or nonlinear horizontal scaling of the
input video signal in the range of 0.25 to 4. Non linear
scaling, also ca lled panorama vision, p rovides a geo­metrical distortion of the inpu t pi c tur e. It i s us ed to fit a
picture with 4:3 format on a 16 :9 screen by stretching
the picture geometr y at the borders. Also, the inverse
effect can be produced by the scaler. A summary of

scaler modes is given in Table 2–1.
The scaler contains a programmable decimation filter,

a 1-line FIFO memor y, and a programmable interpola­tion filter. The scaler inpu t filter is also used for pixel
skew correction (see Section 2.4.1 0. on pag e 12). The
decimator/inter polator structure allows optimal use of
the FIFO memory. The controlling of the scaler is done
by the internal Fast Processor.

2.6. Blackline Detector

In case of a letterbox format input video, e.g. Cinemas­cope, PAL+ etc., black areas at the upper and lower
part of the picture are visible. It is suitable to remove or
reduce these areas by a vertical zoom and/or shift
operation.

The VDP 313xY supports this feature by a letterbox
detector. The circuitry detects black video lines by
measuring the signal amplitude during active video.
For every field the number of black lines a t the upper
and lower part of the pi cture are me asured, c ompared
to the previous measurement and the minima are
stored in the I

2

C-register BLKLIN. To adjust the picture
amplitude, the external controller reads this register,
calculates the ver tical sca ling coefficient and transfers
the new settings, e.g. vertical sawtooth parameters,
horizontal scaling coefficient etc., to the VDP 313xY.

Letterbox signals con taining logos on the left o r right
side of the black areas are processed as black lines,
while subtitles, inserted in the black areas, are pro­cessed as non-black lines. The refore the subtitles are
visible on the screen. To suppress the subtitles, the
vertical zoom coeffic ient is calculated by selecting the
larger number of black lines only. Dark vid eo scenes
with a low contrast level compared to the letterbox area
are indicated by the BLKPIC bit.

Table 2–1: Scaler modes

Mode Scale

Factor

Compression
4:3 → 16:9

Panorama
4:3 →16:9

0.75
linear

non­linear
compr

Zoom
4:3 → 4:3

Panorama
4:3 → 4:3

1.33
linear

non­linear
zoom

Description

4:3 source displayed on
a 16:9 tube,
with side panels

4:3 source displayed on
a 16:9 tube,
Borders distorted

Letterbox source (PAL+)
displayed on a 4:3 tube,
vertical overscan with
cropping of side panels

Letterbox source (PAL+)
displayed on a 4:3 tube,
vertical overscan, bor­ders distorted, no crop­ping

2.7. Test Pattern Generator

The YC
where YC

outputs can be switched to a test mode

RCB

data are generated digitally in the

RCB

VDP 313xY. Test patterns include luminance/chromi­nance ramps and flat fields.

Micronas 13

VDP 313xY ADVANCE INFORMATION

2.8. Video Sync Processing

Fig. 2–9 shows a block diagram of the front-end sy nc
processing. To extract the sync information from the
video signal, a linear phase lowpass filter eliminates all
noise and video contents above 1 MHz. The sync is
separated by a slicer; the sync phase is measured. A
variable window can be selected to improve the noise
immunity of the slicer. The phase comparator mea­sures the falling edge of sync, as well as the integrated
sync pulse.

The sync phase error is filtered by a phase-locked loop
that is computed by the FP. All timing in the front-end is
derived from a counter that is par t of this PLL, and it
thus counts synchronously to the video signal.

A separate hardware block measures the signal back
porch and also allows gathering the maximum/mini­mum of the video signal. This information is processed
by the FP and used for gain control and clamping.

video
input

lowpass

1MHz

&

syncslicer

horizontal

sync

separation

clamp &

signal
meas.

phase

comparator

&

lowpass

clamping, colorkey, FIFO_write

For vertical sync sepa ration, the sliced video s ignal is
integrated. The FP uses the int egrator value to derive
vertical sync and field information.

The information extracted by the video sync pr ocess­ing is multiplexed onto the hardware fron t sync signal
(FSY) and is distributed to the rest of the video pro­cessing system.

The data for the vertical deflecti on, the sawtooth, and
the East-West correction signal is calculated by the
VDP 313xY. The data is buffered in a FIFO an d trans­ferred to the back-end by a single wire interface.

Frequency and phase characteristics of the analog
video signal are derived from PLL1. The results are fed
to the scaler unit for data interpolation and orthogonal­ization and to the clock synthesizer for line-locked
clock generation. Horizontal and vertical syncs are
latched with the line-locked clock.

PLL1

front sync
skew
vblank
field

clock
H/V syncs

counter

frontend

timing

front

sync

generator

clock

synthesizer

syncs

vertical

sync

separation

Fig. 2–9: Sync separation block diagram

2.9. Macrovision detection

Video signals from Macrovision encoded VCR tapes
are decoded without los s of pictur e qual ity. However, it
might be necessar y in some applicat ions to de tect the
presence of Macrovisi on encoded video signals. This
is possible by reading the Macrovisio n status register
(MCV_STATUS).

Macrovision encoded video signals typically have AGC
pulses and pseudo sync pulses added during VBI. The
amplitude of the AGC pulses is modulated in time. The
Macrovision detection logic measures the VBI lines
and compares the signal against thresholds.

Sawtooth
Parabola

Calculation

vertical

FIFO

The window in which the video lines are checked for
Macrovision pulses can be defined in terms of start
and stop line (e.g. 6-15 for NTSC).

serial

data

vertical
E/W
sawtooth

14 Micronas

ADVANCE INFORMATION VDP 313xY

2.10.Display Part

In the display part the conversion from digital YC

RCB

to analog RGB is carried out (see Fig. 2–17 on
page 20). In the luminance processing path, contrast
and brightness adjus tments and a variety of features,
such as black level expansion, dynamic peaking and
soft limiting, are provided. In the chrominance path, the

signals are converted to 4:4:4 format and filtered

C

RCB

by a color transient improvement circuit. The YC

RCB

signals are converted by a programmable matrix to
RGB color space.

The display processor can switch between two sepa­rate control settings (main/side) for contrast,brightness
and matrix coefficients.

2.10.1.Luminance Contrast Adjustment

The contrast of t he luminance sign al can be adjust ed
by multiplication with a 6-bit contrast value. The con­trast value corresponds to a gain factor from 0 to 2,
where the value 32 is equivalent to a gain of 1.

2.10.2.Black Level Expander

The black level expander enhances the cont rast of t he
picture. Therefore the luminance signal is modified
with an adjustable, non-linear function. Da rk areas of

the picture are changed to black, while bright areas
remain unchanged. T he advantage of this black level
expander is that the black expansion is performed only
if it will be most noticeable to the viewer.

The black level expander works adaptively. Depending
on the measured am plitu des L

min

and L

of the low-

max

pass-filtered lumina nce (during a programmalbe verti­cal window) and an adjustable coefficient BTLT, a ti lt
point L

is established by

t

L

= L

t

+ BTLT×(L

min

max

− L

min

).

Above this value there is no expansion, while all lumi­nance values below this point are expanded according
to:

= Lin + BAM ×

L

out

A second threshold, L

(L

− Lt)

in

, can be programmed, above

tr

which there is no expansion. The characteristics of the
black level expander are shown in Fig. 2–10and
Fig. 2–11.

The tilt point L

is a function of the dynami c range of

t

the video signal. Thus, the black level expansion is
only performed when the video signal has a large
dynamic range. Otherwise, the expansion to black is
zero. This allows the correction of the characteristics of
the picture tube.

L

out

L

L

max

L

tr

t

BAM

BTLT

L

min

L

BTHR

tr

L

in

Fig. 2–10: Characteristics of the black level expander

a)

b)

Fig. 2–11: Black-level-expansion
a) luminance input
b) luminance input and output

L

min

L

max

L

t

L

t

Micronas 15

VDP 313xY ADVANCE INFORMATION

2.10.3.Dynamic Peaking

Especially with dec oded composite signals and notc h
filter luminance sep aration, as input signals, it is nec­essary to imp rove the luminance frequenc y character­istics. With transparent, high-bandwidth signals, it is
sometimes desirable to soften the image.

In the VDP 313xY, the luminance response is
improved by dynamic peaking. The algorithm has been
optimized regarding step and frequency response. It
adapts to the amplitude of the high frequency part.
Small AC amplitudes are processed, while large AC
amplitudes stay nearly unmodified.

The dynamic range can be adjusted from −14 to

14 dB for small high frequency signals. Th ere is sep-

+

arate adjustment for signal overshoot and for signal
undershoot. For large signals, the dynamic range is
limited by a non-linear function that does not create
any visible alias components. The peaking can be

switched over to “softening” by inverting the peaking
term by software.

dB

20
15
10

5
0
5

−

10

−

15

−

20

−

024 6810
dB

20
15
10

5
0
5

−

10

−

15

−

20

−

024 6810

dB

20
15
10

5
0
5

−

10

−

15

−

20

−

024 6810

CF=3.2 MHz

S-VHS

MHz

CF=3.2 MHz

PAL/SECAM

MHz

CF=3.2 MHz

NTSC

MHz

The center frequency of the peaking filter is switchable
from 2.5 MHz to 3.2 MHz. For S-VHS and notch filter
color decoding, the total system frequency respon ses
for both PAL and NTSC are shown in Fig. 2–13.

Transients, produced by the dynamic peaking when
switching to the picture frame can be suppressed
optionally

dB

20
15
10

5
0

–5
–10
–15

–20

024 68 10

MHz

Fig. 2–12: Dynamic peaking freque nc y res po ns e

dB

20
15
10

5
0
5

−

10

−

15

−

20

−

024 6810

dB

20
15
10

5
0
5

−

10

−

15

−

20

−

024 6810

dB

20
15
10

5
0
5

−

10

−

15

−

20

−

024 6810

CF=2.5 MHz

MHz

CF=2.5 MHz

MHz

CF=2.5 MHz

MHz

Fig. 2–13: Total frequency response for peaking filter and S-VHS, PAL, NTSC

16 Micronas

ADVANCE INFORMATION VDP 313xY

2.10.4.Digital Brightness Adjustment

The DC-level of the luminance sig nal can be adjust ed
by adding/subtracting an 8-bit number in the lumi­nance signal path in front of the softlimiter.

After the brightness addition, the negative going sig­nals are limite d to zero. It is desirable to keep a sm all
positive offset with the signal to prevent undershoots
produced by the peaking from being cut.

2.10.5.Soft Limiter

The dynamic range o f the pr oces sed lu minan ce si gnal
must be limited to prevent the CRT from overload. An
appropriate headroom for contrast, peaking and bright­ness can be adju sted by the TV manu facturer accord­ing to the CRT characteristics. All signals above this
limit will be soft-clipped. A characteristic diagram of the

soft limiter is shown in Fig. 2–14. The to tal limiter con­sists of three parts:

1. Part 1 includes adjustable tilt point and gain. The
gain before the tilt value is 1. Above the tilt value, a
part (0...15/16) of the input signal is subtracted from
the input signal itself. Therefore the gain is adjust­able from 16/16 to 1/16, when the slope value varies
from 0 to 15. The tilt value can be adjusted from 0 to

511.

2.10.6.Chrominance Interpolation

A linear phase interpolator is used to convert the
chrominance sampling rate from 10.125 MHz (4:2:2) to

20.25 MHz (4:4:4). Al l further proc ess ing is car ried out
at the full sampling rate.

2. Part 2 has the same characteristics as part 1. The
subtracting part is also relative to the input signal,
so the total differential gain will become negative if
the sum of slope 1 and slope 2 is greater than 16
and the input signal is above the both tilt values (see
characteristics).

3. Finally, the output signal of the soft limiter will be
clipped by a hard limiter adjustable from 256 to 511.

Output

511

400

300

200

100

tilt 1 [ 0..511] tilt 2 [ 0..511]

Part 1 Part 2

slope 1
[0..15]

0
2
4

6
8

10
12

14

0
2

4

6

8

10
12

14

slope 2
[0..15]

Hard limiter

range=

256..511

Calculation Example for the
Softlimiter Input Amplitude.
(The real signal processing in
the limiter is 2 bit more than
described here)

Y Input 16..235 (ITUR)
Black Level 16 (constant)
Contrast 63
Dig. Brightness 20
BLE off
Peaking off

Limiter input signal:
(Yin-Black Level)⋅Contr./32 + Brightn.
(235-16) ⋅ 63/32 + 20 = 451

0

0 100 200 300 400 500 600 700 800 900 1023

Limiter Input

Fig. 2–14: Characteristic of soft limiter a and b and hard limiter

Micronas 17

VDP 313xY ADVANCE INFORMATION

a) CRCB input of DTI
b) C

RCB

input + Correction signal

c) sharpened and limited C

RCB

t

t

t

C

R

in

C

B

in

a)

b)
Ampl.

C

R

out

C

B

out

c)

2.10.7.Chrominance Transient Improvement

The intention of this block is to enhance the chromi­nance resolution . A correction signal is calculate d by
differentiation of the color difference signals. The differ­entiation can be selected according to the signal band­width, e.g. for PAL/NTSC/SECAM or digital component
signals, respectively. The amplitude of the correction
signal is adjustable. Smal l no is e amp li tude s in the cor­rection signal are suppressed by an adjustable c oring

circuit. To eliminate ‘wrong colors’, which are caused
by over and undershoots at the chrominance transi­tion, the sharpened chromina nc e si gna ls a re lim ite d t o
a proper value automatically.

L

2.10.8.Inverse Matrix

A 6-multiplier matrix transcodes the C

and CB signals

R

to R-Y, B-Y, and G-Y. Th e multipliers are also used to
adjust color saturation in the range of 0 to 2. Th e c oef­ficients are signe d and have a resolut ion of 9 b its. The
matrix computes:

−Y = MR1

R
G−Y = MG1×CB+MG2×C
B−Y = MB1×CB+MB2×C

CB+MR2×C

×

R

R

R

The initialization values for the matrix are computed
from the standard ITUR (CCIR) matrix:

1
1
1

0

−0.345

1.773

R
G

=

B

1.402

−0.713
0

Y
C

B

C

R

For a contrast setting of CTM+32, the matrix values

are scaled by a factor of 64 (see Table 2–5 on
page 32).

2.10.9.RGB Processing

Fig. 2–15: Digital Color Transient Improvement

After adding the post-pr ocessed lumina nce, the digital
RGB signals are limited to 10 bits. Three multipliers
are used to digi tally adjust the whitedrive. An average
beam current limiter using the same multipliers is
implemented (see Section 2.11.1. on page 21).

2.10.10.Picture Frame Generator

When the picture do es not fill the total s creen (height
or width too small ) it is surrounded with black areas.
These areas (and more) can be colored with the pic­ture frame generator. This is done by switching over
the RGB signal from the mat rix to the signal from th e
internal picture frame generator.

The width of each area (left, right, upper, lower) can be
adjusted separately. The generator starts on the right,
respectively lower side of the sc reen and stops on the
left, respectively upper side of the screen. This means,
it runs during ho rizontal, respectively vertical flyback.
The color of the compl ete border can be programme d
in the format 3×4 bit RGB. The contrast can be
adjusted separately.

18 Micronas

ADVANCE INFORMATION VDP 313xY

2.10.11.Priority Decoder

The priority decoder selects between the sources
video, picture frame and analog RGB (OSD). The pi c­ture frame and the OSD can be enabled indepen­dantly. The priority between pictu re frame and OSD is
selectable. The video source always has the lowest
priority. At the transitions between video and the pic­ture frame the peaking transien ts can be suppressed
optionally.

For the video source the black level expander can be
activated and a fast switch between 2 settings (main/
side) for contrast, brigh tne ss an d matr ix values is po s­sible.

2.10.12.Scan Velocity Modulation

The RGB input signal of the SVM is converted to Y in a
simple matrix. The n the Y signal is differentiated by a
filter of the transfer function 1−Z

N

−

, where N is pro­grammable from 1 to 6. With a coring, some noi se c an
be suppressed. Thi s is followed by a gain adjustment
and an adjustable limite r. The analog output signa l is
generated by an 8-bit D/A converter.

The signal delay can be adjusted by ±3.5 clocks in
half- clock steps. For the gain and filter adjustment
there are two parameter se ts. The switching between
these two sets is done with the sam e RGB switch sig­nal that is used for switching between video-RGB and

OSD-RGB for the RGB outputs (see Fig. 2–16).

2.10.13.Display Phase Shifter

A phase shifter is used to partially compensate the
phase differences between th e video source and the
flyback signal. By using the described clock system,
this phase shifter works with an accuracy of ap proxi­mately 1 ns. It has a range of 1 clock per iod which is
equivalent to ±24.7 ns at 20.25 MHz. The large
amount of phase shif t (full clock peri ods) is realized in
the front-end circuit.

RGB

Matrix and
Shaping
Modulation
Notch

N1 N2

Differen­tiator

Nx

−

1−Z

Coring Gain1 Gain2

Coring
adjustment

Gain
adjustment

Limit Delay

Limiter

Delay
adjustment

RGB Switch

D/A
Converter

Output

Fig. 2–16: SVM Block diagram

Micronas 19

VDP 313xY ADVANCE INFORMATION

Rout

whitedrive R

dig.

x beamcurr. lim.

CLUT,

Contrast

Shift

Phase

10

0...1 clock

whitedrive G

R

horizontal

flyback

clock

whitedrive

measurement

control

display

& clock

Picture

Frame

Generator

luma insert

for CRTmeasurement

Gout

dig.

10

Shift

Phase

0...1 clock

x beamcurr. lim.

G

whitedrive B

Bout

dig.

x beamcurr. lim.

Shift

Phase

10

0...1 clock

SVMout

Scan

Velocity

Modulation

B

Y

brightness

contrast

softlimiter

+ offset

prio

peaking

dynamic

R’

Matrix

DTI

(Cr)

R

C

G’

Matrix

DTI

(Cb)

B

C

B’

Matrix

side picture

main picture

select

coefficients

Matrix

saturation

prio

dig.

level

black

expander

for CRTmeasurement

blanking

8

5

Y in

dig. OSD in

8

dig.

in
C
C

4:4:4

Interpol

B
R

PRIO

decoder

Fig. 2–17: Digital back-end

20 Micronas

ADVANCE INFORMATION VDP 313xY

2.11.Video Back End

The digital RGB signals are converted to analog RGBs
using three video digital to analog converters (DAC)
with 10-bit resolution. An analog brightness value is
provided by three additional DACs. The adjustment
range is 40 % of the full RGB range.

Controlling the whitedr ive/analog brightness and also
the external contrast and brightness adjustments is
done via the Fast Processor, located in the front-end.
Control of the cutoff DACs is via I

2

C-bus registers.

Finally cutoff and blanking values are added to the
RGB signals. Cutoff (dark c urre nt) is pr ovided by three
9-bit DACs. The adjustment range is 60 % of full scale
RGB range.

The analog RGB-ou tputs are current outputs with cu r­rent-sink character istics. The maximum current drawn
by the output stage is obtained with peak white RGB.
An external half con trast s igna l ca n be used to reduce
the output current of the RGB outputs to 50 %.

2.11.1.CRT Measurement and Control

The display processor is equipped with an 8-bit
PDM-ADC for all measuring purposes. The ADC is
connected to the sense inp ut pin, the input range is 0
to 1.5 V. The bandwidth of the PDM filter can be
selected; it is 40/80 kHz for small/large bandwidth se t­ting. The input impedance is more than 1 MΩ.

Cutoff and whitedrive current measurement are carried
out during the ver tical blanking interval. They always
use the small bandwidth setting. Th e current rang e for
the cutoff measure ment is set by connecting a sense
resistor to the MADC input. For the whitedrive mea­surement, the range is set by using another sense
resistor and the range select switch 2 output pin
(RSW2). During the active picture, the minimum and
maximum beam current is measured. The measure­ment range can be set by using the range select switch

1 pin (RSW1) as shown in Fig. 2–1 and Fig. 2–18. The
timing window of this mea surement is programmable.
The intention is to autom atica lly dete ct le tterbox trans­mission or to measure the actual beam current. All
control loops are closed via the external control micro­processor.

beam current

A

SENSE

D

MADC

RSW1

RSW2

R2

R3

R1

CR + IBRM + WDRV⋅WDR
CR + IBRM

black
ultra black

active measure­ment resistor

PICTURE MEAS.

Lines

R1||R2||R3

RSW1=on, RSW2=on

PMSO

Fig. 2–18: MADC Measurement Timing

CG + IBRM

CB + IBRM

Fig. 2–1: MADC Range Switches

cutoff

R

cutoff

G

cutoff

B

R1

TUBE MEASUREMENT

white
drive

R

R1||R3 R1||R2||R3

RSW2

=on

RSW1=on, RSW2=on

PICTURE MEAS.

PMSTTML

R

G

B

Micronas 21

VDP 313xY ADVANCE INFORMATION

In each field two sets of measurements can be taken:
a) The picture tube measurement returns results for

– cutoff R
– cutoff G
– cutoff B
– whitedrive R or G or B (sequentially)

b) The picture measurement returns data on
– active picture maximum current
– active picture minimum current

The tube measurement is auto matically started when
the cutoff blue result regis ter is read . Cutoff cont rol for
RGB requires one field only while a complete whit­edrive control requires three fields. If the measurement
mode is set to ‘o ffset check’, a measurement cycle is
run with the cutoff/whitedr ive signals set to zero. This
allows to compensate t he MADC offset as well as the
input the leakage currents. During cutoff and whit­edrive measurements, the average beam current lim­iter function (see Section 2.11.3. on page 23) is
switched off and a programmable value is use d for the
brightness set ting. The sta r t line of the tube m easure­ment can be programmed via I

2

C-bus, the first line
used for the measurement, i .e. measurement o f cutoff
red, is 2 lines after the programmed start line.

The picture measurement must be enabled by the con­trol microprocess or after reading the min./max. resul t
registers. If a ‘1’ is writt en into bit 2 in subaddr ess 25,
the measurement r uns for one fiel d. For the next mea­surement a ‘1’ has to be writte n again. The measure­ment is always started at the beginning of active video.

2.11.2.SCART Output Signal

The RGB output of the VDP 313xY can also be used
to drive a SCART output. In the case of the SCART
signal, the parameter CLMPR (clamping reference)
has to be set to 1. Then, during blanking, the RGB out­puts are automatically set to 50 % of the maximum
brightness. The DC offse t values ca n be adjus ted wi th
the cutoff parameters C

, CG, and CB. The amplitudes

R

can be adjusted with the drive parameters WDR,
WDG, and WDB.

tube measurement
picture meas. start

active video
field 1/ 2

picture meas. end

small window for tube
measurement (cutoff, whitedrive)

large window for active picture

picture meas. start

Fig. 2–19: Windows for tube and picture measure­ments

The vertical t iming for the pictu re mea suremen t is pro­grammable, and may even be a single line. Also the
signal bandwidth is switchable for the picture measure­ment.

Two horizontal windows are available for the picture
measurement. The large window is active for the entire
active line. Tube measurement is always carried out
with the small window. Measurement windows for pic­ture and tube measurement are shown in Fig. 2–19.

22 Micronas

ADVANCE INFORMATION VDP 313xY

2.11.3.Average Beam Current Limiter

The average beam current limiter (BCL) uses the
sense input for the beam current measurement. The
BCL uses a different filter to average the beam current
during the active picture. The filter bandwidth is
approx. 2 kHz. The beam current li miter has an auto­matic offset adju stment that is active two lines before
the first cutoff measurement line.

The beam current limiter function is located in the
front-end. The data exchange between the front-end
and the back-end is done via a sing le-wire ser ial i nter­face.

The beam current limiter allows the setting of a thresh­old current. If th e b eam c ur rent is a bove the thres hol d,
the excess current is lowpass filtered and used to
attenuate the RGB output s by adjusting the wh itedr ive
multipliers for the internal (digital) RGB signals, and
the analog contrast multipliers for the analog RGB
inputs, respectively. The lower limit of the attenuator is
programmable, thus a minimum contrast can always
be set. During the tub e me as urement, the ABL attenu­ation is switched off. After the whitedrive measurement
line it takes 3 lines to switch back to BCL limited drives
and brightness.

2.11.4.Analog RGB Insertion

The VDP 313xY all ows insertion of 2 external a nalog
RGB signals. Each RGB signal is key-clamped and
inserted into the main RGB by the fast blank switch.
The selected external RGB input is virtually handled as
a priority bus signal. Thus, it can be overla id or under­laid to the digital picture. The external RGB signals can
be adjusted independently as regards DC-level (bright­ness) and magnitude (contrast).

Which analog RGB input is selected depends on the
fast blank input signals and the programming of a num­ber of I

2

C-bus register settings (see Table 2–2 and Fig.
2–21). Both fast blank inputs mus t be ei ther act ive-low
or active-high.

All signals for analog RGB inser tion (RIN1/2, GIN1/2,
BIN1/2, FBLIN1/2, HCS) must b e synchronized to the
horizontal flyback, other wise a horizontal jitter will be
visible. The VDP 313xY has no means for timing cor­rection of the analog RGB input signals.

Table 2–2: RGB Input Selection

FBFOH1=0, FBFOH2=0, FBFOL1=0, FBFOL2=0

Typical characteristics of the ABL for different loop

gains are shown in Fig. 2–20; for this example the tube
has been assumed to have square law characteristics.

Fig. 2–20: Beam current limiter characteristics:
beam current output vs. drive
BCL threshold: 1

FBLIN1 FBLIN2 FBPOL FBPRIO RGB output

000x Video
010x RGB input 2
100x RGB input 1
1100 RGB input 1
1101 RGB input 2
0010 RGB input 1
0011 RGB input 2
011x RGB input 1
101x RGB input 2
111x Video

Micronas 23