Micron MTA18ASF4G72AZ – 32GB User Manual

Primary Side

Secondary Side

U14

U13

U12

U11

U10

U9

U8

U7

U19

U18U17

U16

U15

U5

U4

U3

U2

U6

U1

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

DDR4 SDRAM UDIMM
Addendum

MTA18ASF4G72AZ – 32GB

Introduction

Introduction

Information provided here is in addition to or super­sedes information provided in the Micron DDR4
UDIMM Core data sheet.

Features

• DDR4 functionality and operations supported as
defined in the component data sheet

• 288-pin, unbuffered dual in-line memory module
(UDIMM)

• Fast data transfer rates: PC4-2666, PC4-3200

• 32GB (4 Gig x 72)

• Supports ECC error detection and correction

• Data bus inversion (DBI) for data bus

• Dual-rank

• On-board I2C temperature sensor with integrated
serial presence-detect (SPD) EEPROM

• 4 internal device bank groups with 4 banks per
group produce 16 device banks

Figure 1: 288-Pin UDIMM (MO-309, R/C-E1)

Options Marking

• Operating temperature
– Commercial

(0°C ≤ T

OPER

≤ 95°C)

• Package
– 288-pin DIMM (halogen-free) Z

• Frequency/CAS latency
– 0.625ns @ CL = 22 (DDR4-3200) -3G2
– 0.75ns @ CL= 19 (DDR4-2666) -2G6

None

Table 1: Addressing

Parameter 32GB

Row address 128K A[16:0]

Column address 1K A[9:0]

Device bank group address 4 BG[1:0]

Device bank address per group 4 BA[1:0]

Device configuration 16Gb (2 Gig x 8), 16 banks

Module rank address 2 CS_n[1:0]

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

Products and specifications discussed herein are subject to change by Micron without notice.

1

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2019 Micron Technology, Inc. All rights reserved.

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

Introduction

Table 2: Part Numbers and Timing Parameters – 32GB Modules

Base device: MT40A2G8,1 16Gb DDR4 SDRAM.

Part Number

2

Density Configuration

MTA18ASF4G72AZ-3G2__ 32GB 4 Gig x 72 25.6 GB/s 0.625ns/3200 MT/s 22-22-22

MTA18ASF4G72AZ-2G6__ 32GB 4 Gig x 72 21.3 GB/s 0.75ns/2666 MT/s 19-19-19

Module

Module

Bandwidth

Memory Clock/

Data Rate

Clock Cycles

(CL-nRCD-nRP)

Notes:

1. The data sheet for the base device can be found at micron.com.

2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions.
Consult factory for current revision codes. Example: MTA18ASF4G72AZ-3G2B1.

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

2

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2019 Micron Technology, Inc. All rights reserved.

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

Important Notes and Warnings

Important Notes and Warnings

Micron Technology, Inc. ("Micron") reserves the right to make changes to information published in this document,
including without limitation specifications and product descriptions. This document supersedes and replaces all
information supplied prior to the publication hereof. You may not rely on any information set forth in this docu­ment if you obtain the product described herein from any unauthorized distributor or other source not authorized
by Micron.

Automotive Applications. Products are not designed or intended for use in automotive applications unless specifi­cally designated by Micron as automotive-grade by their respective data sheets. Distributor and customer/distrib­utor shall assume the sole risk and liability for and shall indemnify and hold Micron harmless against all claims,
costs, damages, and expenses and reasonable attorneys' fees arising out of, directly or indirectly, any claim of
product liability, personal injury, death, or property damage resulting directly or indirectly from any use of non­automotive-grade products in automotive applications. Customer/distributor shall ensure that the terms and con­ditions of sale between customer/distributor and any customer of distributor/customer (1) state that Micron
products are not designed or intended for use in automotive applications unless specifically designated by Micron
as automotive-grade by their respective data sheets and (2) require such customer of distributor/customer to in­demnify and hold Micron harmless against all claims, costs, damages, and expenses and reasonable attorneys'
fees arising out of, directly or indirectly, any claim of product liability, personal injury, death, or property damage
resulting from any use of non-automotive-grade products in automotive applications.

Critical Applications. Products are not authorized for use in applications in which failure of the Micron compo­nent could result, directly or indirectly in death, personal injury, or severe property or environmental damage
("Critical Applications"). Customer must protect against death, personal injury, and severe property and environ­mental damage by incorporating safety design measures into customer's applications to ensure that failure of the
Micron component will not result in such harms. Should customer or distributor purchase, use, or sell any Micron
component for any critical application, customer and distributor shall indemnify and hold harmless Micron and
its subsidiaries, subcontractors, and affiliates and the directors, officers, and employees of each against all claims,
costs, damages, and expenses and reasonable attorneys' fees arising out of, directly or indirectly, any claim of
product liability, personal injury, or death arising in any way out of such critical application, whether or not Mi­cron or its subsidiaries, subcontractors, or affiliates were negligent in the design, manufacture, or warning of the
Micron product.

Customer Responsibility. Customers are responsible for the design, manufacture, and operation of their systems,
applications, and products using Micron products. ALL SEMICONDUCTOR PRODUCTS HAVE INHERENT FAIL­URE RATES AND LIMITED USEFUL LIVES. IT IS THE CUSTOMER'S SOLE RESPONSIBILITY TO DETERMINE
WHETHER THE MICRON PRODUCT IS SUITABLE AND FIT FOR THE CUSTOMER'S SYSTEM, APPLICATION, OR
PRODUCT. Customers must ensure that adequate design, manufacturing, and operating safeguards are included
in customer's applications and products to eliminate the risk that personal injury, death, or severe property or en­vironmental damages will result from failure of any semiconductor component.

Limited Warranty. In no event shall Micron be liable for any indirect, incidental, punitive, special or consequential
damages (including without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such damages are based on tort, warranty,
breach of contract or other legal theory, unless explicitly stated in a written agreement executed by Micron's duly
authorized representative.

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

3

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2019 Micron Technology, Inc. All rights reserved.

DQ Map

Table 3: Component-to-Module DQ Map

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

DQ Map

Component

Reference

Number

U1 0 3 157 U2 0 10 23

U3 0 18 34 U4 0 26 45

U5 0 CB2 56 U7 0 34 104

U8 0 42 115 U9 0 50 126

U10 0 58 137 U11 0 57 257

Component

DQ Module DQ

1 0 5 1 9 161

2 2 12 2 11 168

3 1 150 3 8 16

4 7 155 4 14 21

5 4 3 5 13 159

6 6 10 6 15 166

7 5 148 7 12 14

1 17 172 1 24 38

2 19 179 2 27 190

3 16 27 3 25 183

4 22 32 4 31 188

5 21 170 5 28 36

6 23 177 6 30 43

7 20 25 7 29 181

1 CB1 194 1 32 97

2 CB3 201 2 35 249

3 CB0 49 3 33 242

4 CB6 54 4 38 102

5 CB5 192 5 37 240

6 CB7 199 6 39 247

7 CB4 47 7 36 95

1 40 108 1 48 119

2 43 260 2 51 271

3 41 253 3 49 264

4 47 258 4 54 124

5 44 106 5 53 262

6 46 113 6 55 269

7 45 251 7 52 117

1 57 275 1 58 137

2 59 282 2 56 130

3 56 130 3 59 282

4 63 280 4 61 273

5 61 273 5 63 280

6 62 135 6 60 128

7 60 128 7 62 135

Module Pin

Number

Component

Reference

Number

Component

DQ Module DQ

Module Pin

Number

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

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Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2019 Micron Technology, Inc. All rights reserved.

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

Table 3: Component-to-Module DQ Map (Continued)

DQ Map

Component

Reference

Number

Component

DQ Module DQ

Module Pin

Number

Component

Reference

Number

Component

DQ Module DQ

U12 0 48 119 U13 0 40 108

1 50 126 1 42 115

2 49 264 2 41 253

3 51 271 3 43 260

4 53 262 4 44 106

5 54 124 5 47 258

6 52 117 6 45 251

7 55 269 7 46 113

U14 0 32 97 U15 0 CB1 194

1 34 104 1 CB2 56

2 33 242 2 CB0 49

3 35 249 3 CB3 201

4 37 240 4 CB5 192

5 38 102 5 CB6 54

6 36 95 6 CB4 47

7 39 247 7 CB7 199

U16 0 24 38 U17 0 17 172

1 26 45 1 18 34

2 25 183 2 16 27

3 27 190 3 19 179

4 28 36 4 21 170

5 31 188 5 22 32

6 29 181 6 20 25

7 30 43 7 23 177

U18 0 9 161 U19 0 0 5

1 10 23 1 3 157

2 8 16 2 1 150

3 11 168 3 2 12

4 13 159 4 4 3

5 14 21 5 7 155

6 12 14 6 5 148

7 15 166 7 6 10

Module Pin

Number

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

5

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2019 Micron Technology, Inc. All rights reserved.

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

IDD Specifications

IDD Specifications

Table 4: DDR4 IDD Specifications and Conditions – 32GB (Die Revision B)

Values are for the MT40A2G8 DDR4 SDRAM only and are computed from values specified in the 16Gb (2 Gig x 8) compo­nent data sheet.

Parameter Symbol 3200 2666 Units

One bank ACTIVATE-PRECHARGE current I

One bank ACTIVATE-PRECHARGE, wordline boost, IPP current I

One bank ACTIVATE-READ-PRECHARGE current I

Precharge standby current I

Precharge standby ODT current I

Precharge power-down current I

Precharge quite standby current I

Active standby current I

Active standby IPP current I

Active power-down current I

Burst read current I

Burst write current I

Different logic rank burst refresh current (1x REF) I

Different logic rank burst refresh IPP current (1x REF) I

Self refresh current: Normal temperature range (0°C to 85°C) I

Self refresh current: Extended temperature range (0°C to 95°C) I

Self refresh current: Reduced temperature range (0°C to 45°C) I

Auto self refresh current (25°C) I

Auto self refresh current (45°C) I

Auto self refresh current (75°C) I

Auto self refresh current (95°C) I

Auto self refresh IPP current (0°C to 95°C) I

Bank interleave read current I

Bank interleave read IPP current I

Maximum power-down current I

1

DD0

1

PP0

1

DD1

2

DD2N

1

DD2NT

2

DD2P

2

DD2Q

2

DD3N

2

PP3N

2

DD3P

1

DD4R

1

DD4W

1

DD5R

1

PP5R

DD6N (0–85°C)

DD6E (0–95°C)

DD6R (0–45°C)

DD6A (25°C)

DD6A (45°C)

DD6A (75°C)

DD6A (95°C)

2

PP6X

1

DD7

1

PP7

2

DD8

954 936 mA

63 63 mA

1053 1035 mA

936 900 mA

891 873 mA

774 774 mA

846 846 mA

1440 1404 mA

54 54 mA

1242 1224 mA

2205 2025 mA

2034 1881 mA

1098 1080 mA

72 72 mA

2

2

2

2

2

2

2

1206 1206 mA

2178 2178 mA

522 522 mA

180 180 mA

522 522 mA

1098 1098 mA

2178 2178 mA

198 198 mA

2151 2097 mA

117 117 mA

720 720 mA

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

Notes:

1. One module rank in the active I

2. All ranks in this I

DD/PP

condition.

6

, the other rank in I

DD/PP

Micron Technology, Inc. reserves the right to change products or specifications without notice.

DD2P/PP3N

.

© 2019 Micron Technology, Inc. All rights reserved.

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

U1

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U19

DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39

U7

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U14

DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

U2

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U18

DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47

U8

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U13

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

U3

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U17

DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55

U9

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U12

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

U4

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U16

DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

U10

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U11

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

U5

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

U15

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
ZQ

CS1_n
CS0_n

Rank 0: U1–U5, U7–10
Rank 1: U11–U19

Rank 0

CK0_t
CK0_c

CK1_t
CK1_c

Vref CA

Vss

DDR4 SDRAM

DDR4 SDRAM

Vdd

Vddspd

Temperature sensor/
SPD EEPROM

Vtt

DDR4 SDRAM

DDR4 SDRAM

Vpp

Clock, control, command, and address line terminations:

Rank 1

Vss

Vss

Vss

Vss

Vss

Vss

Vss

Vss

Vss

ZQ

Vss

ZQ

Vss

ZQ

Vss

ZQ

Vss

ZQ

Vss

ZQ

Vss

ZQ

Vss

ZQ

Vss

ZQ

Vss

A0

Temperature

sensor/

SPD EEPROM

A1 A2

SA0 SA1

SDA

SCL

EVT

U6

EVENT_n

SA2

Control, command, and
address termination

DDR4

SDRAM

VTT

CK_t

CK_c

DDR4

SDRAM

VDD

DM_n/ CS_n DQS_t DQS_c

DBI_n

DQS0_t
DQS0_c

DBI0_n/DM0_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DM_n/ CS_n DQS_t DQS_c

DBI_n

DQS1_t
DQS1_c

DBI1_n/DM1_n

DQS2_t

DQS2_c

DBI2_n/DM2_n

DQS3_t

DQS3_c

DBI3_n/DM3_n

DQS8_t
DQS8_c

DBI8_n/DM8_n

DQS4_t
DQS4_c

DBI4_n/DM4_n

DQS5_t
DQS5_c

DBI5_n/DM5_n

DQS6_t

DQS6_c

DBI6_n/DM6_n

DQS7_t

DQS7_c

DBI7_n/DM7_n

BA[1:0]
BG[1:0]

ACT_n

A[13:0]
RAS_n/A16
CAS_n/A15

WE_n/A14

CKE0

CKE1
ODT0
ODT1
RESET

PAR_IN

ALERT_CONN

BA[1:0]: DDR4 SDRAMs
BG[1:0]: DDR4 SDRAMs
ACT_n: DDR4 SDRAMS
A[13:0]: DDR4 SDRAMs
RAS_n/A16: DDR4 SDRAMs
CAS_n/A15: DDR4 SDRAMs
WE_n/A14: DDR4 SDRAMs
CKE0: Rank 0
CKE1: Rank 1
ODT0: Rank 0
ODT1: Rank 1
RESET_n: DDR4 SDAMS
PAR: DDR4 SDRAMs
ALERT_DRAM: DDR4 SDRAMs

CS_n[1:0], BA[1:0], BG[1:0],

ACT_n, A[13:0], RAS_n/A16,

CAS_n/A15, WE_n/A14,

CKE[1:0], ODT[1:0]

Functional Block Diagram

Figure 2: Functional Block Diagram

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

Note:

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

Functional Block Diagram

1. The ZQ ball on each DDR4 component is connected to an external 240Ω ±1% resistor
that is tied to ground. It is used for the calibration of the component’s ODT and output
driver.

7

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2019 Micron Technology, Inc. All rights reserved.

32GB (x72, ECC, DR) 288-Pin DDR4 UDIMM

Functional Block Diagram

8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: [phone]

www.micron.com/products/support Sales inquiries: 800-932-4992

Micron and the Micron logo are trademarks of Micron Technology, Inc.

All other trademarks are the property of their respective owners.

This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein.

Although considered final, these specifications are subject to change, as further product development and data characterization some-

times occur.

CCM005-341111752-10529
asf18c4gx72az.pdf – Rev. B 11/19 EN

8

Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2019 Micron Technology, Inc. All rights reserved.