The ML4903 high current synchronous buc k controller
provides high efficiency DC/DC conversion to generate
V
for processors such as the Pentium® Pro and Pentium
CCP
II from Intel
®
.
The ML4903 controller, when combined with two external
MOSFETs, generates output voltages between 1.8V and
3.5V from a 12V supply. The output voltage is selected via
an internal 2 chord 4-bit DAC. In the upper range, the
output can be set between 2.1V and 3.5V in 100mV steps.
In the lower range, the output can be set between 1.8V
and 2.05V in 50mV steps. Output currents in excess of
20A can be attained at efficiencies greater than 80%.
The ML4903 can be enabled/disabled via the SHDN pin.
While disabled, the output of the regulator is completely
isolated from the circuit’s input supply. The ML4903
employs fixed-frequency PWM control combined with a
sophisticated control loop enhancement circuit to provide
excellent load transient response.
BLOCK DIAGRAM
FEATURES
■ Designed to meet Pentium Pro and Pentium II VRM
power supply requirements
■ DC regulation to +1% maximum
■ Proprietary circuitry provides transient response of ±5%
maximum over a 0A to 14A load range
■ Programmable output voltage (1.8V to 3.5V) is set by
an onboard 2 chord 4-bit D AC
■ Synchronous buck topology for maximum power
conversion efficiency
■ Fixed frequency operation for easier system integration
■ Integrated anti-shootthrough logic, short circuit
protection, shutdown, and UV lockout
V
DD
19
V
CC
18
PROTECT
20
SHDN
6
D0
1
D1
2
D2
3
D3
4
RANGE
5
10.5V
4.4V
30µA
+
–
+
–
5V
3.5V
2 CHORD
4 BIT DAC
V
DAC
V
DAC
UVLO
+ 3%
V
- 3%
P DRV
17
CONTROL
LOGIC
+
–
V
DAC
+
–
FB
+
–
V
V
DAC
V
DAC
DAC
V
DAC
+ 10%
+ 3%
- 10%
- 3%
+
–
200kHz
–
+
+
–
+
V
FB
–
+
–
3.5V
REFERENCE
10
PWR GND
V
DAC
-107mV
PWR GOOD
GND
N DRV
COMP
V
I
SENSE
V
REF
16
15
13
FB
11
12
8
9
1
ML4903
PIN CONFIGURATION
ML4903
20-Pin TSSOP (T20)
D0
D1
D2
D3
RANGE
SHDN
NC
PWR GOOD
V
REF
GND
1
2
3
4
5
6
7
8
9
10
PIN DESCRIPTION
PINNAMEFUNCTION
1D0LSB input to the DAC which sets the
output voltage
2D1Input to the DAC which sets the
output voltage
3D2Input to the DAC which sets the
output voltage
20
19
18
17
16
15
14
13
12
11
TOP VIEW
PINNAMEFUNCTION
9V
REF
PROTECT
V
DD
V
CC
P DRV
N DRV
PWR GND
NC
COMP
I
SENSE
V
FB
Bypass connection for the internal
3.5V reference
1 0GNDAnalog signal ground
11V
12I
FB
SENSE
Output voltage feedback pin
Current sense input
4D3MSB input to the DAC which sets the
output voltage
5RANGERange selection bit for the 2 chord 4-
bit DAC. Logic 1 sets the range at
2.1V to 3.5V with an LSB of 100mV.
Logic 0 sets the range at 1.8V to
2.05V with an LSB of 50mV.
6SHDNGrounding this pin shuts down the
regulator
8PWR GOODThis open drain output goes low
whenever SHDN goes low or when
the output is not within +10% of its
nominal value
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Input Low Voltage0.8V
Input High Voltage2.0V
Delay to Output50ns
POWER GOOD COMPARATOR
Output Voltage in Regulation5kW pull-up to 5V4.8V
Output Voltage out of RegulationVFB < 90% V
Output Voltage in ShutdownSHDN = 0V, 5kW pull-up to 5V0.4V
BUCK REGULATOR
Oscillator Frequency160200230kHz
Duty Cycle RatioRANGE = 1, V
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
Note 2: Codes 00110 to 01111, and 11111 are not valid; applying these codes to the DAC will shut off P DRV and N DRV.
VCC Current110µA
CC
4
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