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FEATURING
Extended Commercial Temperature Range
–20°C to 70°C
for Portable Handheld Equipment
April 1997
ML4890
High Efficiency, Low Ripple Boost Regulator
GENERAL DESCRIPTION
The ML4890 is a high efficiency, PFM (Pulse Frequency
Modulation), boost switching regulator connected in
series with an integrated LDO (Low Dropout Regulator)
that incorporates “Silent Switcher™” technology. This
technique incorporates a patented tracking scheme to
minimize the voltage drop across the LDO and increase
the total efficiency of the regulator beyond that which can
be obtained by using a discrete external LDO regulator.
The ML4890 is designed to convert single or multiple cell
battery inputs to regulated output voltages for integrated
circuits and is ideal for portable communications
equipment that cannot tolerate the output voltage ripple
normally associated with switching regulators.
An integrated synchronous rectifier eliminates the need for
an external Schottky diode and provides a lower forward
voltage drop, resulting in higher conversion efficiency.
FEATURES
■ Incorporates “Silent Switcher™” technology to deliver
very low output voltage ripple (typically 5mV)
■ Guaranteed full load start-up and operation at 1.0V
input and low operating quiescent current (<100µA)
for extended battery life
■ Pulse Frequency Modulation and internal synchronous
rectification for high efficiency
■ Minimum external components
■ Low ON resistance internal switching MOSFETs
■ 5V, 3.3V, and 3V output versions
BLOCK DIAGRAM
*C
IN
V
BAT
FROM
POWER
MANAGEMENT
Patent Pending
7
2
SHDN
V
REF
V
IN
1
BOOST
CONTROL
GND
3
L1
5
6
V
L
FEEDBACK
V
BOOST
LDO
CONTROL
V
PWR
GND
OUT
C2
C1
+
V
OUT
–
4
8
*Optional
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ML4890
PIN CONNECTION
ML4890-5/-3/-T
8-Pin SOIC (S08)
PIN DESCRIPTION
V
GND
V
OUT
V
IN
REF
1
2
3
4
TOP VIEW
8
7
6
5
PWR GND
SHDN
V
L
V
BOOST
PIN
NO. NAME FUNCTION
1V
IN
2V
REF
Battery input voltage
200mV reference output
3 GND Analog signal ground
4V
OUT
LDO linear regulator output
PIN
NO. NAME FUNCTION
5V
BOOST
Boost regulator output for connection
of an output filter capacitor
6V
L
Boost inductor connection
7 SHDN Pulling this pin high shuts down the
regulator, isolating the load from the
input
8 PWR GND Return for the NMOS boost transistor
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ML4890
ABSOLUTE MAXIMUM RATINGS
Storage Temperature Range .................... –65°C to +150°C
Lead Temperature (Soldering 10s).......................... +260°C
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
V
Voltage on Any Other Pin ...GND –0.3V to V
Peak Switch Current (I
Average Switch Current (I
........................................................................ 7V
BOOST
) .......................................... 1A
PEAK
) ............................... 500mA
AVG
BOOST
+0.3V
LDO Output Current ............................................. 250mA
Junction Temperature .............................................. 150°C
Thermal Resistance (θ
Plastic SOIC .................................................... 110°C/W
OPERATING CONDITIONS
Temperature Range
ML4890CS-X ............................................ 0°C to +70°C
ML4890ES-X......................................... –20°C to +70°C
V
Operating Range
IN
ML4890CS-X ................................................ 1.0V to 6V
ML4890ES-X................................................. 1.1V to 6V
)
JA
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, V
PARAMETER CONDITIONS MIN TYP. MAX UNITS
Supply
VIN Current VIN = 6V 60 75 µA
V
Quiescent Current V
OUT
VL Quiescent Current 1 µA
= Operating Voltage Range, TA = Operating Temperature Range. (Note 1)
IN
SHDN = high 15 25 µA
BOOST
= V
+ 0.5V 8 10 µA
OUT
Reference
Output Voltage (V
) 0 < I
REF
< –5µA, 195 200 205 mV
PIN2
PFM Regulator
Pulse Width (TON) 4.5 5 5.5 µs
LDO
DC Output Voltage (V
) ML4890-5 V
OUT
ML4890-3 V
ML4890-T V
BOOST
BOOST
BOOST
= V
= V
= V
OUT
OUT
OUT
+ 0.5V, I
+ 0.5V, I
+ 0.5V, I
< 200mA 4.85 5.0 5.15 V
OUT
< 100mA 3.2 3.3 3.4 V
OUT
< 80mA 2.91 3.0 3.09 V
OUT
Load Regulation ML4890-5 See Figure 1
= 1.2V, I
V
IN
VIN = 2.4V, I
ML4890-3 VIN = 1.2V, I
VIN = 2.4V, I
ML4890-T VIN = 1.2V, I
VIN = 2.4V, I
< 7mA 4.85 5.0 5.15 V
OUT
< 50mA 4.85 5.0 5.15 V
OUT
< 14mA 3.2 3.3 3.4 V
OUT
< 75mA 3.2 3.3 3.4 V
OUT
< 15mA 2.91 3.0 3.09 V
OUT
< 60mA 2.91 3.0 3.09 V
OUT
Dropout Voltage ML4890-5 See Figure 1
= 1.2V, I
V
IN
VIN = 2.4V, I
ML4890-3 VIN = 1.2V, I
VIN = 2.4V, I
ML4890-T VIN = 1.2V, I
VIN = 2.4V, I
Output Ripple 5mV
< 7mA 300 mV
OUT
< 50mA 500 mV
OUT
< 14mA 300 mV
OUT
< 75mA 500 mV
OUT
< 15mA 300 mV
OUT
< 60mA 500 mV
OUT
P-P
Shutdown
SHDN Threshold 0.5 0.8 1.0 V
SHDN Bias Current –100 100 nA
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case conditions.
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ML4890
V
IN
100µF
33µH
(Sumida CD54)
ML4890
V
PWR GND
IN
1µF
V
REF
GND
V
OUT
SHDN
V
BOOST
100µF
V
L
Figure 1. Application Test Circuit
33µF
I
OUT
V
OUT
OS
+
= f (I
C2
–
LOAD
I
LOAD
4
C1
REF
R1
R2
Q3
+
A3
–
V
)
L1
6
Q2
A2
R
S
5µs
ONE SHOT
Q1
A1
5
+
–
–
+
V
Figure 2. PFM Regulator and LDO Block Diagram
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