Micro Linear Corporation ML2252BCP, ML2259CCP, ML2259BCP, ML2252CCQ, ML2252BCQ Datasheet

May 1997

ML2252*, ML2259**

µP Compatible 8-Bit A/D Converters

with 2- or 8-Channel Multiplexer

GENERAL DESCRIPTION

The ML2252 and ML2259 combine an 8-bit A/D
converter, 2- or 8-channel analog multiplexer, and a
microprocessor compatible 8-bit parallel interface and
control logic in a single monolithic CMOS device.

Easy interface to microprocessors is provided by the
latched and decoded multiplexer address inputs and a
double buffered three-state data bus. These analog-to­digital converters allow the microprocessor to operate
completely asynchronous to the converter clock.

The built in sample and hold function provides the ability
to digitize a 5V, 50kHz sinewave to 8-bit accuracy. The
differential comparator design provides low power supply
sensitivity to DC and AC variations. The voltage reference
can be externally set to any value between ground and
VCC, thus allowing a full conversion over a relatively
small span. All parameters are guaranteed over
temperature with a power supply voltage of 5V ±10%.

The device is suitable for a wide range of applications
from process and machine control to consumer,
automotive, and telecommunication applications.

ML2252 BLOCK DIAGRAM

FEATURES

■ Conversion time (f

■ Total unadjusted error; ±1/2LSB or ±1LSB

■ No missing codes

■ Sample and hold; 390ns acquisition

■ Capable of digitizing a 5V, 50kHz sinewave

■ 2- or 8-channel input multiplexer

■ 0V to 5V analog input range with single 5V

power supply

■ Operates ratiometrically or with up to 5V

voltage reference

■ No zero or full scale adjust required

■ Analog input protection; 25mA per input min

■ Continuous conversion mode

■ Low power dissipation; 15mW max

■ TTL and CMOS compatible digital inputs and outputs

* This Part Is Obsolete

** This Part Is End of Life As Of August 1, 2000

= 1.46MHz); 6.6µs

CLK

CH0

CH1

V

CC

2-CHANNEL

MULTIPLEXER

ADDRESS

LATCH

AND

DECODER

SAMPLE-AND-HOLD FUNCTION

ALE A0 GND +V

+

Σ

8pF

8pF

A/D WITH

+

COMP

–

–

CLOCK

CONTROL
& TIMING

SUCCESSIVE

APPROXIMATION

REGISTER

D/A

CONVERTER

REF

–V

REF

THREE
STATE

OUTPUT

BUFFER

OE

START

EOC

DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7

1

ML2252, ML2259

ML2259 BLOCK DIAGRAM

CH0

CH1

CH2

CH3

CH4

8-CHANNEL

MULTIPLEXER

CH5

CH6

CH7

ADDRESS

LATCH

AND

DECODER

ALE A0 A1 A2

PIN CONFIGURATION

ML2252

20-Pin DIP (P20)

V

CC

+

8pF

+

Σ

COMP

–

–

8pF

A/D WITH

SAMPLE-AND-HOLD FUNCTION

GND

CLK

CONTROL

& TIMING

SUCCESSIVE

APPROXIMATION

REGISTER

D/A

CONVERTER

+V

REF

START

EOC

DB0
DB1
DB2

THREE
STATE

OUTPUT

BUFFER

DB3

DB4
DB5
DB6
DB7

–V

REF

OE

ML2252

20-Pin PLCC (Q20)

START

CH3
CH4
CH5
CH6
CH7

START

EOC
DB3

OE
CLK
V

CC

+V

REF

GND

DB1

CH1

1

2

EOC

3

DB3

4

OE

5

CLK

6

V

7

CC

REF

DB1

8

9

10

+V

GND

TOP VIEW

ML2259

28-Pin DIP(P28W)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

TOP VIEW

CH0

20

ADDR0

19

ALE

18

DB7

17

DB6

16

DB5

15

DB4

14

DB0

13

–V

12

11

REF

DB2

+V

DB3

OE

CLK

V

CC

REF

EOL

START

CH1

CH0

3212019

4

5

6

7

8

910111213

GND

DB1

DB2

REF

–V

ADDR0

18

17

16

15

14

DB0

ALE

DB7

DB6

DB5

DB4

TOP VIEW

ML2259

28-Pin PLCC (Q28)

CH2

28

CH1

27

CH0

26

ADDR0

25

ADDR1

24

ADDR2

23

ALE

22

DB7

21

DB6

20

DB5

19

DB4

18

DB0

17

–V

16

15

REF

DB2

CH7

START

EOC

DB3

OE

CLK

V

CC

CH6

CH5

CH4

CH3

432128

5

6

7

8

9

10

11

12 13 14 15 16

REF

DB1

DB2

GND

+V

TOP VIEW

CH2

REF

–V

CH1

27 26

17 18

DB0

CH0

25

24

23

22

21

20

19

DB4

ADDR0

ADDR1

ADDR2

ALE

DB7

DB6

DB5

2

ML2252, ML2259

PIN DESCRIPTION

Pin Number

ML2252 ML2259 Name Function

1 CH3 Analog input 3.
2 CH4 Analog input 4.
3 CH5 Analog input 5.
4 CH6 Analog input 6.

5 CH7 Analog input 7.
2 6 START Start of conversion. Active high digital input pulse initiates conversion.
3 7 EOC End of conversion. This output goes low after a START pulse occurs, stays

low for the entire A/D conversion, and goes high after conversion is
completed. Data on DB0–DB7 is valid on rising edge of EOC and stays valid

until next EOC rising edge.
4 8 DB3 Data output 3.
5 9 OE Output enable input. When OE = 0, DB0–DB7 are in high impedance state;

OE = 1, DB0–DB7 are active outputs.
6 10 CLK Clock. Clock input provides timing for A/D converter, S/H, and digital

interface.
711 VCCPositive supply. 5V ±10%.
812 +V
9 13 GND Ground. 0V, all analog and digital inputs or outputs are referenced to this

10 14 DB1 Data output 1.
11 15 DB2 Data output 2.
12 16 –V
13 17 DB0 Data output 0.
14 18 DB4 Data output 4.
15 19 DB5 Data output 5.
16 20 DB6 Data output 6.
17 21 DB7 Data output 7.
18 22 ALE Address latch enable. Input to latch in the digital address (ADDR2-0) on the

23 ADDR2 Address input 2 to multiplexer. Digital input for selecting analog input.

24 ADDR1 Address input 1 to multiplexer. Digital input for selecting analog input.
19 25 ADDR0 Address input 0 to multiplexer. Digital input for selecting analog input.
20 26 CH0 Analog input 0.

1 27 CH1 Analog input 1.

28 CH2 Analog input 2.

REF

REF

Positive reference voltage.

point.

Negative reference voltage.

rising edge of the multiplexer.

3

ML2252, ML2259

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.

Supply Voltage, V

.............................................................. 6.5V

CC

Thermal Resistance (qJA)

20-Pin PDIP .....................................................67°C/W

20-Pin PLCC .................................................... 78°C/W

28 Pin PDIP ..................................................... 48°C/W

28-Pin PLCC .................................................... 68°C/W

Logic Inputs ....................................... –0.3V to VCC 0.3V

Analog Inputs ..................................... –0.3V to VCC 0.3V

OPERATING CONDITIONS

Input Current per Pin ............................................±25mA

Storage Temperature ................................–65°C to 150°C

Lead Temperature (Soldering 10 sec.) .................... 260°C

Supply Voltage, V

.............................................. 4.5V to 6.3V

CC

Temperature Range ........................................0°C to 70°C

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, VCC = +V
TA = Operating temperature range (Note 1)

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

Converter and Multiplexer Characteristics

Total Unadjusted Error V
+V

Voltage Range –V

REF

–V

Voltage Range GND – 0.1 +V

REF

Reference Input Resistance 14 20 35 14 20 28 k ý
Analog Input Range (Note 3) GND – 0.1 VCC + 0.1 GND – 0.1 VCC + 0.1 V
Power Supply Sensitivity DC, VCC = 5V ±10% ±1/32 ±1/4 ±1/32 ±1/4 LSB

I

, Off Channel Leakage On Channel = V

OFF

Current (Note 9) Off Channel = 0V

ION, On Channel Leakage On Channel = 0V, (Note 4) –1 –1 µA
Current (Note 9) Off Channel = V

= V

REF

100mVp-p, 100kHz ±1/16 ±1/16 LSB
Sine on VCC, V

On Channel = 0V, (Note 4) 1 1 µA
Off Channel = V

On Channel = V
Off Channel = 0V

= 5V ±10%, –V

REF

= GND, f

REF

= 1.46MHz,

CLK

ML2252B, ML2259B ML2252C, ML2259C

(Note 2) ±1/2 ±1 LSB

CC,

REF

= 0

IN

(Note 4) –1 –1 µA

CC,

CC

CC

(Note 4) 1 1 µA

CC,

VCC + 0.1 –V

GND – 0.1 +V

REF

REF

VCC + 0.1 V

REF

V

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Digital and DC

V

IN(1)

V

IN(0)

I

IN(1)

I

IN(0)

V

OUT(1)

V

OUT(0)

I

OUT

Logical “1” Input Voltage 2.0 V
Logical “0” Input Voltage 0.8 V
Logical “1” Input Current VIN = V

CC

1µA
Logical “0” Input Current VIN = 0V –1 µA
Logical “1” Output Voltage I
Logical “0” Output Voltage I
Three-State Output Current V

= –2mA 4.0 V

OUT

= 2mA 0.4 V

OUT

= 0V –1 µA

OUT

V

OUT

= V

CC

1µA

ICCSupply Current 1.5 3 mA

4