Microchip Technology Inc MCP3208-CI-P, MCP3204-CI-P, MCP3204-CI-SL Datasheet

MCP3204/3208

2.7V 4-Channel/8-Channel 12-Bit A/D Converters with SPI® Serial Interface

FEATURES

• 12-bit resolution

• ± 1 LSB max DNL

• ± 1 LSB max INL (MCP3204/3208-B)

• ± 2 LSB max INL (MCP3204/3208-C)

• 4 (MCP3204) or 8 (MCP3208) input channels

• Analog inputs programmable as single-ended or pseudo differential pairs

• On-chip sample and hold

®

serial interface (modes 0,0 and 1,1)

• SPI

• Single supply operation: 2.7V - 5.5V

• 100ksps max. sampling rate at V

• 50ksps max. sa mpling rate at V

DD

= 2.7V

DD

= 5V

• Low power CMOS technology

- 500 nA typical standby current, 2µA max.

- 400 µA max. active current at 5V

• Industrial temp range: -40°C to +85°C

• Available in PDIP, SOIC and TSSOP packages

APPLICATIONS

• Sensor Interface

• Process Control

• Data Acquisition

• Battery Operated Systems

DESCRIPTION

PAC K AGE TYPES

PDIP, SOIC, TSSOP

14

CH0 CH1 CH2 CH3

NC NC

DGND

1 2 3 4 5 6

7

MCP3204

V

DD

13

V

REF

12

AGND CLK

11 10

D

OUT

D

9

IN

8

/SHDN

CS

PDIP, SOIC

CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7

1 2

3 4 5 6 7 8

MCP3208

16 15

14 13 12 11 10

9

V

DD

V

REF

AGND CLK D

OUT

D

IN

CS/SHDN DGND

FUNCTIONAL BLOCK DIAGRAM

V

REF

DD

V

SS

The Microchip Technology Inc. MCP3204/3208 devices are successive approximation 12-bit Analog-to-Digital (A/D) Converters with on-board sample and hold circuitry. The MCP3204 is programmable to provide two pseudo-differential input pairs or four single-ended inputs. The MCP3208 is programmable to provide four pseudo-diffe rential i nput pai rs or eig ht single-ended inputs. Differential Nonlinearity (DNL) is specified at ±1 LSB, and Integral Nonlinearity (INL) is offered in ±1 LSB (MCP3204/3208-B) and ±2 LSB

CH0 CH1

CH7*

Input

Channel

Mux

Sample

and Hold

DAC

Comparator

Control Logic

12-Bit SAR

Shift

Register

(MCP3204/3208-C) versions. Communication with the devices i s done using a si mple serial interfac e compatible with the SPI protocol. The devices are capable of conversion rates o f up to 100k sps. The MCP3204/3208

CS/SHDN

*Note: Channels 5-7 available on MCP3208 Only

D

CLK

IN

D

OUT

devices operate over a broad voltage range (2.7V -

5.5V). Low current design permits operation with typi-

cal standby and active currents of only 500nA and 320µA, respectively. The MCP3204 is offe red in 14-pin PDIP, 150mil SOIC and TSSOP packages, and the MCP3208 is offered in 16-pin PDIP and SOIC packages.

 1999 Microchip Technology Inc. Preliminary DS21298B-page 1

MCP3204/3208

1.0 ELECTRICAL

PIN FUNCTION TABLE

CHARACTERISTICS

NAME FUNCTION

1.1 Maximum Ratings*

VDD.........................................................................7.0V

All inputs and outputs w.r.t. V

Storage temperature..........................-65°C to +150°C

Ambient temp. with power applied......-65°C to +125°C

Soldering temperature of leads (10 seconds)..+300°C

ESD protection on all pins...................................> 4kV

*Notice: Stresses above those listed under “Maximum R atings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listin gs of this spe cificat ion is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

...... -0.6V to VDD +0.6V

SS

V

DD

DGND AGND CH0-CH7 CLK D

IN

D

OUT

CS/SHDN V

REF

+2.7V to 5.5V Power Supply Digital Ground Analog Ground Analog Inputs Serial Clock Serial Data In Serial Data Out Chip Select/Shutdown Input Reference Voltage Input

ELECTRICAL CHARACTERISTICS

All parameters apply at VDD = 5V, VSS = 0V, V

f

CLK

= 20*f

, unless otherwise noted.

SAMPLE

PARAMETER SYMBOL MIN. TYP. MAX. UNITS CONDITIONS

Convers ion Rate

Conversion Time t

Analog Input Sample Time t

Throughput Rate f

CONV

SAMPLE

DC Accuracy

Resolution 12 bits Integral Nonlinearity INL ±0.75

Differential Nonlinearity DNL ±0.5 ±1 LSB No missing codes over

Offset Error ±1.25 ±3 LSB Gain Error ±1.25 ±5 LSB

Dynamic Performance

Total Harmonic Distortion -82 dB V Signal to Noise and Distortion

(SINAD) Spurious Free Dynamic

Range Reference Input Voltage Range 0.25 V

Current Drain 100

Analog Inputs

Input Voltage Range for CH0-CH7 in Single-Ended Mode

Input V oltage Rang e for IN+ In pseudo-differential Mode

Input Voltage Range for IN - In pseudo-differential Mode

Leakage Current 0.001 ±1 µA

REF

= 5V, T

= -40°C to +85°C, f

AMB

12 clock

cycles

1.5 clock cycles

±1

100

50

±1 ±2

ksps ksps

LSB MCP3204/3208-B

72 dB V

86 dB VIN = 0.1V to 4.9V@1kHz

VNote2

DD

0.001

V

SS

IN- V

V

REF

150

3

REF

+IN-

µA µA CS

V

VSS-100 VSS+100 mV

= 100ksps and

SAMPLE

V

= V

REF REF

= 5V = 2.7V

DD

V

DD

MCP3204/3208-C

temperature

IN = 0.1V to 4.9V@1kHz IN = 0.1V to 4.9V@1kHz

= VDD = 5V

DS21298B-page 2 Preliminary  1999 Microchip Technology Inc.

MCP3204/3208

ELECTRICAL CHARACTERISTICS (CONTINUED)

All parameters apply at VDD = 5V, VSS = 0V, V f

CLK

= 20*f

, unless otherwise noted.

SAMPLE

PARAMETER SYMBOL MIN. TYP. MAX. UNITS CONDITIONS

Analog Inputs (Continued)

Switch Resistance 1K Ω See Figure 4-1 Sample Capacitor 20 pF See Figure 4-1

Digital Input/Output

Data Coding Format Straight Binary High Level Input Voltage V

Low Level Input Voltage V High Level Output Voltage V Low Level Output Voltage V Input Leakage Current I

Output Leakage Current I Pin Capacitance

(All Inputs/Outputs)

LO

CIN, C

IH

IL

OH

OL

LI

OUT

Timing Parameters

Clock Frequency f

Clock High Time t Clock Low Tim e t

Fall To First Rising CLK

CS Edge

Data Input Setup Time t Data Input Hold Time t CLK Fall To Output Data Valid t CLK Fall To Output Enable t CS

Rise To Output Disable t

CS

Disable Time t

Rise Time t

D

OUT

D

Fall Time t

OUT

CLK

t

SUCS

CSH

HI

LO

SU

HD

DO

EN

DIS

R

F

Power Requirements

Operating Voltage V Operating Current I

Standby Current I

DD

320

DD

DDS

Note 1: This parameter is guaranteed by characterization and not 100% tested. Note 2: See graphs that relate linearity performance to V Note 3: Because the sampl e c ap wil l eventually los e c ha rge, effective clock rates below 10kHz ca n a ffec t l ine arity

performance, especially at elevated temperatures. See Section 6.2 for more information.

REF

0.7 V

= 5V, T

DD

= -40°C to +85°C, f

AMB

0.3 V

DD

V V

= 100ksps and

SAMPLE

4.1 V IOH = -1mA, VDD = 4.5V

0.4 V IOL = 1mA, VDD = 4.5V

-10 10 µA VIN = VSS or V

-10 10 µA V

= VSS or V

OUT

DD

10 pF VDD = 5.0V (Note 1)

T

= 25°C, f = 1 MHz

AMB

2.0

1.0

MHz MHz

VDD = 5V (Note 3) VDD = 2.7V (Note 3)

250 ns 250 ns 100 ns

50 ns

50 ns 200 ns See Test Circuits, Figure 1-2 200 ns See Test Circuits, Figure 1-2 100 ns See Test Circuits, Figure 1-2

500 ns

100 ns See Test Circuits, Figure 1-2

(Note 1)

100 ns See Test Circuits, Figure 1-2

(Note 1)

2.7 5.5 V

225

400 µA VDD = V

VDD = V

= 5V, D

REF

= 2.7V, D

REF

0.5 2 µA CS = VDD = 5.0V

levels.

REF

unloaded

OUT

unloaded

OUT

 1999 Microchip Technology Inc. Preliminary DS21298B-page 3

MCP3204/3208

t

CSH

CS

t

SUCS

CLK

t

HD

SU

D

IN MSB IN

D

OUT

FIGURE 1-1: Serial Interface Timing.

Load circuit for tR, t

D

OUT

1.4V

3K

= 100pF

C

L

F, tDO

Test Point

t

LO

HI

t

EN

DO

NULL BIT

MSB OUT

t

R

Load circuit for

t

F

t

DIS

LSB

t

and t

DIS

EN

Test Point

V

DD

3K

D

OUT

100pF

V

SS

VDD/2

t

Waveform 2

DIS

tEN Waveform

t

Waveform 1

DIS

Voltage Waveforms for tR, t

D

OUT

t

R

Voltage Waveforms for t

CLK

D

OUT

F

V

OH

V

OL

t

F

DO

t

DO

CS

CLK

D

OUT

Voltage Waveforms for t

CS

D

OUT

Waveform 1*

D

OUT

EN

12

t

EN

DIS

V

IH

T

DIS

3

4

B11

90%

10%

Waveform 2†

* Waveform 1 is for an output with internal con di-

tions such that the output is high, unless disabled by the output control.

† Waveform 2 is for an output with internal condi-

tions such that the output is low, unless disabled by the output control.

FIGURE 1-2: Test Circuits.

DS21298B-page 4 Preliminary  1999 Microchip Technology Inc.

2.0 TYPICAL PERFORMANCE CHARACTERISTICS

Note: Unless otherwise indicated, V

DD

= V

= 5V, VSS = 0V, f

REF

SAMPLE

= 100ksps, f

MCP3204/3208

CLK

= 20* f

SAMPLE,TA

= 25°C

1.0

0.8

0.6

0.4

0.2

0.0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1.0 0 25 50 75 100 125 150

Positive INL

Negative INL

Sample Rate (ksps)

FIGURE 2-1: Integral Nonlinearity (INL) vs. Sample Rate.

3.0

2.5

2.0

1.5

1.0

0.5

0.0

-0.5

INL(LSB)

-1.0

-1.5

-2.0

-2.5

-3.0 0123456

Positive INL

Negative INL

V

(V)

REF

2.0

VDD = V

= 2.7V

1.5

1.0

0.5

0.0

-0.5

INL (LSB)

-1.0

-1.5

-2.0

REF

Positive INL

Negative INL

0 1020304050607080

Sample Rate (ksps)

FIGURE 2-4: Integral Nonl inearity (IN L) vs. Sample Rate (V

= 2.7V).

DD

2.0

1.5

1.0

0.5

0.0

-0.5

INL(LSB)

-1.0

-1.5

-2.0

0.0 0.5 1.0 1.5 2.0 2.5 3.0

Positive INL

Negative INL

V

REF

(V)

FIGURE 2-2: Integral Nonlinearity (INL) vs. V

1.0

0.8

0.6

0.4

0.2

0.0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1.0 0 512 1024 1536 2048 2560 3072 3584 4096

REF.

Digital Code

FIGURE 2-3: Integral Nonlinearity (INL) vs. Code (Representative Part).

FIGURE 2-5: Integral Nonlinearity (INL) vs. V

= 2.7V).

(V

DD

1.0

VDD = V

= 2.7V

REF

= 50ksps

F

SAMPLE

0 512 1024 1536 2048 2560 3072 3584 4096

INL (LSB)

0.8

0.6

0.4

0.2

0.0

-0.2

-0.4

-0.6

-0.8

-1.0

Digital Code

FIGURE 2-6: Integral Nonlinearity (INL) vs. Code (Representative Part, V

= 2.7V).

DD

REF

 1999 Microchip Technology Inc. Preliminary DS21298B-page 5

MCP3204/3208

Note: Unless otherwise indicated, V

1.0

0.8

0.6

0.4

0.2

0.0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1.0

-50 -25 0 25 50 75 100

Positive INL

Negative INL

DD

= V

= 5V, VSS = 0V, f

REF

Temperature (°C)

FIGURE 2-7: Integral Nonlinearity (INL) vs. Temperature.

1.0

0.8

0.6

0.4

0.2

0.0

-0.2

DNL (LSB)

-0.4

-0.6

-0.8

-1.0 0 25 50 75 100 125 150

Positive DNL

Negativ e DNL

Sample Rate (ksps)

SAMPLE

= 100ksps, f

1.0

VDD = V

0.8

F

SAMPLE

0.6

0.4

0.2

0.0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1.0

-50 -25 0 25 50 75 100

CLK

= 2.7V

REF

= 50ksps

= 20* f

SAMPLE,TA

Positive INL

Negative INL

= 25°C

Temperature (° C )

FIGURE 2-10: Integral Nonlinearity (INL) vs.

VDD = V

= 2.7V).

DD

= 2.7V

REF

Positive DNL

Negative DNL

Sample Rate (ksps)

Temperature (V

2.0

1.5

1.0

0.5

0.0

-0.5

DNL (LSB)

-1.0

-1.5

-2.0 0 10203040506070

FIGURE 2-8: Differential Nonlinearity (DNL) vs. Sample Rate.

3.0

2.0

1.0

0.0

DNL (LSB)

-1.0

-2.0

-3.0 012345

Positive DNL

Negative DNL

V

(V)

REF

FIGURE 2-9: Differential Nonlinearity (DNL) vs. V

REF.

FIGURE 2-11: Differential Nonlinearity (DNL) vs.

.

= 2.7V).

DD

Positive DNL

Negative DNL

V

REF

(V)

VDD = V F

SAMPLE

= 2.7V

REF

= 50ksps

REF

Sample Rate (V

3.0

2.0

1.0

0.0

DNL (LSB)

-1.0

-2.0

-3.0

0.00.51.01.52.02.53.0

FIGURE 2-12: Differe nti al N onl ine arity (DNL) vs . V (VDD = 2.7V)

DS21298B-page 6 Preliminary  1999 Microchip Technology Inc.

Microchip Technology Inc MCP3208-CI-P, MCP3204-CI-P, MCP3204-CI-SL Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1.1 Maximum Ratings*

ELECTRICAL CHARACTERISTICS

2.0 TYPICAL PERFORMANCE CHARACTERISTICS