Microchip Technology Inc 24LC16B-SN, 24LC16B-P Datasheet
2000 Microchip Technology Inc. Preliminary DS20070L-page 1
FEATURES
• Single supply with operation down to 2.5V
• Low power CMOS technology
- 1 mA active current typical
-10 µA standby current typical at 5.5V
-5 µA standby current typical at 3.0V
• Organized as 8 blocks of 256 bytes (8 x 256 x 8)
• 2-wire serial interface bus, I
2
C compatible
• Schmitt trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz (E-temp) and 400 kHz (C/I-temp)
compatibility
• Self-timed write cycle (including auto-erase)
• Page-write buffer for up to 16 bytes
• 2 ms typical write cycle time for page-write
• Hardware write protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
• 1,000,000 erase/write cycles guaranteed
• Data retention > 200 years
• 8-pin DIP, 8-lead SOIC, 8-lead TSSOP packages
• Available for extended temperature ranges
DESCRIPTION
The Microchip Technology Inc. 24LC16B is a 16K bit
Electrically Erasable PROM. The device is organized
as eight blocks of 256 x 8 bit memory with a 2-wire
serial interface. Low voltage design permits operation
down to 2.5 volts with standby and active currents of
only 5 µA and 1 mA respectively. The 24LC16B also
has a page-write capability for up to 16 bytes of data.
The 24LC16B is available in the standard 8-pin DIP
surface mount SOIC and TSSOP packages.
PACKAGE TYPES
BLOCK DIAGRAM
- Commercial (C): 0°C
to
+70°C
- Industrial (I): -40°C
to
+85°C
- Automotive (E): -40°C
to
+125°C
24LC16B
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
24LC16B
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
8-Lead PDIP
8-Lead SOIC
24LC16B
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
8-Lead TSSOP
HV GENERATOR
EEPROM
ARRAY
PAGE LATCHES
YDEC
XDEC
SENSE AMP
R/W CONTROL
MEMORY
CONTROL
LOGIC
I/O
CONTROL
LOGIC
WP
SDA SCL
VCC
VSS
I2C is a trademark of Philips Corporation.
24LC16B
16K 2.5V I2C™ Serial EEPROM
24LC16B
DS20070L-page 2 Preliminary 2000 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
1.1 Maximum Ratings*
VCC...................................................................................7.0V
All inputs and outputs w.r.t. V
SS ............... -0.3V to VCC +1.0V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
Soldering temperature of leads (10 seconds) .............+300°C
ESD protection on all pins
..................................................≥ 4 kV
*Notice: Stresses above those listed under “Maximum ratings”
may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any
other conditions above those indicated in the operational listings
of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1: PIN FUNCTION TABLE
TABLE 1-2: DC CHARACTERISTICS
FIGURE 1-1: BUS TIMING START/STOP
Name Function
VSS
Ground
SDA Serial Address/Data I/O
SCL Serial Clock
WP Write Protect Input
V
CC +2.5V to 5.5V Power Supply
A0, A1, A2 No Internal Connection
Vcc = +2.5V to +5.5V
Commercial (C): Tamb = 0°C to +70°C
Industrial (I): Tamb = -40°C to +85°C
Automotive (E) Tamb = -40°C to +125°C
Parameter Symbol Min Max Units Conditions
WP, SCL and SDA pins:
High level input voltage
V
IH .7 VCC — V
Low level input voltage
V
IL — .3 VCC V
Hysteresis of Schmitt trigger
inputs
V
HYS .05 VCC — V (Note)
Low level output voltage
V
OL — .40 V IOL = 3.0 mA, VCC = 2.5V
Input leakage current I
LI -10 10 µAVIN = .1V to VCC
Output leakage current ILO -10 10 µΑ VOUT = .1V to VCC
Pin capacitance
(all inputs/outputs)
CIN, COUT — 10 pF VCC = 5.0V (Note)
Ta m b = 25 °C, F
CLK = 1MHz
Operating current
ICC write
I
CC read
—
—
3
1
mAmAV
CC = 5.5V, SCL = 400 kHz
Standby current ICCS —
—
30
100
µΑµΑVCC = 3.0V, SDA = SCL = VCC
VCC = 5.5V, SDA = SCL = VCC
WP = VSS
Note: This parameter is periodically sampled and not 100% tested.
TSU:STA
THD:STA
VHYS
TSU:STO
START STOP
SCL
SDA
2000 Microchip Technology Inc. Preliminary DS20070L-page 3
24LC16B
TABLE 1-3: AC CHARACTERISTICS
VCC = +2.5V to 5.5V
Commercial (C): Tamb = 0°C to +70°C
Industrial (I): Tamb = -40°C to +85°C
Automotive (E): Tamb = -40°C to 125°C
Parameter Symbol Min Max Units Conditions
Clock frequency
Fclk
—
—
400
100
kHz 4.5V ≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
Clock high time T
high
600
4000
—
—
ns 4.5V ≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
Clock low time
T
LOW 1300
4700
—
—
ns 4.5V ≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
SDA and SCL rise time
(Note 1)
T
R —
—
300
1000
ns 4.5V ≤ VCC ≤ 5.5V (Note 1)
2.5V
≤ VCC ≤ 5.5V (E-temp range) (Note 1)
SDA and SCL fall time
T
F — 300 ns (Note 1)
START condition hold time
T
HD:STA 600
4000
—
—
ns 4.5V ≤ Vcc ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
START condition setup time
T
SU:STA 600
4700
—
—
ns 4.5V ≤ Vcc ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
Data input hold time
T
HD:DAT 0 — ns (Note 2)
Data input setup time
T
SU:DAT 100
250
—
—
ns 4.5V ≤ Vcc ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
STOP condition setup time
T
SU:STO 600
4000
—
—
ns 4.5V ≤ Vcc ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
Output valid from clock
(Note 2)
T
AA —
—
900
3500
ns 4.5V ≤ Vcc ≤ 5.5V
2.5V
≤ Vcc ≤ 5.5V (E-temp range)
Bus free time: Time the bus must be
free before a new transmission can
start
T
BUF 1300
4700
—
—
ns 4.5V ≤ Vcc ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
Output fall time from V
IH
minimum to VIL maximum
T
OF 20+0.1CB
—
250
250
ns
4.5V≤ VCC ≤ 5.5V
2.5V
≤ VCC ≤ 5.5V (E-temp range)
Input filter spike suppression
(SDA and SCL pins)
T
SP — 50 ns (Notes 1 and 3)
Write cycle time (byte or page)
T
WC — 5ms
Endurance
1M — cycles
25°C, Vcc = 5.0V, Block Mode (Note 4)
Note 1: Not 100% tested. C
B
= total capacitance of one bus line in pF.
Note 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
Note 3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
Note 4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application,
please consult the Total Endurance Model which can be obtained on Microchip’s website.
24LC16B
DS20070L-page 4 Preliminary 2000 Microchip Technology Inc.
FIGURE 1-2: BUS TIMING DATA
TSU:STA
TF
TLOW
THIGH
TR
THD:DAT TSU:DAT
TSU:STO
THD:STA
TBUF
TAA
TAA
TSP
THD:STA
SCL
SCL
IN
SCL
OUT
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