Microchip Technology WINC3400 User Manual

ATWINC3400-MR210CA

IEEE 802.11 b/g/n Network Controller Module with

Integrated Bluetooth Low Energy 4.0

Introduction

The ATWINC3400-MR210CA is an IEEE 802.11 b/g/n RF/Baseband/Medium Access Control (MAC) network controller module with Bluetooth Low Energy technology that is compliant with Bluetooth version

4.0. This module is optimized for low power and high performance mobile applications. This module features small form factor when integrating Power Amplifier (PA), Low-Noise Amplifier (LNA), Transmit/ Receive (T/R) switch (for Wi-Fi and Bluetooth), Power Management Unit (PMU), and Chip Antenna. The ATWINC3400-MR210CA module requires a 32.768 kHz clock for Sleep operation.

The ATWINC3400-MR210CA module utilizes highly optimized IEEE 802.11 Bluetooth coexistence protocols, and provides Serial Peripheral Interface (SPI) to interface with the host controller.

Features

Wi-Fi features:

• IEEE 802.11 b/g/n RF/PHY/MAC

• IEEE 802.11 b/g/n (1x1) with single spatial stream, up to 72 Mbps PHY rate in 2.4 GHz ISM band

• Integrated chip antenna

• Superior sensitivity and range via advanced PHY signal processing

• Advanced equalization and channel estimation

• Advanced carrier and timing synchronization

• Supports Soft-AP

• Supports IEEE 802.11 WEP, WPA, and WPA2

• Superior MAC throughput through hardware accelerated two-level A-MSDU/A-MPDU frame aggregation and block acknowledgment

• On-chip memory management engine to reduce the host load

• Operating temperature range from -40°C to +85°C

• Wi-Fi Alliance® certified for connectivity and optimizations

– ID: WFA62065

• Integrated on-chip microcontroller

• SPI host interface

• Integrated Flash memory for Wi-Fi and Bluetooth system software

• Low leakage on-chip memory for state variables

• Fast AP re-association (150 ms)

• On-chip network stack to offload MCU

– Integrated network IP slack to minimize the host CPU requirements

• Network features: Firmware version 1:2:x

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– TCP, UDP, DHCP, ARP, HTTP, SSL, DNS, and SNTP

Bluetooth features:

• Bluetooth 4.0 (Bluetooth Low Energy) certifications

– Controller QD ID - 77870

– Host QD ID - 77451

• Class 2 transmission

• Adaptive Frequency Hopping (AFH)

• Superior sensitivity and range

ATWINC3400-MR210CA

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Introduction......................................................................................................................1

Features.......................................................................................................................... 1

1. Ordering Information and Module Marking................................................................ 5

2. Block Diagram........................................................................................................... 6

3. Pinout and Package Information............................................................................... 7

3.1. Package Description.................................................................................................................. 10

4. Electrical Characteristics..........................................................................................11

4.1. Absolute Maximum Ratings........................................................................................................11

4.2. Recommended Operating Conditions........................................................................................ 11

4.3. DC Characteristics..................................................................................................................... 12

4.4. IEEE 802.11 b/g/n Radio Performance...................................................................................... 12

4.5. Bluetooth Radio Performance.................................................................................................... 14

4.6. Timing Characteristics................................................................................................................ 16

5. Power Management................................................................................................ 21

5.1. Device States............................................................................................................................. 21

5.2. Controlling Device States...........................................................................................................21

5.3. Power-Up/Down Sequence........................................................................................................22

5.4. Digital I/O Pin Behavior During Power-Up Sequences...............................................................23

6. Clocking...................................................................................................................24

6.1. Low-Power Clock....................................................................................................................... 24

7. CPU and Memory Subsystem................................................................................. 25

7.1. Processor................................................................................................................................... 25

7.2. Memory Subsystem....................................................................................................................25

7.3. Nonvolatile Memory....................................................................................................................25

8. WLAN Subsystem................................................................................................... 27

8.1. MAC........................................................................................................................................... 27

8.2. PHY............................................................................................................................................28

8.3. Radio..........................................................................................................................................28

9. Bluetooth Low Energy 4.0....................................................................................... 30

10. External Interfaces...................................................................................................31

10.1. Interfacing with the Host Microcontroller.................................................................................... 31

10.2. SPI Interface...............................................................................................................................32

10.3. UART Interface...........................................................................................................................34

11. Application Reference Design................................................................................. 35

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ATWINC3400-MR210CA

11.1. Host Interface - SPI.................................................................................................................... 35

12. Module Outline Drawings........................................................................................ 37

13. Design Consideration.............................................................................................. 38

13.1. Module Placement and Routing Guidelines............................................................................... 38

13.2. Antenna Performance................................................................................................................ 39

14. Reflow Profile Information....................................................................................... 41

14.1. Storage Condition.......................................................................................................................41

14.2. Solder Paste...............................................................................................................................41

14.3. Stencil Design............................................................................................................................ 41

14.4. Baking Conditions...................................................................................................................... 41

14.5. Soldering and Reflow Condition................................................................................................. 41

15. Module Assembly Considerations........................................................................... 44

16. Regulatory Approval................................................................................................45

16.1. United States..............................................................................................................................45

16.2. Canada.......................................................................................................................................46

16.3. Europe........................................................................................................................................48

16.4. Other Regulatory Information..................................................................................................... 49

17. Reference Documentation.......................................................................................50

18. Document Revision History..................................................................................... 51

The Microchip Web Site................................................................................................ 52

Customer Change Notification Service..........................................................................52

Customer Support......................................................................................................... 52

Product Identification System........................................................................................53

Microchip Devices Code Protection Feature................................................................. 53

Legal Notice...................................................................................................................53

Trademarks................................................................................................................... 53

Quality Management System Certified by DNV.............................................................54

Worldwide Sales and Service........................................................................................55

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1. Ordering Information and Module Marking

2 1

Device name

MR: Industrial

2: OTA with shield

1: Reserved

C: Chip antenna

Revision letter

Software version

ATWINC3400

A xxx

The following table provides the ordering details for the ATWINC3400-MR210CA module.

Table 1-1. Ordering Details

ATWINC3400-MR210CA

Model Number Ordering Code Package Description

ATWINC3400MR210CA

Note:

1. 'xxx' in the preceding table and following figure denotes the software version. Order code changes as per the software version. For example, current version of the software is v1.22, so its equivalent order code is ATWINC3400-MR210CA122.

2. CE certification pending.

The following figure illustrates the ATWINC3400-MR210CA module marking information.

Figure 1-1. Marking Information

ATWINC3400-MR210CAxxx 122.43 x

14.73 x 2.0 mm

Certified module with chip antenna

Regulatory Information

FCC, IC, CE

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2. Block Diagram

ATWINC3400 IC

The following figure shows the block diagram of the ATWINC3400-MR210CA module.

Figure 2-1. ATWINC3400-MR210CA Module Block Diagram

ATWINC3400-MR210CA

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3. Pinout and Package Information

ATWINC3400-MR210CA

MODULE

J10

J11

J12

J13

J14

J15

J16

J17

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

J30

J31

J32

J33

J34

J35

J36

GND

I2C_SDA_M

I2C_SCL_M

IRQN

GPIO20

GPIO19

GPIO18

GPIO17

GND

GPIO7

SPI_MOSI

SPI_SSN

SPI_MISO

SPI_SCK

GPIO8

GND

RTC_CLK

CHIP_EN

VBAT

UART_RXD

UART_TXD

GPIO4

GPIO3

GND

VDDIO

BT_RXD

BT_TXD

RESETN

N/C

SPI_CFG

GND

I2C_SDA_S

I2C_SCL_S

This package contains an exposed paddle that must be connected to the system board ground. The ATWINC3400-MR210CA module pin assignment is shown in following figure.

Figure 3-1. ATWINC3400-MR210CA Module Pin Assignment

ATWINC3400-MR210CA

The following table provides the ATWINC3400-MR210CA module pin description.

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ATWINC3400-MR210CA

Table 3-1. ATWINC3400-MR210CA Module Pin Description

Pin # Pin Name Pin Type Description

1 GND GND Ground pin.

2 SPI_CFG Digital Input Serial Peripheral Interface pin, which must be

died to VDDIO.

3 NC - No connection.

4 NC - No connection.

5 NC - No connection.

6 NC - No connection.

7 RESETN Digital Input • Active-low hard Reset pin.

• When the Reset pin is asserted low, the module is in the Reset state. When the Reset pin is asserted high, the module functions normally.

• This pin must connect to a host output that is low by default on power-up. If the host output is tri-stated, add a 1 MOhm pull down resistor to ensure a low level at power-up.

8 BT_TXD Digital I/O,

Programmable pull up

9 BT_RXD Digital I/O,

Programmable pull up

10 I2C_SDA_S Digital I/O,

Programmable pull up

11 I2C_SCL_S Digital I/O,

Programmable pull up

12 VDDIO Power Digital I/O power supply.

13 GND GND Ground pin.

14 GPIO3 Digital I/O,

Programmable pull up

Bluetooth UART transmit data output pin.

Bluetooth UART receive data input pin.

• I2C Slave data pin.

• Used only for debug development purposes. It is recommended to add a test point for this pin.

• I2C is the default configuration. <TBD>

• I2C Slave clock pin.

• Used only for debug development purposes. It is recommended to add a test point for this pin.

• I2C is the default configuration. <TBD>

General Purpose Input/Output pin.

15 GPIO4 Digital I/O,

Programmable pull up

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General Purpose Input/Output pin.

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ATWINC3400-MR210CA

Pin # Pin Name Pin Type Description

16 UART_TXD Digital I/O,

Programmable pull up

17 UART_RXD Digital I/O,

Programmable pull up

18 VBAT Power Power supply pin for DC/DC converter and PA.

19 CHIP_EN Digital Input • PMU enable pin.

20 RTC_CLK Digital I/O,

Programmable pull up

• Wi-Fi UART TxD output pin.

• Used only for debug development purposes. It is recommended to add a test point for this pin.

• Wi-Fi UART RxD input pin.

• Used only for debug development purposes. It is recommended to add a test point for this pin.

• When the CHIP_EN pin is asserted high, the module is enbled. When the CHIP_EN pin is asserted low, the module is disabled or put into Power-Down mode.

• Connect to a host output that is low by default at power-up. If the host output is tri-stated, add a 1 MOhm pull down resistor if necessary to ensure a low level at power-up.

• RTC Clock input pin.

• This pin must connect to a 32.768 kHz clock source.

21 GND GND Ground pin.

22 GPIO8 Digital I/O,

Programmable pull up

23 SPI_SCK Digital I/O,

Programmable pull up

24 SPI_MISO Digital I/O,

Programmable pull up

25 SPI_SSN Digital I/O,

Programmable pull up

26 SPI_MOSI Digital I/O,

Programmable pull up

27 GPIO7 Digital I/O,

Programmable pull up

28 GND GND Ground pin.

29 GPIO17 Digital I/O,

Programmable pull up

30 GPIO18 Digital I/O,

Programmable pull up

General Purpose Input/Output pin.

SPI clock pin.

SPI MISO (Master In Slave Out) pin.

Active-low SPI SSN (Slave Select) pin.

SPI MOSI (Master Out Slave In) pin.

General Purpose Input/Output pin.

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ATWINC3400-MR210CA

Pin # Pin Name Pin Type Description

31 GPIO19 Digital I/O,

32 GPIO20 Digital I/O,

33 IRQN Digital output,

34 I2C_SCL_M Digital I/O,

35 I2C_SDA_M Digital I/O,

36 GND GND Ground pin.

37 PADDLE VSS Power Connect to system board ground.

3.1 Package Description

The following table provides the ATWINC3400-MR210CA module package dimensions.

Programmable pull up

General Purpose Input/Output pin.

• ATWINC3400-MR210CA module host interrupt request output pin.

• This pin must connect to a host interrupt pin.

I2C Master clock pin.

I2C Master data pin.

Table 3-2. ATWINC3400-MR210CA Module Package Information

Parameter Value Unit

Pad count 36 -

Package size 22.43 x 14.73 mm

Total thickness 2.09

Pad pitch 1.20

Pad width 0.81

Exposed pad size 4.4 x 4.4

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4. Electrical Characteristics

This chapter provides an overview of the electrical characteristics of the ATWINC3400-MR210CA module.

4.1 Absolute Maximum Ratings

The following table provides the absolute maximum ratings for the ATWINC3400-MR210CA module.

Table 4-1. ATWINC3400-MR210CA Module Absolute Maximum Ratings

Symbol Parameter Min. Max. Unit

VDDIO I/O supply voltage -0.3 5.0 V

VBAT Battery supply voltage -0.3 5.0

ATWINC3400-MR210CA

AIN

ESDHBM

Digital input voltage -0.3 VDDIO

Analog input voltage -0.3 1.5

Eelectrostatic dischage Human Body Model

-1000, -2000 (see notes below)

+1000, +2000 (see

notes below)

(HBM)

Storage temperature -65 150 ºC

- Junction temperature - 125

- RF input power - 23 dBm

1. VIN corresponds to all the digital pins.

2. For V

ESDHBM

, each pin is classified as Class 1, or Class 2, or both:

2.1. The Class 1 pins include all the pins (both analog and digital).

2.2. The Class 2 pins include all digital pins only.

2.3. V

ESDHBM

is ±1 kV for Class 1 pins. V

ESDHBM

is ± 2 kV for Class 2 pins.

Caution: Stresses beyond those listed under “Absolute Maximum Ratings” cause permanent damage to the device. This is a stress rating only. The functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods affects the device reliability.

4.2 Recommended Operating Conditions

The following table provides the recommended operating conditions for the ATWINC3400-MR210CA module.

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Table 4-2. ATWINC3400-MR210CA Module Recommended Operating Conditions

Symbol Parameter Min. Typ. Max. Units

VDDIO I/O supply voltage

VBAT Battery supply voltage

- Operating temperature -40 - 85

Note:

1. I/O supply voltage is applied to the VDDIO pin.

2. Battery supply voltage is applied to the VBAT pin.

3. The ATWINC3400-MR210CA module is functional across this range of voltages; however, optimal RF performance is guaranteed for VBAT in the range ≥ 3.0V VBAT ≤ 4.2V.

4.3 DC Characteristics

The following table provides the DC characteristics for the ATWINC3400-MR210CA module digital pads.

Table 4-3. DC Electrical Characteristics

(1)

(2)(3)

ATWINC3400-MR210CA

2.7 3.3 3.6 V

3.0 3.6 4.2 V

Symbol Parameter Min Typ Max Unit

Input Low

-0.30 - 0.60 V

Voltage

Input High

VDDIO-0.60 - VDDIO+0.30

Voltage

Output Low

- - 0.45

Voltage

Output High

VDDIO-0.50 - -

Voltage

- Output Load

- - 20 pF

Capacitance

- Digital Input

- - 6 Load Capacitance

4.4 IEEE 802.11 b/g/n Radio Performance

4.4.1 Receiver Performance

The receiver performance is tested under following conditions:

• VBAT = 3.3V

• VDDIO = 3.3V

• Temp = 25°C

• Measured after RF matching network

The following table provides the receiver performance characteristics for the ATWINC3400-MR210CA module.

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ATWINC3400-MR210CA

Table 4-4. IEEE 802.11 Receiver Performance Characteristics

Parameter Description Min. Typ. Max. Unit

Frequency - 2,412 - 2,472 MHz

Sensitivity 802.11b 1 Mbps DSSS - -95.0 - dBm

2 Mbps DSSS - -93.5 -

5.5 Mbps DSSS - -90.0 -

11 Mbps DSSS - -86.0 -

Sensitivity 802.11g 6 Mbps OFDM - -90.0 - dBm

9 Mbps OFDM - -88.5 -

12 Mbps OFDM - -86.0 -

18 Mbps OFDM - -84.5 -

24 Mbps OFDM - -82.0 -

36 Mbps OFDM - -78.5 -

48 Mbps OFDM - -74.5 -

Sensitivity 802.11n (BW=20 MHz, 800ns GI)

Maximum receive signal level

Adjacent channel rejection

54 Mbps OFDM - -73.0 -

MCS 0 - -89.0 - dBm

MCS 1 - -87.0 -

MCS 2 - -84.0 -

MCS 3 - -81.5 -

MCS 4 - -78.0 -

MCS 5 - -74.0 -

MCS 6 - -72.0 -

MCS 7 - -70.0 -

1-11 Mbps DSSS - 0 - dBm

6-54 Mbps OFDM - 0 -

MCS 0 - 7 (800ns GI) - 0 -

1 Mbps DSSS (30 MHz offset) - 50 - dB

11 Mbps DSSS (25 MHz offset) - 43 -

6 Mbps OFDM (25 MHz offset) - 40 -

54 Mbps OFDM (25 MHz offset) - 25 -

MCS 0 – 20 MHz BW (25 MHz offset)

MCS 7 – 20 MHz BW (25 MHz offset)

- 40 -

- 20 -

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4.4.2 Transmitter Performance

The transmitter performance is tested under following conditions:

• VBAT = 3.3V

• VDDIO = 3.3V

• Temp = 25°C

The following table provides the transmitter performance characteristics for the ATWINC3400-MR210CA module.

Table 4-5. IEEE 802.11 Transmitter Performance Characteristics

Parameter Description Minimum Typical Max. Unit

Frequency - 2,412 - 2,472 MHz

Output power 802.11b 1 Mbps - 16.7

Tx power accuracy - - ±1.5

ATWINC3400-MR210CA

802.11b 11 Mbps - 17.5

802.11g OFDM 6 Mbps - 18.3

802.11g OFDM 54 Mbps - 13.0

802.11n HT20 MCS 0 (800ns GI)

802.11n HT20 MCS 7 (800ns GI)

- 17.5

- 12.5

(1)

(2)

- dBm

- dB

Carrier suppression - - 30.0 - dBc

Harmonic output power (Radiated, Regulatory mode)

Note:

1. Measured at IEEE 802.11 specification compliant EVM/Spectral mask.

2. Measured after RF matching network.

3. Operating temperature range is -40°C to +85°C. RF performance guaranteed at room temperature of 25°C with a 2-3dB change at boundary conditions.

4. With respect to Tx power, different (higher/lower) RF output power settings may be used for specific antennas and/or enclosures, in which case recertification may be required.

5. The availability of some specific channels and/or operational frequency bands are country dependent and should be programmed at the host product factory to match the intended destination. Regulatory bodies prohibit exposing the settings to the end user. This requirement needs to be taken care of via host implementation.

4.5 Bluetooth Radio Performance

4.5.1 Receiver Performance

The receiver performance is tested under following conditions:

• VBAT = 3.3V

- - -41 dBm/MHz

- - -41

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ATWINC3400-MR210CA

• VDDIO = 3.3V

• Temp: 25°C

• Measured after RF matching network.

The following table provides the Bluetooth receiver performance characteristics for the ATWINC3400MR210CA module.

Table 4-6. Bluetooth Receiver Performance Characteristics

Parameter Description Min. Typ. Max. Unit

Frequency - 2,402 - 2,480 MHz

Sensitivity (ideal Tx) Bluetooth Low Energy (GFSK) - -92.5 - dBm

Maximum receive signal level

Interference performance (Bluetooth Low Energy)

4.5.2 Transmitter Performance

The transmitter performance is tested under following conditions:

• VBAT = 3.3V

• VDDIO = 3.3V

• Temp: 25°C

• Measured after RF matching network.

Bluetooth Low Energy (GFSK) - -3.5 -

Co-channel - 12 dB

adjacent + 1 MHz - 0 -

adjacent - 1 MHz - 3 -

adjacent + 2 MHz(image frequency)

adjacent - 2 MHz - -41 -

adjacent + 3 MHz (adjacent to image)

adjacent - 3 MHz - -35 -

adjacent + 4 MHz - -45 -

adjacent - 4 MHz - -30 -

adjacent +5 MHz - -34 -

adjacent - 5 MHz - -30 -

- -25 -

- -35 -

The following table provides the Bluetooth transmitter performance characteristics for the ATWINC3400MR210CA module.

Table 4-7. Bluetooth Transmitter Performance Characteristics

Parameter Description Min. Typ. Max. Unit

Frequency - 2,402 - 2,480 MHz

Output power Bluetooth Low Energy (GFSK) - 3.2 3.7 dBm

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ATWINC3400-MR210CA

Parameter Description Min. Typ. Max. Unit

In-band spurious emission (Bluetooth Low Energy)

4.6 Timing Characteristics

4.6.1 I2C Slave Timing

The I2C Slave timing diagram for the ATWINC3400-MR210CA module is shown in the following figure.

Figure 4-1. I2C Slave Timing Diagram

N+2 (Image frequency) - -33 -

N + 3 (Adjacent to image

- -32 -

frequency)

N-2 - -50 -

N-3 - -49 -

The following table provides the I2C Slave timing parameters for the ATWINC3400-MR210CA module.

Table 4-8. I2C Slave Timing Parameters

Parameter Symbol Min. Max. Units Remarks

SCL Clock Frequency f

SCL Low Pulse Width t

SCL High Pulse Width t

SCL, SDA Fall Time t

SCL, SDA Rise Time t

START Setup Time t

START Hold Time t

SDA Setup Time t

SDA Hold Time t

SCL

SUSTA

HDSTA

SUDAT

HDDAT

Draft Datasheet Preliminary

0 400 kHz -

1.3 -

µs

0.6 - -

- 300

0.6 -

This is dictated by external components

µs

0.6 - -

100 - ns -

0 - ns Slave and Master Default

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ATWINC3400-MR210CA

Parameter Symbol Min. Max. Units Remarks

STOP Setup Time t

Bus Free Time Between STOP and START

Glitch Pulse Reject t

4.6.2 SPI Slave Timing

The SPI Slave timing for the ATWINC3400-MR210CA module is provided in the following figures.

Figure 4-2. SPI Slave Clock Polarity and Clock Phase Timing

SUSTO

BUF

40 - µs

Master Programming Option

0.6 -

µs

1.3 - -

0 50 ns -

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Figure 4-3. SPI Slave Timing Diagram

ATWINC3400-MR210CA

The following table provides the SPI Slave timing parameters for the ATWINC3400-MR210CA module.

Table 4-9. SPI Slave Timing Parameters

(1)

Parameter Symbol Min. Max. Unit

(3)

(2)

SCK

ODLY

- 48 MHz

6 - ns

4 -

0 7

3 9 from SCK fall

Clock Input Frequency

Clock Low Pulse Width t

Clock High Pulse Width t

Clock Rise Time t

Clock Fall Time t

TXD Output Delay

11 from SCK rise

RXD Input Setup Time t

RXD Input Hold Time t

ISU

IHD

3 -

5 -

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ATWINC3400-MR210CA

Parameter Symbol Min. Max. Unit

SSN Input Setup Time t

SSN Input Hold Time t

Note:

1. Timing is applicable to all SPI modes.

2. Maximum clock frequency specified is limited by the SPI Slave interface internal design; actual maximum clock frequency can be lower and depends on the specific PCB layout.

3. Timing based on 15 pF output loading.

4.6.3 SPI Master Timing

The SPI Master timing for the ATWINC3400-MR210CA module is shown in the following figure.

Figure 4-4. SPI Master Timing Diagram

SUSSN

HDSSN

5 -

The following table provides the SPI Master timing parameters for the ATWINC3400-MR210CA module .

Table 4-10. SPI Master Timing Parameters

(1)

Parameter Symbol Min. Max. Unit

(3)

(2)

SCK

ISU

IHD

ODLY

- 20 MHz

19 - ns

21 -

- 11

- 10

24 -

0 -

-5 3

Clock Output Frequency

Clock Low Pulse Width t

Clock High Pulse Width t

Clock Rise Time

Clock Fall Time

(3)

RXD Input Setup Time t

RXD Input Hold Time t

SSN/TXD Output Delay

Note:

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ATWINC3400-MR210CA

1. Timing is applicable to all SPI modes.

2. Maximum clock frequency specified is limited by the SPI Master interface internal design; actual maximum clock frequency can be lower and depends on the specific PCB layout.

3. Timing based on 15 pF output loading.

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5. Power Management

5.1 Device States

The ATWINC3400-MR210CA module has multiple device states, based on the state of the IEEE 802.11 and Bluetooth subsystems. It is possible for both subsystems to be active at the same time. To simplify the device power consumption breakdown, the following basic states are defined. One subsystem can be active at a time:

• WiFi_ON_Transmit – Device actively transmits IEEE 802.11 signal

• WiFi_ON_Receive – Device actively receives IEEE 802.11 signal

• BT_ON_Transmit – Device actively transmits Bluetooth signal

• BT_ON_Receive – Device actively receives Bluetooth signal

• Doze – Device is powered on but it does not actively transmit or receive data

• Power_Down – Device core supply is powered off

5.2 Controlling Device States

The following table shows different device states and its power consumption. The device states can be switched using the following:

ATWINC3400-MR210CA

• CHIP_EN – Module pin (pin 19) enables or disables the DC/DC converter

• VDDIO – I/O supply voltage from external supply

In the ON states, VDDIO is ON and CHIP_EN is high (at VDDIO voltage level). To change from the ON states to Power_Down state, connect the RESETN and CHIP_EN pin to logic low (GND) by following the power-down sequence mentioned in Figure 5-1. When VDDIO is OFF and CHIP_EN is low, the chip is powered off with no leakage.

Table 5-1. ATWINC3400-MR210CA Device States Current Consumption

VDDIO

(1)

Device State Code Rate

ON_WiFi_Transmit 802.11b 1 Mbps 16.7 271 mA 24 mA

802.11b 11 Mbps 17.5 265 mA 24 mA

802.11g 6 Mbps 18.3 275 mA 24 mA

802.11g 54 Mbps 13.0 235 mA 24 mA

802.11n MCS 0 17.5 272 mA 24 mA

802.11n MCS 7 12.5 232 mA 24 mA

ON_WiFi_Receive 802.11b 1 Mbps N/A 63.9 mA 23.7 mA

802.11b 11 Mbps N/A 63.9 mA 23.7 mA

Output Power

(dBm)

Current Consumption

VBAT

802.11g 6 Mbps N/A 63.9 mA 23.7 mA

802.11g 54 Mbps N/A 63.9 mA 23.7 mA

802.11n MCS 0 N/A 63.9 mA 23.7 mA

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VBATT

VDDIO

CHIP_EN

RESETN

XO Clock

ATWINC3400-MR210CA

Device State Code Rate

Output Power

(dBm)

Current Consumption

VBAT

VDDIO

(1)

802.11n MCS 7 N/A 63.9 mA 23.7 mA

ON_BT_Transmit

BLE 4.0 1 Mbps 1.5 79.37 mA 23.68 mA

(@3.2 dBm Pout)

ON_BT_Receive BLE 4.0 1 Mbps N/A 51.36 mA 23.68 mA

Doze (Bluetooth Low

N/A N/A 53 mA

(2)

Energy Idle)

Doze (Bluetooth Low

N/A N/A 1 mA

(2)

Energy Low Power)

Power_Down N/A N/A 10.5 uA

(2)

Note:

1. Conditions: VBAT = 3.3V, VDDIO = 3.3V, at 25°C.

2. Current consumption mentioned for these states is the sum of current consumed in VDDIO and VBAT voltage rails.

When power is not supplied to the device (DC/DC converter output and VDDIO are OFF, at ground potential), voltage cannot be applied to the ATWINC3400-MR210CA module pins because each pin contains an ESD diode from the pin to supply. This diode turns on when voltage higher than one diodedrop is supplied to the pin.

If voltage must be applied to the signal pads when the chip is in a low-power state, the VDDIO supply must be ON, so the Power_Down state must be used. Similarly, to prevent the pin-to-ground diode from turning ON, do not apply voltage that is more than one diode-drop below the ground to any pin.

5.3 Power-Up/Down Sequence

The following figure illustrates the power-up/down sequence for the ATWINC3400-MR210CA module.

Figure 5-1. Power-Up/Down Sequence

The following table provides power-up/down sequence timing parameters.

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DS00000000A-page 22

Table 5-2. Power-Up/Down Sequence Timing

ATWINC3400-MR210CA

Paramet

A’

B’

C’

Min. Max.

Unit

Description Notes

0 - ms VBAT rise to

VDDIO rise

0 - ms VDDIO rise to

CHIP_EN rise

5 - ms CHIP_EN rise to

RESETN rise

0 - ms VDDIO fall to

VBAT fall

0 - ms CHIP_EN fall to

VDDIO fall

0 - ms RESETN fall to

VDDIO fall

VBAT and VDDIO can rise simultaneously or connected together. VDDIO must not rise before VBAT.

CHIP_EN must not rise before VDDIO. CHIP_EN must be driven high or low and must not be left floating.

This delay is required to stabilize the XO clock before RESETN removal. RESETN must be driven high or low and must not be left floating.

VBAT and VDDIO fall simultaneously or connected together. VBAT must not fall before VDDIO.

VDDIO must not fall before CHIP_EN. CHIP_EN and RESETN must fall simultaneously.

VDDIO must not fall before RESETN. RESETN and CHIP_EN fall simultaneously.

5.4 Digital I/O Pin Behavior During Power-Up Sequences

The following table represents the digital I/O pin states corresponding to the device power modes.

Table 5-3. Digital I/O Pin Behavior in Different Device States

Device State VDDIO

Power_Down: core supply OFF

Power-On Reset: core supply and hard reset ON

Power-On Default: core supply ON, device out of reset and not programmed

On_Doze/ On_Transmit/ On_Receive: core supply ON, device programmed by firmware

High Low Low Disabled (Hi-Z) Disabled Disabled

High High Low Disabled (Hi-Z) Disabled Enabled

High High High Disabled (Hi-Z) Enabled Enabled

High High High Programmed

CHIP_ENRESET

Output Driver

by firmware for each pin: enabled or disabled

Input

Driver

Opposite of Output Driver state

Pull Up/Down

Resistor (96

kOhm)

Programmed by firmware for each pin: enabled or disabled

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6. Clocking

6.1 Low-Power Clock

The ATWINC3400-MR210CA module requires an external 32.768 kHz clock to be supplied at the module pin 20. This clock is used during the sleep operation. The frequency accuracy of this external clock must be within ±200 ppm.

ATWINC3400-MR210CA

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7. CPU and Memory Subsystem

7.1 Processor

The ATWINC3400-MR210CA module has two Cortus APS3 32-bit processors, one is used for Wi-Fi and the other is used for Bluetooth. In IEEE 802.11 mode, the processor performs many of the MAC functions, including but not limited to: association, authentication, power management, security key management, and MSDU aggregation/de-aggregation. In addition, the processor provides flexibility for various modes of operation, such as Station (STA) and Access Point (AP) modes. In Bluetooth mode, the processor handles multiple tasks of the Bluetooth protocol stack.

7.2 Memory Subsystem

The APS3 core uses a 256 KB instruction/boot ROM (160 KB for IEEE 802.11 and 96 KB for Bluetooth) along with a 420 KB instruction RAM (128 KB for IEEE 802.11 and 292 KB for Bluetooth), and a 128 KB data RAM (64 KB for IEEE 802.11 and 64 KB for Bluetooth). In addition, the device uses a 160 KB shared/exchange RAM (128 KB for IEEE 802.11 and 32 KB for Bluetooth), accessible by the processor and MAC, which allows the processor to perform various data management tasks on the Tx and Rx data packets.

ATWINC3400-MR210CA

7.3 Nonvolatile Memory

The ATWINC3400-MR210CA module has 768 bits of nonvolatile eFuse memory that can be read by the CPU after device reset. This nonvolatile One-Time-Programmable (OTP) memory can be used to store customer-specific parameters, such as 802.11 MAC address and Bluetooth address; various calibration information such as Tx power, crystal frequency offset, and other software-specific configuration parameters. The eFuse is partitioned into six 128-bit banks. The bit map of the first and last banks is shown in the following figure. The purpose of the first 80 bits in bank 0 and the first 56 bits in bank 5 is fixed, and the remaining bits are general-purpose software dependent bits, reserved for future use. Currently, the Bluetooth address is derived from the Wi-Fi MAC address (BT_ADDR=MAC_ADDR+1). This eliminates the need to program the first 56 bits in bank 5. Since each bank and each bit can be programmed independently, this allows for several updates of the device parameters following the initial programming. For example, if the MAC address has to be changed, Bank 1 has to be programmed with the new MAC address along with the values of Tx gain correction and frequency offset if they are used and programmed in the Bank 0. The contents of Bank 0 have to be invalidated in this case by programming the Invalid bit in the Bank 0. This will allow the firmware to use the MAC address from Bank

By default, ATWINC3400-MR210CA modules are programmed with the MAC address and the frequency offset bits of Bank 0.

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Figure 7-1. ATWINC3400-MR210CA eFuse Bit Map

ATWINC3400-MR210CA

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8. WLAN Subsystem

The WLAN subsystem is composed of the Media Access Controller (MAC), Physical Layer (PHY), and the radio.

8.1 MAC

The ATWINC3400-MR210CA module is designed to operate at low power, while providing high data throughput. The IEEE 802.11 MAC functions are implemented with a combination of dedicated datapath engines, hardwired control logic, and a low power, high-efficiency microprocessor. The combination of dedicated logic with a programmable processor provides optimal power efficiency and real time response while providing the flexibility to accommodate evolving standards and future feature enhancements.

The dedicated datapath engines are used to implement datapath functions with heavy computational requirements. For example, a Frame Check Sequence (FCS) engine checks the Cyclic Redundancy Check (CRC) of the transmitting and receiving packets, and a cipher engine performs all the required encryption and decryption operations for the WEP, WPA-TKIP, and WPA2 CCMP-AES security requirements.

Control functions, which have real time requirements, are implemented using hardwired control logic modules. These logic modules offer real time response while maintaining configurability through the processor. Examples of hardwired control logic modules are the channel access control module (implements EDCA/HCCA, Beacon Tx control, interframe spacing, and so on), protocol timer module (responsible for the Network Access vector, back-off timing, timing synchronization function, and slot management), MAC Protocol Data Unit (MPDU) handling module, aggregation/deaggregation module, block ACK controller (implements the protocol requirements for burst block communication), and Tx/Rx control Finite State Machine (FSM) (coordinates data movement between PHY and MAC interface, cipher engine, and the Direct Memory Access (DMA) interface to the Tx/Rx FIFOs).

ATWINC3400-MR210CA

The following are the characteristics of MAC functions implemented solely in software on the microprocessor:

• Functions with high memory requirements or complex data structures. Examples include association table management and power save queuing.

• Functions with low computational load or without critical real time requirements. Examples include authentication and association.

• Functions that require flexibility and upgradeability. Examples include beacon frame processing and QoS scheduling.

Features

The ATWINC3400-MR210CA MAC supports the following functions:

• IEEE 802.11b/g/n

• IEEE 802.11e WMM QoS EDCA/HCCA/PCF multiple access categories traffic scheduling

• Advanced IEEE 802.11n features:

– Transmission and reception of aggregated MPDUs (A-MPDU)

– Transmission and reception of aggregated MSDUs (A-MSDU)

– Immediate block acknowledgment

– Reduced Interframe Spacing (RIFS)

• IEEE 802.11i and WFA security with key management:

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• Advanced power management:

• RTS-CTS and CTS-self support

• Either STA or AP mode in the infrastructure basic service set mode

8.2 PHY

The ATWINC3400-MR210CA module WLAN PHY is designed to achieve reliable and power-efficient physical layer communication specified by IEEE 802.11 b/g/n in single stream mode with 20 MHz bandwidth. The advanced algorithms are used to achieve maximum throughput in a real world communication environment with impairments and interference. The PHY implements all the required functions such as Fast Fourier Transform (FFT), filtering, Forward Error Correction (FEC) that is a Viterbi decoder, frequency, timing acquisition and tracking, channel estimation and equalization, carrier sensing, clear channel assessment and automatic gain control.

Features

ATWINC3400-MR210CA

– WEP 64/128

– WPA-TKIP

– 128-bit WPA2 CCMP (AES)

– Standard IEEE 802.11 power save mode

The IEEE 802.11 PHY supports the following functions:

• Single antenna 1x1 stream in 20 MHz channels

• Supports IEEE 802.11b DSSS-CCK modulation: 1, 2, 5.5, and 11 Mbps

• Supports IEEE 802.11g OFDM modulation: 6, 9, 12,18, 24, 36, 48, and 54 Mbps

• Supports IEEE 802.11n HT modulations MCS0-7, 20 MHz, 800 and 400ns guard interval: 6.5, 7.2,

• IEEE 802.11n mixed mode operation

• Per packet Tx power control

• Advanced channel estimation/equalization, automatic gain control, CCA, carrier/symbol recovery

8.3 Radio

This section presents information describing the properties and characteristics of the ATWINC3400MR210CA and Wi-Fi radio transmit and receive performance capabilities of the device.

The performance measurements are taken at the RF pin assuming 50Ω impedance; the RF performance is guaranteed for room temperature of 25oC with a derating of 2-3 dB at boundary conditions.

Measurements were taken under typical conditions: VBATT=3.3V; VDDIO=3.3V; temperature: +25ºC

Table 8-1. Features and Properties

13.0, 14.4, 19.5, 21.7, 26.0, 28.9, 39.0, 43.3, 52.0, 57.8, 58.5, 65.0, and 72.2 Mbps

and frame detection

Feature Description

Part Number ATWINC3400-MR210CA

WLAN Standard IEEE 802.11 b/g/n, Wi-Fi compliant

Host Interface SPI

Dimension 22.4 x 14.7 x 2.0 mm

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DS00000000A-page 28

ATWINC3400-MR210CA

Feature Description

Frequency Range 2.412GHz ~ 2.472GHz (2.4GHz ISM Band)

Number of Channels 11 for North America, and 13 for Europe and Japan

Modulation 802.11b: DQPSK, DBPSK, CCK

802.11g/n: OFDM /64-QAM,16-QAM, QPSK, BPSK

Data Rate 802.11b: 1, 2, 5.5, 11Mbps

802.11g: 6, 9, 12, 18, 24, 36, 48, 54Mbps

Data Rate (20 MHz, normal GI, 800 ns)

Data Rate (20 MHz, short GI, 400 ns)

Operating temperature -40 to +85oC

802.11n: 6.5, 13, 19.5, 26, 39, 52, 58.5, 65Mbps

802.11n: 7.2, 14.4, 21.7, 28.9, 43.3, 57.8, 65,72.2Mbps

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9. Bluetooth Low Energy 4.0

The Bluetooth subsystem implements all the mission critical real-time functions. It encodes/decodes HCI packets, constructs baseband data packages, manages, and monitors the connection status, slot usage, data flow, routing, segmentation, and buffer control. The Bluetooth subsystem supports Bluetooth Low Energy modes of operation.

Supports the following advanced low energy applications:

• Smart energy

• Consumer wellness

• Home automation

• Security

• Proximity detection

• Entertainment

• Sports and Fitness

• Automotive

ATWINC3400-MR210CA

Draft Datasheet Preliminary

DS00000000A-page 30

10. External Interfaces

Host

Microcontroller

CHIP_EN

RESET

WAKE

IRQN

SPI

Wi-Fi Controller

Module

10.1 Interfacing with the Host Microcontroller

This section describes about interfacing the ATWINC3400-MR210CA module with the host microcontroller. The interface comprises of a slave SPI and additional control signals, as shown in the following figure. For more information on SPI interface specification and timing, refer SPI Interface. Additional control signals are connected to the GPIO/IRQ interface of the microcontroller.

Figure 10-1. Interfacing with Host Microcontroller

ATWINC3400-MR210CA

Table 10-1. Host Microcontroller Interface Pins

Pin Number Function

4 RESET_N

11 WAKE

13 IRQ_N

22 CHIP_EN

16 SPI_SSN

15 SPI_MOSI

17 SPI_MISO

18 SPI_SCK

10.2 SPI Interface

10.2.1 Overview

The ATWINC3400-MR210CA has a Serial Peripheral Interface (SPI) that operates as an SPI slave. The SPI interface can be used for control and for serial I/O of 802.11 data. The SPI pins are mapped as shown in the following table. The SPI is a full-duplex slave-synchronous serial interface that is available immediately following reset when pin 10 (SPI_CFG) is tied to VDDIO.

Table 10-2. SPI Interface Pin Mapping

Pin # SPI function

10 CFG: Must be tied to VDDIO

16 SSN: Active Low Slave Select

15 MOSI(RXD): Serial Data Receive

18 SCK: Serial Clock

17 MISO(TXD): Serial Data Transmit

ATWINC3400-MR210CA

When the SPI is not selected, that is, when SSN is high, the SPI interface will not interfere with data transfers between the serial-master and other serial-slave devices. When the serial slave is not selected, its transmitted data output is buffered, resulting in a high impedance drive onto the MISO line.

The SPI interface responds to a protocol that allows an external host to read or write any register in the chip as well as initiate DMA transfers.

The SPI SSN, MOSI, MISO, and SCK pins of the ATWINC3400-MR210CA have internal programmable pull-up resistors. These resistors should be programmed to be disabled. Otherwise, if any of the SPI pins are driven to a low level while the ATWINC3400-MR210CA is in the low-power sleep state, the current will flow from the VDDIO supply through the pull-up resistors, increasing the current consumption of the module.

10.2.2 SPI Timing

The SPI Slave interface supports four standard modes as determined by the Clock Polarity (CPOL) and Clock Phase (CPHA) settings. These modes are illustrated in the following table and figure.

Table 10-3. SPI Slave Modes

Mode CPOL CPHA

0 0 0

1 0 1

2 1 0

3 1 1

The red lines in the following figure correspond to Clock Phase = 0 and the blue lines correspond to Clock Phase = 1.

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DS00000000A-page 32

z z

SCK

CPOL = 0

CPOL = 1

SSN

RXD/TXD

(MOSI/MISO)

CPHA = 0

CPHA = 1

2 3 4 5 6 7 8

1 2 3 4 5 6 7

SCK

TXD

RXD

ODLY

ISU

IHD

SCK

SSN

SUSSN

HDSSN

ATWINC3400-MR210CA

Figure 10-2. SPI Slave Clock Polarity and Clock Phase Timing

The SPI timing is provided in the following figure and table.

Figure 10-3. SPI Timing Diagram (SPI Mode CPOL=0, CPHA=0)

SCK

ODLY

— 48 MHz

4 —

5 —

0 7

4 9 from SCK fall

12.5 from SCK

Table 10-4. SPI Slave Timing Parameters

Parameter Symbol Min. Max. Units

Clock Input Frequency

Clock Low Pulse Width t

Clock High Pulse Width t

Clock Rise Time t

Clock Fall Time t

TXD Output Delay

rise

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DS00000000A-page 33

Packets or

Leading Idle Bits

Current Packet

Data

Start

Bit

Parity

Bit

Stop Bits

Packet

ATWINC3400-MR210CA

Parameter Symbol Min. Max. Units

RXD Input Setup Time t

RXD Input Hold Time t

SSN Input Setup Time t

SSN Input Hold Time t

Note:

1. Timing is applicable to all SPI modes

2. Maximum clock frequency specified is limited by the SPI Slave interface internal design, actual maximum clock frequency can be lower and depends on the specific PCB layout

3. Timing based on 15pF output loading

10.3 UART Interface

The ATWINC3400-MR210CA supports the Universal Asynchronous Receiver/Transmitter (UART) interface. This interface should be used for debug purposes only. The UART is available on pins 14 and

19. The UART is compatible with the RS-232 standard, and the ATWINC3400-MR210CA operates as Data Terminal Equipment (DTE). It has a two-pin RXD/TXD interface.

The default configuration for accessing the UART interface of ATWINC3400-MR210CA is mentioned below:

• Baud rate: 115200

• Data: 8 bit

• Parity: None

• Stop bit: 1 bit

• Flow control: None

ISU

IHD

SUSSN

HDSSN

1 —

5 —

3 —

5.5 —

It also has RX and TX FIFOs, which ensure reliable high-speed reception and low software overhead transmission. FIFO size is 4 x 8 for both RX and TX direction. The UART also has status registers showing the number of received characters available in the FIFO and various error conditions, as well the ability to generate interrupts based on these status bits.

An example of the UART receiving or transmitting a single packet is shown in the following figure. This example shows 7-bit data (0x45), odd parity, and two stop bits.

Important: UART2 supports RTS and CTS flow control. The UART RTS and UART CTS MUST be connected to the host MCU UART and enabled for the UART interface to be functional.

Figure 10-4. Example of UART RX of TX Packet

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11. Application Reference Design

R5 0

R90

R3 0

R20

R8 0

TP2

R100

ATWINC 3400-MR210

I2C_SC L_M

J34

I2C_SD A_M

J35

RESETN

NC1 J3NC2 J4NC3 J5NC4

GND5

J36

SDIO~_SPI_C FG

GND1

IRQN

J33

UART_TxD

J16

SPI_MOSI

J26

SPI_SSN

J25

SPI_MISO

J24

SPI_SCK

J23

UART_Rx D

J17

VBAT

J18

CHI P_EN

J19

VDDI O

J12

GPIO3

J14

GPIO4

J15

GND3

J22

GND4

J28

BT_TXD

BT_RXD

BT_RTS

J10

BT_CTS

J11

GPIO17

J29

GPIO18

J30

GPIO19

J31

GND2

J13

GPIO7

J27

GPIO20

J32

GND_PAD

J49

RTC

J20

R6 0

R1 1M

R4 0

R7 0

TP1

SPI_SSN

SPI_MISO

SPI_SCK

SPI_MOSI

Reset _N

Chip_EN

UART_TxD

UART_Rx D

GPIO_17

IRQN

VBAT

GPIO_4

GPIO_7

VDDI O

To h os t U AR T output

To h os t U AR T in put

(General Purpos e I/O)

To hos t SP I M as ter

R esistors R 2 - R 14 are rec om m ended as p lac eho lders in ca se filtering of nois y s ignals is required. They als o allo w dis con nec ting of mo dule for debug purpos es .

GPIO_3

GPIO_19

GPIO_20

GPIO_18

(T o hos t G PIO)

R12 0

R11 0

BT_RTS

BT_CTS

To Host Input To Host Outpu t

BT_TxD

BT_RxD

To Host Input To Host Outpu t

R14 0

R13 0

0.1uF

32.768KHz

VSS

VDD

VDDI O

The ATWINC3400-MR210CA module application schematics for different supported host interfaces are shown in this section.

11.1 Host Interface - SPI

Figure 11-1. ATWINC3400-MR210CA Reference Schematic

ATWINC3400-MR210CA

Note: It is recommended to add test points for module pins J8, J9, J10, J11, J16 and J17 in the design.

The following table provides the reference Bill of Material (BoM) details for the ATWINC3400-MR210CA module with SPI as host interface.

Table 11-1. ATWINC3400-MR210CA Reference Bill of Materials for SPI Operation

Item Quantity ReferenceValue Description Manufacturer Part

1 1 U1 ATWINC3400-

MR210CA

Wi-Fi/ Bluetooth/BLE

Draft Datasheet Preliminary

Microchip Technology

Inc.

Number

ATWINC340 0-MR210CA

Footprint

Custom

DS00000000A-page 35

ATWINC3400-MR210CA

Item Quantity ReferenceValue Description Manufacturer Part

Number

Combo Module

2 1 U2 ASH7KW-32.

768kHZ-L-T

3 1 R1 1M RESISTOR,

4 13 R2-R14 0 RESISTOR,

Oscillator,

32.768 kHz, +0/-175 ppm,

1.2V - 5.5V,

-40°C - +85°C

Thick Film, 1 MOhm, 0201

Thick Film, 0 Ohm, 0201

Abracon Corporation

Panasonic ERJ-1GEJ1

Panasonic ERJ-1GN0R

ASH7KW-3

2.768kHZ-LT

05C

00C

Footprint

OSCCC32 0X150X10 0-4N

RS0201

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12. Module Outline Drawings

ATWINC3400-MR210CA

Untoleranced dimensions

The ATWINC3400-MR210CA module package details are outlined in the following figure.

Figure 12-1. ATWINC3400-MR210CA Footprint and Module Package Drawings - Top , Bottom and Side View

ATWINC3400-MR210CA

Note:

1. Dimensions are in mm.

2. It is recommended to have a 5x5 grid of GND vias solidly connecting the exposed GND paddle of the module to the ground plane on the inner/other layers of the host board. This will provide a good ground and thermal transfer for the ATWINC3400-MR210CA module.

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13. Design Consideration

This section provides the guidelines on module placement and routing to achieve the best performance.

13.1 Module Placement and Routing Guidelines

It is critical to follow the recommendations listed below to achieve the best RF performance:

• The module must be placed on the host board and the chip antenna area must not overlap with the host board. The following figure on placement reference shows the best, poor, and worst case module placements in the host board.

Figure 13-1. ATWINC3400-MR210CA Placement Example

ATWINC3400-MR210CA

Caution: Do not place the module in the middle of the host board or far away from the

host board edge.

• Follow the host board mechanical recommendation, ground plane and keep out recommendations as shown in the following figure. Module chip antenna is specifically tuned for this host board mechanical recommendation as shown in the following figure. The host PCB should have a thickness of 1.5 mm

– Follow the module placement and keep out recommendation as shown in the following figure

• Avoid routing any traces on the top layer of the host board which will be directly below the module area.

• In keep out region, there should be no copper traces in all signal layers.

• Avoid placing any components (like mechanical spacers, bumpon and so on) on the host board closer to the chip antenna region.

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• Place GND polygon pour below the module on the top layer of the host board. Avoid breaks in this GND plane, ensure continuous GND plane for better RF performance.

• GND polygon pour in the top layer of the host board should have a minimum area of 20 x 40 mm.

• Place sufficient GND vias on host board edge and below the module for better RF performance.

• It is recommended to have a 5x5 grid of GND vias solidly connecting the exposed GND paddle of the module to the ground plane of the host board. This will act as a good ground and thermal conduction path for the ATWINC3400-MR210CA module. The GND vias should have a minimum via hole size of 0.2 mm.

• Antenna on the module should not be placed in direct contact or close proximity to plastic casing/objects. Keep a minimum clearance of >7 mm in all directions around the chip antenna.

Figure 13-2. ATWINC3400-MR210CA Placement Reference

ATWINC3400-MR210CA

13.2 Antenna Performance

The ATWINC3400-MR210CA uses a chip antenna which is fed via matching network. The table below lists the technical specification of the chip antenna.

Table 13-1. Chip antenna specification

Paramater Value

Peak gain 0.5 dBi

Operating frequency 2400 - 2500 MHz

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ATWINC3400-MR210CA

Paramater Value

Antenna P/N 2450AT18A100

Antenna vendor Johanson Technology

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14. Reflow Profile Information

This section provides the guidelines for the reflow process to get the module soldered to the customer's design.

14.1 Storage Condition

14.1.1 Moisture Barrier Bag Before Opening

A moisture barrier bag must be stored at a temperature of less than 30°C with humidity under 85% RH.

The calculated shelf life for the dry-packed product is 12 months from the date the bag is sealed.

14.1.2 Moisture Barrier Bag Open

Humidity indicator cards must be blue, < 30%.

14.2 Solder Paste

The SnAgCu eutectic solder with melting temperature of 217°C is most commonly used for lead-free solder reflow application. This alloy is widely accepted in the semiconductor industry due to its low cost, relatively low melting temperature, and good thermal fatigue resistance. Some recommended pastes include NC-SMQ® 230 flux and Indalloy® 241 solder paste made up of 95.5 Sn/3.8 Ag/0.7 Cu or SENJU N705-GRN3360-K2-V Type 3, no clean paste.

ATWINC3400-MR210CA

14.3 Stencil Design

The recommended stencil is laser-cut, stainless-steel type with thickness of 100 µm to 130 µm and approximately a 1:1 ratio of stencil opening to pad dimension. To improve paste release, a positive taper with bottom opening 25 µm larger than the top is utilized. Local manufacturing experience may find other combinations of stencil thickness and aperture size to get good results.

14.4 Baking Conditions

This module is rated at MSL level 3. After the sealed bag is opened, no baking is required within 168 hours as long as the devices are held at ≤ 30°C/60% RH or stored at < 10% RH.

The module requires baking before mounting if:

• The sealed bag has been open for more than 168 hours

• The humidity indicator card reads more than 10%

• SIPs need to be baked for eight hours at 125°C

14.5 Soldering and Reflow Condition

Optimization of the reflow process is the most critical factor considered for lead-free soldering. The development of an optimal profile must account the paste characteristics, the size of the board, the density of the components, the mix of the larger and smaller components, and the peak temperature requirements of the components. An optimized reflow process is the key to ensuring a successful leadfree assembly and achieves high yield and long-term solder joint reliability.

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Temperature Profiling

Temperature profiling must be performed for all new board designs by attaching thermocouples at the solder joints, on the top surface of the larger components, and at multiple locations of the boards. This is to ensure that all components are heated to a temperature above the minimum reflow temperatures and the smaller components do not exceed the maximum temperature limit. The SnAgCu solder alloy melts at ~217°C, so the reflow temperature peak at joint level must be 15 to 20°C higher than melting temperature. The targeted solder joint temperature for the SnAgCu solder must be ~235°C. For larger or sophisticated boards with a large mix of components, it is also important to ensure that the temperature difference across the board is less than 10 degrees to minimize board warpage. The maximum temperature at the component body must not exceed the MSL3 qualification specification.

14.5.1 Reflow Oven

It is strongly recommended that a reflow oven equipped with more heating zones and Nitrogen atmosphere must be used for the lead-free assembly. The Nitrogen atmosphere is shown to improve the wet-ability and reduce temperature gradient across the board. It can also enhance the appearance of the solder joints by reducing the effects of oxidation.

The following items must also be observed in the reflow process:

1. Some recommended pastes include:

– NC-SMQ® 230 flux and Indalloy® 241 solder paste made up of 95.5 Sn/3.8 Ag/0.7 Cu

– SENJU N705-GRN3360-K2-V Type 3, no clean paste

2. Allowable reflow soldering iterations:

– Three times based on the following reflow soldering profile (see, following figure).

3. Temperature profile:

– Reflow soldering must be done according to the following temperature profile (see, following

figure).

– Peak temperature: 250°C

ATWINC3400-MR210CA

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Figure 14-1. Solder Reflow Profile

ATWINC3400-MR210CA

Cleaning

The exposed ground paddle helps to self-align the module, avoiding pad misalignment. The use of no clean solder pastes is recommended. As a result of reflow process, ensure to completely dry the no-clean paste fluxes. This may require longer reflow profiles and/or peak temperatures toward the high end of the process window as recommended by the solder paste vendor. It is believed that uncured flux residues can lead to corrosion and/or shorting in accelerated testing and possibly the field.

Rework

The rework removes the mounted SIP package and replaces it with a new unit. It is recommended that once an ATWINC3400-MR210CA module is removed and it must never be reused. During the rework process, the mounted module and PCB are heated partially, and the module is removed. It is recommended to heat-proof the proximity of the mounted parts and junctions and use the best nozzle for rework that is suited to the module size.

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15. Module Assembly Considerations

The ATWINC3400-MR210CA module is assembled with an EMI shield to ensure compliance with EMI emission and immunity rules. The EMI shield is made of a tin-plated steel (SPTE) and is not hermetically sealed. Solutions such as IPA and similar solvents can be used to clean this module. Cleaning solutions containing acid must never be used on the module.

The ATWINC3400-MR210CA module is manufactured without any conformal coating applied. It is the customer's responsibility if a conformal coating is specified and/or applied to this module.

ATWINC3400-MR210CA

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16. Regulatory Approval

Regulatory Approvals received for ATWINC3400-MR210CA:

• United States/FCC ID: 2ADHKWINC3400

• Canada/ISED:

– IC: 20266-ATWINC3400

– HVIN: ATWINC3400-MR210CA

• Europe - CE (Approval pending)

16.1 United States

The ATWINC3400-MR210CA module has received Federal Communications Commission (FCC) CFR47 Telecommunications, Part 15 Subpart C “Intentional Radiators” single-modular approval in accordance with Part 15.212 Modular Transmitter approval. Single-modular transmitter approval is defined as a complete RF transmission sub-assembly, designed to be incorporated into another device, that must demonstrate compliance with FCC rules and policies independent of any host. A transmitter with a modular grant can be installed in different end-use products (referred to as a host, host product, or host device) by the grantee or other equipment manufacturer, then the host product may not require additional testing or equipment authorization for the transmitter function provided by that specific module or limited module device.

ATWINC3400-MR210CA

The user must comply with all of the instructions provided by the Grantee, which indicate installation and/or operating conditions necessary for compliance.

A host product itself is required to comply with all other applicable FCC equipment authorization regulations, requirements, and equipment functions that are not associated with the transmitter module portion. For example, compliance must be demonstrated: to regulations for other transmitter components within a host product; to requirements for unintentional radiators (Part 15 Subpart B), such as digital devices, computer peripherals, radio receivers, etc.; and to additional authorization requirements for the non-transmitter functions on the transmitter module (i.e., Verification or Declaration of Conformity) as appropriate (e.g., Bluetooth and Wi-Fi transmitter modules may also contain digital logic functions).

16.1.1 Labeling And User Information Requirements

The ATWINC3400-MR210CA module has been labeled with its own FCC ID number, and if the FCC ID is not visible when the module is installed inside another device, then the outside of the finished product into which the module is installed must display a label referring to the enclosed module. This exterior label can use wording as follows:

For the ATWINC3400-MR210CA:

Contains Transmitter Module FCC ID: 2ADHKWINC3400

Contains FCC ID: 2ADHKWINC3400

This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation

A user's manual for the finished product should include the following statement:

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This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy, and if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

• Reorient or relocate the receiving antenna

• Increase the separation between the equipment and receiver

• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected

• Consult the dealer or an experienced radio/TV technician for help

Additional information on labeling and user information requirements for Part 15 devices can be found in KDB Publication 784748, which is available at the FCC Office of Engineering and Technology (OET) Laboratory Division Knowledge Database (KDB) https://apps.fcc.gov/oetcf/kdb/index.cfm

16.1.2 RF Exposure

All transmitters regulated by FCC must comply with RF exposure requirements. KDB 447498 General RF Exposure Guidance provides guidance in determining whether proposed or existing transmitting facilities, operations or devices comply with limits for human exposure to Radio Frequency (RF) fields adopted by the Federal Communications Commission (FCC).

ATWINC3400-MR210CA

From the FCC Grant: Output power listed is conducted. This transmitter is restricted for use with the specific antenna(s) tested in this application for Certification.

The antenna(s) used with this transmitter must be installed to provide a separation distance of at least 6.5 cm from all persons and must not be co-located or operating in conjunction with any other antenna or transmitter. Users and installers must be provided with antenna installation instructions and transmitter operating conditions for satisfying RF exposure compliance.

16.1.3 Helpful Web Sites

Federal Communications Commission (FCC): http://www.fcc.gov

FCC Office of Engineering and Technology (OET) Laboratory Division Knowledge Database (KDB):

https://apps.fcc.gov/oetcf/kdb/index.cfm

16.2 Canada

The ATWINC3400-MR210CA module has been certified for use in Canada under Innovation, Science and Economic Development Canada (ISED, formerly Industry Canada) Radio Standards Procedure (RSP) RSP-100, Radio Standards Specification (RSS) RSS-Gen and RSS-247. Modular approval permits the installation of a module in a host device without the need to recertify the device.

16.2.1 Labeling and User Information Requirements

Label Requirements (from RSP-100 Issue 11, Section 3): The host device shall be properly labeled to identify the module within the host device.

The Innovation, Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host device; otherwise, the host product must be labeled to

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ATWINC3400-MR210CA

display the Innovation, Science and Economic Development Canada certification number of the module, preceded by the word “Contains” or similar wording expressing the same meaning, as follows:

For the ATWINC3400-MR210CA:

Contains IC: 20266-ATWINC3400

User Manual Notice for License-Exempt Radio Apparatus (from Section 8.4 RSS-Gen, Issue 4, November 2014): User manuals for license-exempt radio apparatus shall contain the following or equivalent notice in a conspicuous location in the user manual or alternatively on the device or both:

This device complies with Industry Canada license exempt RSS standard(s). Operation is subject to the following two conditions:

(1) This device may not cause interference, and

(2) This device must accept any interference, including interference that may cause undesired operation of the device.

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes:

(1) l'appareil ne doit pas produire de brouillage, et

(2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.

Guidelines on Transmitter Antenna for License Exempt Radio Apparatus:

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication.

Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établisse-ment d'une communication satisfaisante.

16.2.2 RF Exposure

All transmitters regulated by Innovation, Science and Economic Development Canada (ISED) must comply with RF exposure requirements listed in RSS-102 - Radio Frequency (RF) Exposure Compliance of Radio communication Apparatus (All Frequency Bands).

This transmitter is restricted for use with a specific antenna tested in this application for certification, and must not be co-located or operating in conjunction with any other antenna or transmitters within a host device, except in accordance with Canada multi-transmitter product procedures.

The installation of the transmitter must ensure that the antenna has a separation distance of at least 6.5 cm from all persons or compliance must be demonstrated according to the ISED SAR procedures.

16.2.3 Helpful Web Sites

Innovation, Science and Economic Development Canada: http://www.ic.gc.ca/

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16.3 Europe

Note: Pending for an approval.

The ATWINC3400-MR210CA module is a Radio Equipment Directive (RED) assessed radio module that is CE marked and has been manufactured and tested with the intention of being integrated into a final product.

The ATWINC3400-MR210CA module has been tested to RED 2014/53/EU Essential Requirements for Health and Safety (Article (3.1(a)), Electromagnetic Compatibility (EMC) (Article 3.1(b)), and Radio (Article 3.2), which is summarized in the following European Compliance Testing table.

The ETSI provides guidance on modular devices in the “Guide to the application of harmonised standards

covering articles 3.1b and 3.2 of the RED 2014/53/EU (RED) to multi-radio and combined radio and nonradio equipment” document available at http://www.etsi.org/deliver/etsi_eg/203300_203399/20

3367/01.01.01_60/eg_203367v010101p.pdf.

Note: To maintain conformance to the testing listed in the following European Compliance Testing table the module shall be installed in accordance with the installation instructions in this data sheet and shall not be modified. When integrating a radio module into a completed product, the integrator becomes the manufacturer of the final product and is therefore responsible for demonstrating compliance of the final product with the essential requirements against the RED.

ATWINC3400-MR210CA

16.3.1 Labeling and User Information Requirements

The label on the final product that contains the ATWINC3400-MR210CA module must follow CE marking requirements.

Table 16-1. European Compliance Testing

Certification Standards Article LaboratoryReport

Safety EN60950-1:2006/A11:2009/A1:2010/

A12:2011/A2:2013

Health EN300328 V2.1.1/EN62311:2008 50103733 001

EMC EN301489-1 V2.1.1

EN301489-1 V2.2.0

EN301489-17 V3.1.1

EN301489-17 V3.2.0

Radio EN300328 V2.1.1 [3.2] 50103733 001

Date

Number

[3.1. (a)]

[3.1(b)] 10062417 001 30-

TUV Rheinland, Taiwan

10062655 001 30-

Oct-2017

30-

50103734 001

Oct-2017

30Oct-2017

16.3.2 Conformity Assessment

From ETSI Guidance Note EG 203367, section 6.1, when non-radio products are combined with a radio product:

If the manufacturer of the combined equipment installs the radio product in a host non-radio product in equivalent assessment conditions (i.e. host equivalent to the one used for the assessment of the radio product) and according to the installation instructions for the radio product, then no additional assessment of the combined equipment against article 3.2 of the RED is required.

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The European Compliance Testing listed in the preceeding table was performed using the integral chip antenna.

16.3.2.1 Simplified EU Declaration of Conformity

Hereby, Microchip Technology Inc. declares that the radio equipment type ATWINC3400-MR210CA is in compliance with Directive 2014/53/EU.

The full text of the EU declaration of conformity for this product is available at http://www.microchip.com/

design-centers/wireless-connectivity/.

16.3.3 Helpful Websites

A document that can be used as a starting point in understanding the use of Short Range Devices (SRD) in Europe is the European Radio Communications Committee (ERC) Recommendation 70-03 E, which can be downloaded from the European Communications Committee (ECC) at: http://www.ecodocdb.dk/.

Additional helpful web sites are:

• Radio Equipment Directive (2014/53/EU):

https://ec.europa.eu/growth/single-market/european-standards/harmonised-standards/rtte_en

• European Conference of Postal and Telecommunications Administrations (CEPT):

http://www.cept.org

• European Telecommunications Standards Institute (ETSI):

http://www.etsi.org

• The Radio Equipment Directive Compliance Association (REDCA):

http://www.redca.eu/

ATWINC3400-MR210CA

16.4 Other Regulatory Information

• For information about other countries' jurisdictions not covered here, refer to http://

www.microchip.com/ design-centers/wireless-connectivity

• Should other regulatory jurisdiction certification be required by the customer, or the customer needs to recertify the module for other reasons, contact Microchip for the required utilities and documentation

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17. Reference Documentation

The following are the set of collaterals to ease integration and device ramp.

• Wi-Fi Network Controller Software Design Guide Application Note

• Integrated Serial Flash Memory Download Procedure Application Note

• Wi-Fi Network Controller Software Programming Guide Application Note

• ATWINC3400 XPro User Guide

• BLE Example Profiles Applications User Guide

Note:

For a complete listing of development-support tools and documentation, visit http://www.microchip.com/

wwwproducts/en/ATWINC3400 or refer to the customer support section on options to the nearest

Microchip field representative.

ATWINC3400-MR210CA

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18. Document Revision History

Rev A - 10/2017

Section Changes

Document Initial Release

ATWINC3400-MR210CA

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DS00000000A-page 51

ATWINC3400-MR210CA

The Microchip Web Site

Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:

• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software

• General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing

• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives

Customer Change Notification Service

Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest.

To register, access the Microchip web site at http://www.microchip.com/. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.

Customer Support

Users of Microchip products can receive assistance through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

Customers should contact their distributor, representative or Field Application Engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document.

Technical support is available through the web site at: http://www.microchip.com/support

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ATWINC3400-MR210CA

Product Identification System

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Microchip Devices Code Protection Feature

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Legal Notice

Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated.

Trademarks

The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

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ATWINC3400-MR210CA

ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries.

All other trademarks mentioned herein are property of their respective companies.

ISBN:

Quality Management System Certified by DNV

ISO/TS 16949

Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

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Worldwide Sales and Service

AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE

Corporate Office

2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com

Atlanta

Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455

Austin, TX

Tel: 512-257-3370

Boston

Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088

Chicago

Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075

Dallas

Addison, TX Tel: 972-818-7423 Fax: 972-818-2924

Detroit

Novi, MI Tel: 248-848-4000

Houston, TX

Tel: 281-894-5983

Indianapolis

Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380

Los Angeles

Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800

Raleigh, NC

Tel: 919-844-7510

New York, NY

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San Jose, CA

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Canada - Toronto

Tel: 905-695-1980 Fax: 905-695-2078

Asia Pacific Office

Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon

Hong Kong

Tel: 852-2943-5100 Fax: 852-2401-3431

Australia - Sydney

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China - Hong Kong SAR

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China - Nanjing

Tel: 86-25-8473-2460 Fax: 86-25-8473-2470

China - Qingdao

Tel: 86-532-8502-7355 Fax: 86-532-8502-7205

China - Shanghai

Tel: 86-21-3326-8000 Fax: 86-21-3326-8021

China - Shenyang

Tel: 86-24-2334-2829 Fax: 86-24-2334-2393

China - Shenzhen

Tel: 86-755-8864-2200 Fax: 86-755-8203-1760

China - Wuhan

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India - New Delhi

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India - Pune

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Japan - Tokyo

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Singapore

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Taiwan - Hsin Chu

Tel: 886-3-5778-366 Fax: 886-3-5770-955

Taiwan - Kaohsiung

Tel: 886-7-213-7830

Taiwan - Taipei

Tel: 886-2-2508-8600 Fax: 886-2-2508-0102

Thailand - Bangkok

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Denmark - Copenhagen

Tel: 45-4450-2828 Fax: 45-4485-2829

Finland - Espoo

Tel: 358-9-4520-820

France - Paris

Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

France - Saint Cloud

Tel: 33-1-30-60-70-00

Germany - Garching

Tel: 49-8931-9700

Germany - Haan

Tel: 49-2129-3766400

Germany - Heilbronn

Tel: 49-7131-67-3636

Germany - Karlsruhe

Tel: 49-721-625370

Germany - Munich

Tel: 49-89-627-144-0 Fax: 49-89-627-144-44

Germany - Rosenheim

Tel: 49-8031-354-560

Israel - Ra’anana

Tel: 972-9-744-7705

Italy - Milan

Tel: 39-0331-742611 Fax: 39-0331-466781

Italy - Padova

Tel: 39-049-7625286

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Norway - Trondheim

Tel: 47-7289-7561

Poland - Warsaw

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Romania - Bucharest

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Spain - Madrid

Tel: 34-91-708-08-90 Fax: 34-91-708-08-91

Sweden - Gothenberg

Tel: 46-31-704-60-40

Sweden - Stockholm

Tel: 46-8-5090-4654

UK - Wokingham

Tel: 44-118-921-5800 Fax: 44-118-921-5820

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Microchip Technology WINC3400 User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Introduction

Features

Table of Contents

1. Ordering Information and Module Marking

2. Block Diagram

3. Pinout and Package Information

3.1 Package Description

4. Electrical Characteristics

4.1 Absolute Maximum Ratings

4.2 Recommended Operating Conditions

4.3 DC Characteristics

4.4 IEEE 802.11 b/g/n Radio Performance

4.4.1 Receiver Performance

4.4.2 Transmitter Performance

4.5 Bluetooth Radio Performance

4.5.1 Receiver Performance

4.5.2 Transmitter Performance

4.6 Timing Characteristics

4.6.1 I2C Slave Timing

4.6.2 SPI Slave Timing

4.6.3 SPI Master Timing

5. Power Management

5.1 Device States

5.2 Controlling Device States

5.3 Power-Up/Down Sequence

5.4 Digital I/O Pin Behavior During Power-Up Sequences

6. Clocking

6.1 Low-Power Clock

7. CPU and Memory Subsystem

7.1 Processor

7.2 Memory Subsystem

7.3 Nonvolatile Memory

8. WLAN Subsystem

8.1 MAC

8.2 PHY

8.3 Radio

9. Bluetooth Low Energy 4.0

10. External Interfaces

10.1 Interfacing with the Host Microcontroller

10.2 SPI Interface

10.2.1 Overview

10.2.2 SPI Timing

10.3 UART Interface

11. Application Reference Design

11.1 Host Interface - SPI

12. Module Outline Drawings

13. Design Consideration

13.1 Module Placement and Routing Guidelines

13.2 Antenna Performance

14. Reflow Profile Information

14.1 Storage Condition

14.1.1 Moisture Barrier Bag Before Opening

14.1.2 Moisture Barrier Bag Open

14.2 Solder Paste

14.3 Stencil Design

14.4 Baking Conditions

14.5 Soldering and Reflow Condition

14.5.1 Reflow Oven

15. Module Assembly Considerations

16. Regulatory Approval

16.1 United States

16.1.1 Labeling And User Information Requirements

16.1.2 RF Exposure

16.1.3 Helpful Web Sites

16.2 Canada

16.2.1 Labeling and User Information Requirements

16.2.2 RF Exposure

16.2.3 Helpful Web Sites

16.3 Europe

16.3.1 Labeling and User Information Requirements

16.3.2 Conformity Assessment

16.3.2.1 Simplified EU Declaration of Conformity

16.3.3 Helpful Websites

16.4 Other Regulatory Information

17. Reference Documentation

18. Document Revision History