Microchip Technology USB2507 User Manual

Integrated USB 2.0 Compatible 7-Port Hub

Highlights

• Integrated USB 2.0 Compatible 7-Port Hub

- 7 Transaction Translators for highest perfor­mance

- High-Speed (480Mbits/s), Full-Speed
(12Mbits/s) and Low-Speed (1.5Mbits/s)
compatible

- Full power management with per port or
ganged, selectable power control

- Detects Bus-Power/Self-Power source and
changes mode automatically

• Complete USB Specification 2.0 Compatibility

- Includes USB 2.0 Transceivers

• VID/PID/DID, and Port Configuration for Hub via:

- Single Serial I

- SMBus Slave Port

• Default VID/PID/DID, allows functionality when
configuration EEPROM is absent

• Hardware Strapping options allow for configura­tion without an external EEPROM or SMBus Host

• On-Board 24MHz Crystal Driver Circuit or 24 MHz
external clock driver

• Internal PLL for 480MHz USB 2.0 Sampling

• Internal 1.8V Linear Voltage Regulator

• Integrated USB termination and Pull-up/Pull-down
resistors

• Internal Short Circuit protection of USB differential
signal pins

• 1.8 Volt Low Power Core Operation

• 3.3 Volt I/O with 5V Input T olerance

• 80-Pin TQFP RoHS compliant package

2

C EEPROM

USB2507

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 1

USB2507

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The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).

Errata

An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur­rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
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When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are

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DS000002251A-page 2  2007 - 2016 Microchip Technology Inc.

USB2507

Table of Contents

1.0 Introduction ..................................................................................................................................................................................... 4

2.0 Pin Table 7-Port .............................................................................................................................................................................. 5

3.0 Pin Configuration 7-Port Hub .......................................................................................................................................................... 6

4.0 7-Port Hub Block Diagram .............................................................................................................................................................. 7

5.0 Functional Block Description ......................................................................................................................................................... 12

6.0 XNOR Test .................................................................................................................................................................................... 30

7.0 DC Parameters ............................................................................................................................................................................. 31

8.0 AC Specifications .......................................................................................................................................................................... 35

9.0 Package Outline ............................................................................................................................................................................ 36

Appendix A: Data Sheet Revision History ........................................................................................................................................... 37

The Microchip Web Site ...................................................................................................................................................................... 38

Customer Change Notification Service ............................................................................................................................................... 38

Customer Support ............................................................................................................................................................................... 38

Product Identification System ............................................................................................................................................................. 40

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USB2507

1.0 INTRODUCTION

The Microchip 7-Port Hub is fully compliant with the USB 2.0 Specification and will attach to a USB host as a Full-Speed
Hub or as a Full-/High-Speed Hub. The 7-Port Hub supports Low-Speed, Full-Speed, and High-Speed (if operating as
a High-Speed Hub) downstream devices on all of the enabled downstream ports.

A dedicated Transaction Translator (TT) is available for each downstream facing port. This architecture ensures maxi­mum USB throughput for each connected device when operating with mixed-speed peripherals.

The Hub works with an external USB power distribution switch device to control V
and to limit current and sense over-current conditions.

All required resistors on the USB ports are integrated into the Hub. This includes all series termination resistors on D+
and D– pins and all required pull-down and pull-up resistor s on D+ a nd D– pi ns. The over-curren t sense in puts for the
downstream facing ports have internal pull-up resistors.

Throughout this document the upstream facing port of the hub will be referred to as the u pstream port, and the do wn­stream facing ports will be called the downstream ports.

1.1 OEM Selectable Features

A default configuration is available in the USB2507 following a reset. This configuration may be sufficient for some appli­cations. Strapping option pins make it possible to modify a limited sub-set of the configuration options.

The USB2507 may also be configured by an external EEPROM or a microcontroller. When using the microcontroller
interface, the Hub appears as an SMBus slave device. If the Hub is pin-strapped for external EEPROM configuration
but no external EEPROM is present, then a value of ‘0’ will be written to a ll configuration data bit fields (the hub will
attach to the host with all ‘0’ values).

The 7-Port Hub supports several OEM selectable features:

• Operation as a Self-Powered USB Hub or as a Bus-Powered USB Hub.

• Operation as a Dynamic-Powered Hub (Hub operates as a Bus-Powered device if a local power source is not
available and switches to Self-Powered operation when a local power source is available).

• Optional OEM configuration via I
SMBus Host.

• LED indicator support.

• Compound device support (port is permanently hardwired to a downstream USB peripheral device).

• Hardware strapping options enable configuration of the following features.

- Non-Removable Ports

- Port Power Polarity (active high or active low logic)

- Port Disable

- LED support

- MTT enable

- Ganged Vs Port power switching and over-current sensing

2

C EEPROM or via the industry standard SMBus interface from an external

switching to downstream ports,

BUS

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2.0 PIN TABLE 7-PORT

TABLE 2-1: 7-PORT PIN TABLE

UPSTREAM USB 2.0 INTERFACE (3 PINS)

USBDP0 USBDN0 VBUS_DET

7-PORT USB 2.0 INTERFACE (44 PINS)

USBDP1 USBDN1 USBDP2 USBDN2
USBDP3 USBDN3 USBDP4 USBDN4
USBDP5 USBDN5 USBDP6 USBDN6
USBDP7 USBDN7

GR1/

NON_REM0

GR5 GR6 GR7

AM1/

GANG_EN

AM5 AM6 AM7
PRTPWR1 PRTPWR2 PRTPWR3 PRTPWR4
PRTPWR5 PRTPWR6 PRTPWR7

OCS1_N OCS2_N OCS3_N OCS4_N
OCS5_N OCS6_N OCS7_N

PRTPWR_POL RBIAS

SDA/SMBDATA SCL/SMBCLK/

XTAL1/CLKIN XTAL2 RESET_N SELF_PWR

ATEST/

REG_EN

NON_REM1

CFG_SEL0

CLKIN_EN TEST1 TEST0

GR2/

AM2/

MTT_EN

SERIAL PORT INTERFACE (3 PINS)

MISC (8 PINS)

POWER, GROUND (22 PINS)

GR3/

PRT_DIS0

AM3 AM4/

CFG_SEL1

USB2507

GR4/

PRT_DIS1

LED_EN

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USB2507

USBDP0

VDDA33

USBDN0

VSS

USBDN1

USBDP1

VDDA33

USBDP2

USBDN2

GR7

PRTPWR1

AM7

GR6

GR5

AM6

AM5

VDD18

VSS

USB2507

61

80

40

21

20

60

41

VSS

VSS

VDD18

VDD33

GR4/PRT_DIS1

AM4/LED_EN

VSS

1

XTAL2

XTAL1/CLKIN

VDDA18PLL

GR3/PRT_DIS0

AM3

GR2/NON_REM1

AM2/MTT_EN

VDDA33PLL

ATEST/REG_EN

RBIAS

VSS

GR1/NON_REM0

AM1/GANG_EN

SDA/SMBDATA

SCL/SMBCLK/CFG_SEL0

TEST0

PRTPWR_POL

RESET_N

VBUS_DET

PRTPWR7

OCS7_N

CLKIN_EN

OCS5_N

PRTPWR6

OCS6_N

VSS

VDD18

VDD33CR

PRTPWR4

OCS4_N

PRTPWR5

OCS2_N

PRTPWR3

OCS3_N

OCS1_N

PRTPWR2

TEST1

SELF_PWR

CFG_SEL1

VDDA33

USBDP7

USBDN7

VSS

USBDN5

VSS

USBDN6

USBDP6

USBDN4

USBDP4

VDDA33

USBDP5

VDDA33

USBDP3

USBDN3

VSS

3.0 PIN CONFIGURATION 7-PORT HUB

FIGURE 3-1: 7-PORT 80-PIN TQFP

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4.0 7-PORT HUB BLOCK DIAGRAM

Upstream

V

BUS

Upstream

PHY

Upstream
USB Data

Repeater

Controller

SIE

Serial

Interface

PLL

24 MHz

Crystal

To
EEPROM
or SMBus

Master

Routing Logic

SCLSD

TT#1TT

#2

...

TT
#7

Port

Controller

Downstream

PHY #1

Port #1

OC Sense

Switch Driver

LED Drivers

Downstream

PHY #7

Port #7

OC Sense

Switch Driver

LED Drivers

...

Downstream

USB DataOCSense

Switch/LED

Drivers

Downstream

USB DataOCSense

Switch/LED

Drivers

V

BUS

Power

Detect

Pin

Strapping

Options

Internal

Defaults

Select

3.3V

1.8V
Reg.

1.8V
Cap

FIGURE 4-1: 7-PORT BLOCK DIAGRAM

USB2507

TABLE 4-1: 7-PORT HUB PIN DESCRIPTIONS

USB Bus Data USBDN0

Detect Upstream

Name Symbol Type Function

VBUS Power

USBDP0

UPSTREAM USB 2.0 INTERFACE

VBUS_DET I/O12 Detects state of Upstream VBUS power. The Microchip Hub

IO-U These pins connect to the u pstream USB bus data signals.

monitors VBUS_DET to determine when to assert the internal
D+ pull-up resistor (signaling a connect event).

When designing a detachable hub, this pin must be
connected to the VBUS power pin of the USB port that is
upstream of the hub. (Use of a weak pull-down resistor is
recommended.)

For self-powered applications with a permanently attached
host, this pin must be pulled-up to either 3.3V or 5.0V
(typically VDD33).

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USB2507

TABLE 4-1: 7-PORT HUB PIN DESCRIPTIONS (CONTINUED)

Name Symbol Type Function

7-PORT USB 2.0 HUB INTERFACE

High-Speed USB

Data

USB Power Enable PRTPWR[7:1] O12 Enables power to USB peripheral devices (downstream).

Ports [7:5] Green

LED

Port 4:3 Green

LED

&

Port Disable

strapping option.

USBDN[7:1]

USBDP[7:1]

GR[7:5] I/O12 Green i ndicator LED’s for ports[7:5]. LED is active low

GR[4:3]/

PRT_DIS[1:0]

IO-U These pins connect to the d ownstream USB peripheral

devices attached to the Hub’s ports.

The active signal level of the PRTPWR7:1 pins is determined
by the Power Polarity Strapping function of the
PRTPWR_POL pin.

I/O12 Green indicato r LED for ports 4 and 3. Will be active low

when LED support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,

these pins will be sampled at RESET_N negation to
determine if ports [7:5] will be permanently disabled. Also, the
active state of the LED’s will be determined as follows:

PRT_DIS[1:0] = ‘00’, All ports are enabled,
GR4 is active high,
GR3 is active high.

Port [2:1] Green

LED

&

Port Non-

Removable

strapping option.

GR[2:1]/

NON_REM[1:0]

PRT_DIS[1:0] = ‘01’, Port 7 is disabled,
GR4 is active high,
GR3 is active low.

PRT_DIS[1:0] = ‘10’, Ports 7 & 6 are disabled,
GR4 is active low,
GR3 is active high.

PRT_DIS[1:0] = ‘11’, Ports 7, 6 & 5 are disabled,
GR4 is active low,
GR3 is active low.

I/O12 Green indicato r LED for ports 2 and 1. Will be active low

when LED support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,

these pins will be sampled at RESET_N negation to
determine if ports [3:1] contain permanently attached (non­removable) devices. Also, the active state of the LED’s will be
determined as follows:

NON_REM[1:0] = ‘00’, All ports are removable,
GR2 is active high,
GR1 is active high.

NON_REM[1:0] = ‘01’, Port 1 is non-removable,
GR2 is active high,
GR1 is active low.

NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable,
GR2 is active low,
GR1 is active high.

NON_REM[1:0] = ‘11’, Ports 1, 2, & 3 are non-removable,
GR2 is active low,
GR1 is active low.

Ports [7:5] Amber

LED

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AM[7:5] I/O12 Amber indicator LED’s for ports [7:5], LED is active low.

USB2507

TABLE 4-1: 7-PORT HUB PIN DESCRIPTIONS (CONTINUED)

Name Symbol Type Function

Port 4 Amber LED

&

LED Enable

strapping option

Port 3 Amber LED AM3 I/O12 Amber indicator LED for po rt 3. Signal will be active low.
Port 2 Amber LED

&

MTT Disable

Port 1 Amber LED

&

Gang Power

Switching and

Current Sensing

strapping option.

AM4/

LED_EN

AM2/

MTT_EN

AM1/

GANG_EN

I/O12 Amber indicator LED for port 4. Will be active low when LED

support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,

this pin will be sampled at RESET_N negation to determine
if LED support is enabled or disabled. Also, the active state
of the LED will be determined as follows:

‘0’ = LED support is disabled, LED is inactive
‘1’ = LED Support is enabled, LED is active low.

I/O12 Amber indicator LED for port 2. Will be active low when LED

support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,

this pin will be sampled at RESET_N negation to determine
if MTT support is disabled (STT only). Also, the active state
of the LED will be determined as follows:

‘0’ = MTT support is disabled, LED is active high
‘1’ = MTT support is enabled, LED is active l ow.

I/O12 Amber indicator LED for port 1, Will be active low when LED

support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,

this pin will be sampled at RESET_N negation to determine
if downstream port power switching and current sensing are
ganged, or individual port-by-port. Also, the active state of the
LED will be determined as follows:

Port Power Polarity

strapping.

Over Current

Sense

USB Transceiver

Bias

‘0’ = Port-by-port sensing & switching, LED is active high
‘1’ = Ganged sensing & switching, LED is active low.

PRTPWR_POL I/O12 Port Power Polarity strapping determinatio n for the active

signal polarity of the 7:1PRTPWR pins.
While RESET_N is asserted, the logic state of this pin will

(though the use of internal combinatorial logic) determine the
active state of the 7:1PRTPWR pins in order to ensure that
downstream port power is not inadvertently enabled to
inactive ports during a hardware reset.

On the rising edge of RESET_N (see the applicable
RESET_N timing table in Section 5.6.1), the logic value will
be latched internally, and will retain the active signal polarity
for the PRTPWR7:1 pin.

‘1’ = PRTPWR7:1 pins have an active ‘high’ polarity
‘0’ = PRTPWR7:1 pins have an active ‘low’ polarity

OCS7:1_N IPU Input from external current monitor indicating an over-current

condition. {Note: Contains internal pull-up to 3.3V supply}

RBIAS I-R A 12.0k (resistor is attached from ground to this pin

to set the transceiver’s internal bias settings.

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USB2507

TABLE 4-1: 7-PORT HUB PIN DESCRIPTIONS (CONTINUED)

Name Symbol Type Function

SERIAL PORT INTERFACE

Serial Data/SMB

Data

Serial Clock/SMB

Clock

&

Config Select 0

Configuration
Programming

Select

TABLE 4-2: SMBUS OR EEPROM INTERFACE BEHAVIOR

SDA/SMBDATA IOSD12 (Serial Data)/(SMB Data) signal.

SCL/SMBCLK/

CFG_SEL0

CFG_SEL1 I This multifunction pin is read on the rising edge of RESET_N

CFG_SEL1 CFG_SEL0 SMBus or EEPROM Interface Behavior

00Reserved
0 1 Configured as an SMBus slave for external download of user-

1 0 Internal Default Configuration via strapping options.
1 1 2-wire (I

IOSD12 (Serial Clock)/(SMB Clock) signal. This multifunction pin is

read on the rising edge of RESET_N (see the applicable
RESET_N timing table in Section 5.6.1) and will determine
the hub configuration method as described in Table 4-2.

(see the applicable RESET_N timing table in Section 5.6.1)
and will determine the hub configuration method as described
in Table 4-2.

defined descriptors. SMBus slave address is 0101100

2

C) EEPROMS are supported,

TABLE 4-3: MISCELLANEOUS PINS

Name Symbol Type Function

Crystal

Input/External

Clock Input

Crystal Output XTAL2 OCLKx 24MHz Crystal

Clock Input

Enable

RESET Input RESET_N IS This active low signal is used by the system to reset the

Self-Power /

Bus-Power

Detect

TEST Pins TEST[1:0] IPD Used for testing the chip. User must treat as a no-connect

Analog Test

&

Internal 1.8V

voltage regulator

enable

XTAL1/

CLKIN

CLKIN_EN I Clock In Enable:

SELF_PWR I Detects availability of local self-power source.

ATEST/

REG_EN

ICLKx 24MHz crystal or external clock input.

This pin connects to either one terminal of the crystal or to
an external 24MHz clock when a crystal is not used.

This is the other terminal of the crystal, or left unconnected
when an external clock source is used to drive
XTAL1/CLKIN. It must not be used to drive any external
circuitry other than the crystal circuit.

Low = XTAL1 and XTAL2 pins configured for use with
external crystal
High = XTAL1 pin configured as CLKIN, and must be
driven by an external CMOS clock.

chip. The minimum active low pulse is 1us.

Low = Self/local power source is NOT available (i.e., Hub
gets all power from Upstream USB VBus).
High = Self/local power source is available.

or connect to ground.

AIO This signal is used for testing the analog section of th e

chip, and to enable or disable the internal 1.8v regulator.
This pin must be connected to VDDA33 to enable the

internal 1.8V regulator, or to VSS to disable the internal
regulator.

When the internal regulator is enabled, the 1.8V power
pins must be left unconnected, except for the required
bypass capacitors.When the PHY is in test mode, the
internal regulator is disabled and the ATEST pin functions
as a test pin.

DS000002251A-page 10  2007 - 2016 Microchip Technology Inc.

USB2507

TABLE 4-4: POWER, GROUND, AND NO CONNECT

Name Symbol Type Function

VDDCORE3P3 VDD33CR +3.3V I/O Power.

If the internal core 1.8V regulator is enabled, then this pin
acts as the regulator input

VDD1P8 VDD18 +1.8V core power.

If the internal regulator is enabled, then VDD18 pin 50
must have a 4.7F (or greater) ±20% (ESR <0.1
capacitor to VSS

VDDAPLL3P3 VDDA33PLL +3.3V Filtered analog power for the internal PLL

If the internal PLL 1.8V regulator is enabled, then this pin
acts as the regulator input

VDDAPLL1P8 VDDA18PLL +1.8V Filtered analog power for internal PLL.

If the internal regulator is enabled, then this pin must have
a 4.7F (or greater) ±20% (ESR <0.1capacitor to VSS

VDDIO3P3 VDD33 +3.3V I/O power.

VDDA3P3 VDDA33 +3.3V Filtered analog power.

VSS VSS Ground.

TABLE 4-5: BUFFER TYPE DESCRIPTIONS

Buffer Description

I Input.
IPD Input, with a weak Internal pull-down.
IPU Input, with a weak Internal pull-up.

IS Input with Schmitt trigger.

O12 Output 12mA.

I/O12 Input/Output, 12mA

IOSD12 Open drain….12mA sink with Schmitt trigger, and must meet I2C-Bus

ICLKx XTAL Clock Input

OCLKx XTAL Clock Output

I-R RBIAS

IO-U Defined in USB Specification.

AIO Analog Input/output. Per PHY test requirements.

Specification Version 2.1 requirements.

Note: Meets USB 1.1 requirements when operating as a 1.1-compliant
device and meets USB 2.0 requirements when operating as a 2.0­compliant device.

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USB2507

5.0 FUNCTIONAL BLOCK DESCRIPTION

5.1 7-Port Hub

Microchip’s USB 2.0 7-Port Hub is fully specification compliant to the Universal Serial Bus Specification Revision 2.0
April 27,2000 (12/7/2000 and 5/28/2002 Errata). Please reference Chapter 11 (Hub Specification) for general details
regarding Hub operation and functionality.

For performance reasons, the 7-Port Hub provides 1 Transaction Translator (TT) per port (defined as Multi-TT configu­ration), divided into 4 non-periodic buffers per TT.

5.1.1 HUB CONFIGURATION OPTIONS

The Microchip Hub supports a large numb er of features and must be configured in order to correctly function when
attached to a USB host controller. There are three princip al ways to configure the hub: SMBus, EEPROM, or by internal
default settings. In all cases, the configuration method will be determined by the CFG_SEL1 and CFG_SEL0 pins imme­diately after RESET_N negation.

5.1.1.1 Vendor ID

Is a 16-bit value that uniquely identifies the Vendor of the user device (assigned by USB-Interface Forum). This field is
set by the OEM using either the SMBus or EEPROM interface options. When using the internal default option, Micro­chip’s VID (see Table 5-1) will be reported.

5.1.1.2 Product ID

Is a 16-bit value that the Vendor can assign that uniquely identifies this particular product (assigned by OEM). This field
is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default option, Micro­chip’s PID designation of (see Table 5-1) will be reported.

5.1.1.3 Device ID

Is a 16-bit device release number in BCD format (assigned by OEM). This field is set by the OEM using either the SMBus
or EEPROM interface options. When using the internal default option, Microchip’s DID designation of (see Table 5-1)
will be reported.

5.1.1.4 Self-Powered/Bus-Powered

The Hub is either Self-Powered (draws less than 2mA of upstream bus power) or Bus-Powered (limited to a 100mA
maximum of upstream power prior to being configured by the host controller).

When configured as a Bus-Powered device, the Mi crochip Hub consumes less than 100mA o f current prior to being
configured. After configuration, the Bus-Powered Microchip Hub (along with all associated hub circuitry, any embedded
devices if part of a compound device, and 100mA per externally available downstream port) must consume no more
than 500mA of upstream VBUS current. The current consumption is system dependent, and the OEM must ensure that
the USB 2.0 specifications are not violated.

When configured as a Self-Powered device, <1mA of upstream VBUS current is consumed and all 7 ports are available,
with each port being capable of sourcing 500mA of current.

This field is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default
option, the SELF_PWR pin determines the Self-powered or Bus-powered status.

Please see the description under Dynamic Power for the self/bus power functionality when dynamic power switching is
enabled.

5.1.1.5 Port Indicators

Controls the use of LED indicator for Port status information. See Section 11.5.3 of the USB 2.0 Specification for addi­tional details.

This field is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default
option, the LED_EN pin enables/disables LED Indicator support.

5.1.1.6 High-Speed Disable

Allows an OEM to force the Hub to configure as a Full-Speed device only (i.e. High-Speed not available).
This field is set by the OEM using either the SMBus or EEPROM interface options.

DS000002251A-page 12  2007 - 2016 Microchip Technology Inc.

USB2507

5.1.1.7 Multiple-TT Support

Selects between a mode where only one transaction translator is available for all ports (Single-TT), or each port gets a
dedicated transaction translator (Multi-TT) {Note: The host may force Single-TT mode only}.

This field is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default
option, the MTT_EN pin enables/disables MTT support.

5.1.1.8 EOP Disable

During FS operation only, this permits the Hub to send EOP if no downstream traffic is detected at EOF1. See Section

11.3.1 of the USB 2.0 Specification for additional details.
This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.9 Current Sensing

Selects current sensing on a port-by-port basis, all ports ganged, or none.
This field can be set by the OEM using either the SMBus or EEPROM interface options.When using the internal default

option, the SELF_PWR pin determines if current sensing will be ganged, or none (ganged if self-powered, none if bus­powered).

5.1.1.10 Downstream Port Power Enabling

Enables all ports simultaneously (ganged), or port power is individually switched on and off on a port-by-port basis. The
ability to support power enabling on a port or ganged basis is hardware implementation dependent.

This field is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default
option, the GANG_EN pin will configure the hub for ganged or individual port-by-port port power switching.

5.1.1.11 Compound Device

Allows the OEM to indicate that the Hub is part of a compound (see the USB Specification for definition) device. The
applicable port(s) must also be defined as having a “Non-Removable Device”.

This field is set by the OEM using either the SMBus or EEPROM interface options.
Note: When configured via strapping options, declaring a port as non-removable automatically causes the hub controller

to report that it is part of a compound device.

5.1.1.12 Non-Removable Device

Informs the Host if one of the active ports has a permanent device that is undetachable from the Hub. (Note: The device
must provide its own descriptor data.)

This field is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default
option, the NON_REM[1:0] pins will designate the appropriate ports as being non-removable.

5.1.1.13 Self-Powered Port DISABLE

During Self-Powered operation, this selects the ports which will be permanently disabled, and are not available to be
enabled or enumerated by a Host Controller. The disabled ports must be contiguous, and must be in decreasing order
starting with port 7.

This field is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default
option, the PRT_DIS[1:0] pins will disable the appropriate ports.

5.1.1.14 Bus-Powered Port DISABLE

During Bus-Powered operation, this selects the ports which will be permanently disabled, and are not available to be
enabled or enumerated by a Host Controller. The disabled ports must be contiguous, and must be in decreasing order
starting with port 7.

This field is set by the OEM using either the SMBus or EEPROM interface options. When using the internal default
option, the PRT_DIS[1:0] pins will disable the appropriate ports.

5.1.1.15 Dynamic Power

Controls the ability of the 7-Port Hub to automatically change from Self-Po wered operation to Bus-Powered operation
if the local power source is removed or is unavailable (and from Bus-Powered to Self-Powered if the local power source
is restored). {Note: If the local power source is available, the 7-port Hub will always switch to Self-Powered operation.}

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When Dynamic Power switching is enabled, the Hub detects the availability of a local power source by monitoring the
external SELF_PWR pin. If the Hub detects a change in power source availability, the Hub immediately disconnects and
removes power from all downstream devices and disconnects the upstream port. The Hub will then re-attach to the
upstream port as either a Bus-Powered Hub (if local-power in unavailable) or a Self-Powered Hub (if local power is avail­able).

This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.16 Over-Current Timer

The time delay (in 2ms increments) for an over-current condition to persist before it is reported to the Host.
This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.17 Self-Powered Max Power

When in Self-Powered configuration, Sets value in 2mA increments.
This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.18 Bus-Powered Max Power

When in Bus-Powered configuration, Sets value in 2mA increments.
This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.19 Self-powered Hub Controller Current

When in Self-Powered configuration, Maximum current requirements of the Hub Controller in 2mA increments.
This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.20 Bus-Powered Hub Controller Current

When in Bus-Powered configuration, Maximum current requirements of the Hub Controller in 2mA increments.
This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.21 Power-On Timer

Time (in 2ms intervals) from the time power-on sequence begins on a port until power is good on that port. System soft­ware uses this value to determine how long to wait before accessing a powered-on port.

This field is set by the OEM using either the SMBus or EEPROM interface options.

5.1.1.22 Power Switching Polarity

The selection of active state “polarity” for the PRTPWR[7:1] pins is made by a strapping option only.

5.1.2 VBUS DETECT

According to Section 7.2.1 of th e USB 2.0 S pecification, a downstream port can never provide power to its D+ or D- pull­up resistors unless the upstream port’s VBUS is in the asserted (powered) state. The VBUS_DET pin on the Hub mon­itors the state of the upstream VBUS signal and will not pull-up the D+ or D- resistor if VBUS is not active. If VBUS goes
from an active to an inactive state (Not Powered), Hub will remove power from the D+ or D- pull-up resistor within 10
seconds.

5.2 EEPROM Interface

The Microchip Hub can be configured via a 2-wire (I2C) EEPROM. (Please see T abl e 4-1, "7-Port Hub Pin Descriptions"
for specific details on how to enable the I

The Internal state-machine will, (when configured for EEPROM support) read the external EEPROM for configuration
data. The hub will then “attach” to the upstream USB host.

Please see Table 5-1 User-Defined Descriptor Data for a list of data fields available.

2

C EEPROM option).

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5.2.1 I2C EEPROM

The I2C EEPROM interface implements a subset of the I2C Master Specification (Please refer to the Philips Semicon­ductor Standard I
to attach to a single “dedicated” I2C EEPROM, and it conforms to the Standard-mode I2C Specif ication (1 00kbit/s trans­fer rate and 7-bit addressing) for protocol and electrical compatibility.

Note: Extensions to the I2C Specification are not supported.

The Hub acts as the master and generates the serial clock SCL, controls the bus access (determines which device acts
as the transmitter and which device acts as the receiver), and generates the START and STOP conditions.

5.2.1.1 Implementation Characteristics

Please refer to the MicroChip 24AA00 DataSheet for Protocol and Programming specifics.

5.2.1.2 Pull-Up Resistor

The Circuit board designer is required to place external pull-up resistors (10K recommended) on the SDA/SMBDATA
& SCL/SMBCLK/CFG_SELO lines (per SMBus 1.0 Specification, and EEPROM manufacturer guidelines) to Vcc in
order to assure proper operation.

5.2.1.3 I2C EEPROM Slave Address

Slave address is 1010000.

2

C-Bus Specification for details on I2C bus protocols). The Hub’s I2C EEPROM interface is designed

Note: 10-bit addressing is NOT supported.

5.2.2 IN-CIRCUIT EEPROM PROGRAMMING

The EEPROM can be programmed via ATE by pulling RESET_N low (which tri-states the Hub’ s EEPROM interface and
allows an external source to program the EEPROM).

5.2.3 EEPROM DATA

TABLE 5-1: USER-DEFINED DESCRIPTOR DATA

Byte

Field

VID 1:0 2 0424 0424 Vendor ID (assigned by USB-IF).
PID 3:2 2 2507 2507 Product ID (assigned by Manufacturer).

DID 5:4 2 0000 0000 Device ID (assigned by Manufacturer).
Config Data

Byte 1
Config Data

Byte 2
Non Removable

Device

Port Disable
Self-Powered

Port Disable
Bus-Powered

Max Power
Self-Powered

Max Power
Bus-Powered

MSB:

LSB

6 1 98 1C Configuration data byte #1 for Hub options.

7 1 10 90 Configuration data byte #2 for Hub options.

8 1 00 00 Defines the ports that contain attached devices

9 1 00 00 Selects the ports that will be permanently

A 1 00 00 Selects the ports that will be permanently

B 1 01 01 Max Current for this configuration (expressed

C 1 64 64 Max Current for this configuration (expresse d

Size

(Bytes)

Default

CFG

Self

(Hex)

Default

CFG

Bus

(Hex)

Description

(this is used only when Hub is part of a
compound device).

disabled

disabled

in 2mA units).

in 2mA units).

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TABLE 5-1: USER-DEFINED DESCRIPTOR DATA (CONTINUED)

Default

CFG

Self

(Hex)

Field

Hub Controller
Max Current
Self-Powered

Hub Controller
Max Current
Bus-Powered

Power-On
Time

Byte

MSB:

LSB

D 1 01 01 Max Current (expressed in 2mA un its).

E 1 64 64 Max Current (expressed in 2mA units).

F 1 32 32 Time until power is stable.

Size

(Bytes)

5.2.3.1 EEPROM Offset 1:0(h) - Vendor ID

Bit Number Bit Name Description

15:8 VID_MSB Most Significant Byte of the Vendor ID.

7:0 VID_LSB Least Significant Byte of the Vendor ID.

5.2.3.2 EEPROM Offset 3:2(h) - Product ID

Default

CFG

Bus

(Hex)

Description

Bit Number Bit Name Description

15:8 PID_MSB Most Significant Byte of the Product ID.

7:0 PID_LSB Least Significant Byte of the Product ID.

5.2.3.3 EEPROM Offset 5:4(h) - Device ID

Bit Number Bit Name Description

15:8 DID_MSB Most Signi ficant Byte of the Device ID.

7:0 DID_LSB Least Significant Byte of the Device ID.

5.2.3.4 EEPROM Offset 6(h) - CONFIG_BYTE_1

Bit Number Bit Name Description

7 SELF_BUS_PWR Self or Bus Power: Selects between Self- and Bus-Powered operation.

0 = Bus-Powered operation. (BUS Default)
1 = Self-Powered operation. (SELF Default)

Note: If Dynamic Power Switching is enabled , this bit is ignored and the

SELF_PWR pin is used to determine if the hub is operating from self
or bus power.

6 PORT_IND Port Indicator Support: Indicates implementation of LED indicators

0 = No LED indicators.
1 = LED indicators.

5 HS_DISABLE High Speed Disable: Disables the capability to attach as either a High/Full-

speed device, and forces attachment as Full-speed only i.e. (no High-Speed
support).

0 = High-/Full-Speed. (Default)
1 = Full-Speed-Only (High-Speed disabled!)

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Bit Number Bit Name Description

4 MTT_ENABLE Multi-TT enable: Enables one transaction translator per port operation.

0 = single TT for all ports.
1 = one TT per port (multiple TT’s supported)

3 EOP_DISABLE EOP Disable: Disables EOP generation at EOF1 when no downstream

2:1 CURRENT_SNS Over Current Sense: Indicates whether current sensing is on a port-by-port

directed traffic is in progress.
0 = EOP generation at EOF1 is enabled.

1 = EOP generation at EOF1 is disabled, (normal operation). (Default)

basis, or ganged.
00 = Ganged sensing (all ports together). (Default for self-power)

01 = Individual port-by-port.

0 PORT_PWR Port Power Switching: Indicates whether port power switching is on a port-by-

port basis or ganged.
0 = Ganged switching (all ports together)

1 = Individual port-by-port switching.

5.2.3.5 EEPROM Offset 7(h) - CONFIG_BYTE_2

Bit Number Bit Name Description

7 DYNAMIC Dynamic Power Enable: Controls the ability for the Hub to transition to Bus-

6 Reserved Reserved

5:4 OC_TIMER OverCurrent Timer: Over Current Timer delay.

3 COMPOUND Compound Device: Designate s if Hub is part of a compound device.

2:0 Reserved Reserved.

Powered operation if the local power source is removed (can revert back to
Self-Power if local power source is restored).

0 = No Dynamic auto-switching.
1 = Dynamic Auto-switching capable.(Default)

00 = 0.1ms
01 = 2ms (Default)
10 = 4ms
11 = 6 m s

0 = No. (Default)
1 = Yes, Hub is part of a compound device.

5.2.3.6 EEPROM Offset 8(h) - Non-Removable Device

Bit Number Bit Name Description

7:0 NR_DEVICE Non-Removable Device: Indicates which port(s) include non-removable devic-

es. ‘0’ = port is removable, ‘1’ = port is non-removable.
Bit 7= 1; Port 7 non-removable.

Bit 6= 1; Port 6 non-removable.
Bit 5= 1; Port 5 non removable.
Bit 4= 1; Port 4 non-removable.
Bit 3= 1; Port 3 non-removable.
Bit 2= 1; Port 2 non-removable.
Bit 1= 1; Port 1 non removable.
Bit 0 is Reserved, always = ‘0’.

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5.2.3.7 EEPROM Offset 9(h) - Port Disable For Self Powered Operation

Bit Number Bit Name Description

7:0 PORT_DIS_SP Port Disable Self-Powered: Disables 1 or more contiguous ports. ‘0’ = port is

5.2.3.8 EEPROM Offset A(h) - Port Disable For Bus Powered Operation

Bit Number Bit Name Description

7:0 PORT_DIS_BP Port Disable Bus-Powered: Disables 1 or more contiguous ports. ‘0’ = port is

available, ‘1’ = port is disabled.
Bit 7= 1; Port 7 is disabled.
Bit 6= 1; Port 6 is disabled.
Bit 5= 1; Port 5 is disabled.
Bit 4= 1; Port 4 is disabled.
Bit 3= 1; Port 3 is disabled.
Bit 2= 1; Port 2 is disabled.
Bit 1= 1; Port 1 is disabled.
Bit 0 is Reserved, always = ‘0’

available, ‘1’ = port is disabled.
Bit 7= 1; Port 7 is disabled.
Bit 6= 1; Port 6 is disabled.
Bit 5= 1; Port 5 is disabled.
Bit 4= 1; Port 4 is disabled.
Bit 3= 1; Port 3 is disabled.
Bit 2= 1; Port 2 is disabled.
Bit 1= 1; Port 1 is disabled.
Bit 0 is Reserved, always = ‘0’

5.2.3.9 EEPROM Offset B(h) - Max Power For Self Powered Operation

Bit Number Bit Name Description

7:0 MAX_PWR_SP Max Power Self_Powered: Value in 2mA increments that the Hub consumes

from an upstream port (VBUS) when operating as a self-powered hub. This
value includes the hub silicon along with the combined power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is
configured as a compound device, and the embedded periphera l reports 0mA
in its descriptors.

Note: The USB 2.0 Specification does not permit this value to exceed

100mA

A value of 50 (decimal) indicates 100mA.

5.2.3.10 EEPROM Offset C(h) - Max Power For Bus Powered Operation

Bit Number Bit Name Description

7:0 MAX_PWR_BP Max Power Bus_Powered: Value in 2mA increments that the Hub consumes

from an upstream port (VBUS) when operating as a bus-powered hub. This
value includes the hub silicon along with the combined power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is
configured as a compound device, and the embedded periphera l reports 0mA
in its descriptors.

A value of 50 (decimal) indicates 100mA.

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5.2.3.11 EEPROM Offset D(h) - Hub Controller Max Current For Self Powered Operation

Bit Number Bit Name Description

7:0 HC_MAX_C_SP Hub Controller Max Current Self-Powered: Value in 2mA increments that the

5.2.3.12 EEPROM Offset E(h) - Hub Controller Max Current For Bus Powered Operation

Bit Number Bit Name Description

7:0 HC_MAX_C_BP Hub Controller Max Current Bus-Powered: Value in 2mA increments that the

Hub consumes from an upstream port (VBUS) when operating as a self­powered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board. This
value does NOT include the power consumption of a permanently attached
peripheral if the hub is configured as a compound device.

Note: The USB 2.0 Specification does not permit this value to exceed

100mA

A value of 50 (decimal) indicates 100mA, which is the default value.

Hub consumes from an upstream port (VBUS) when operating as a self­powered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board. This
value does NOT include the power consumption of a permanently attached
peripheral if the hub is configured as a compound device.

A value of 50 (decimal) indicates 100mA, which is the default value.

5.2.3.13 EEPROM Offset F(h) - Power-On Time

Bit Number Bit Name Description

7:0 POWER_ON_TIME Power On Time: The length of time that is takes (in 2 ms intervals) from the

time the host initiated power-on sequence begins on a port until power is good
on that port.

5.3 SMBus Slave Interface

Instead of loading User-Defined Descriptor data from an external EEPROM, the Microchip Hub can be configured to
receive a code load from an external processor via an SMBus interface. The SMBus interface shares the same pins as
the EEPROM interface, if CFG_SEL1 & CFG_SEL0 activates the SMBus interface, external EEPROM support is no
longer available (and the user-defined descriptor data must be downloaded via the SMBus). Due to system issues, the
Microchip Hub waits indefinitely for the SMBus code load to complete and only “appears” as a newly connected device
on USB after the code load is complete.

The Hub’s SMBus implementation is a subset of the SMBus interface to the host. The device is a slave-only SMBus
device. The implementation in the device is a subset of SMBus since it only supports two protocols.

The Write Byte and Read Byte protocols are the only valid SMBus protocols for the Hub. The Hub respo nds to other
protocols as described in Section 5.3.2, "Invalid Protocol Response Behavior," on page 20. Reference the System Man­agement Bus Specification, Rev 1.0.

The SMBus interface is used to read and write the registers in th e device. The register set is shown in Secti on 5.3.9,

"Internal SMBus Memory Register Set," on page 21.

5.3.1 BUS PROTOCOLS

Typical Write Byte and Read Byte protocols are shown below. Register accesses are performed using 7-bit slave
addressing, an 8-bit register address field, and an 8-bit data field. The shading indicates the Hub driving data on the
SMBDATA line; otherwise, host data is on the SDA/SMBDATA line.

The slave address is the unique SMBus Interface Address for the Hub that identifies it on SMBus. The register address
field is the internal address of the register to be accessed. The register data field is the data that the host is attempting
to write to the register or the contents of the register that the host is attempting to read.

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Denotes Master-to-Slave Denotes Slave-to-Master

Note: Data bytes are transferred MSB first (msb first).

5.3.1.1 Byte Protocols

When using the Hub SMBus Interface for byte transfers, a write will always consist of the SMBus Interface Sl ave
Address byte, followed by the Internal Address Register byte, then the data byte.

The normal read protocol consists of a write to the HUB with the SMBus Interface Address byte, followed by the Internal
Address Register byte. Then restart the Serial Communication with a Read consisting of the SMBus Interface Address
byte, followed by the data byte read from the Hub. This can be accomplished by us ing the Read Byte protocol.

Note: For the following SMBus tables:

Write Byte
The Write Byte protocol is used to write data to the registers. The data will only be written if the protocol shown in

Table 5-2 is performed correctly. Only one byte is transferred at a time for a Write Byte protocol.

TABLE 5-2: SMBUS WRITE BYTE PROTOCOL

Field: Start Slave Addr Wr Ack Reg. Addr Ack Reg. Data Ack Stop

Bits:1 71181811

Read Byte
The Read Byte protocol is used to read data from the registers. The data will only be read if the protocol shown in

Table 5-3 is performed correctl y. Only one byte is transferred at a time for a Read Byte protocol.

TABLE 5-3: SMBUS READ BYTE PROTOCOL

Field: Start Slave

Addr

Bits: 1 7 1 1 8 1 1 7 1 1 8 1 1

Wr Ack Reg.

Addr

Ack Start Slave

Addr

Rd Ack Reg.

Data

Nack Stop

5.3.2 INVALID PROTOCOL RESPONSE BEHAVIOR

Registers that are accessed with an invalid protocol are not updated. A register is only updated following a valid protocol.
The only valid protocols are Write Byte and Read Byte, which are described above.

The Hub only responds to the hardware selected Slave Address.
Attempting to communicate with the Hub over SMBus with an invalid slave address or in valid protocol results in no

response, and the SMBus Slave Interface returns to the idle state.
The only valid registers that are accessible by the SMBus slave address are the registers defined in the Registers Sec-

tion. See Section 5.3.3 for the response to undefined registers.

5.3.3 GENERAL CALL ADDRESS RESPONSE

The Hub does not respond to a general call address of 0000_000b.

5.3.4 SLAVE DEVICE TIME-OUT

According to the SMBus Specification, V1.0 devices in a transfer can abort the transfer in progress and release the bus
when any single clock low interval exceeds 25ms (T
their communication and be able to receive a new START condition no later than 35ms (T

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TIMEOUT , MIN

). Devices that have detected this condition must reset

TIMEOUT, MAX

).

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Note: Some simple devices do not contain a clock low drive circuit; this simple kind of de vice typically resets its

communications port after a start or stop condition.

5.3.5 STRETCHING THE SCLK SIGNAL

The Hub supports stretching of the SCLK by other devices on the SMBus. The Hub does not stretch the SCLK.

5.3.6 SMBUS TIMING

The SMBus Slave Interface complies with the SMBus AC Timing Specification. See the SMBus timing in the “Timing
Diagram” section.

5.3.7 BUS RESET SEQUENCE

The SMBus Slave Interface resets and returns to the idle state upon a START field followed immediately by a STOP
field.

5.3.8 SMBUS ALERT RESPONSE ADDRESS

The SMBALERT# signal is not supported by the Hub.

5.3.9 INTERNAL SMBUS MEMORY REGISTER SET

The following table provides the SMBus slave interface register map values.

TABLE 5-4: SMBUS SLAVE INTERFACE REGISTER MAP

Reg

Addr

00h R/W Status/Command STCD 7 6 5 4 3 2 1 0
01h R/W VID LSB VIDL 7 6 5 4 3 2 1 0
02h R/W VID MSB VIDM 7 6 5 4 3 2 1 0
03h R/W PID LSB PIDL 7 6 5 4 3 2 1 0
04h R/W PID MSB PIDM 7 6 5 4 3 2 1 0
05h R/W DID LSB DIDL 7 6 5 4 3 2 1 0
06h R/W DID MSB DIDM 7 6 5 4 3 2 1 0
07h R/W Config Data Byte 1 CFG1 7 6 5 4 3 2 1 0
08h R/W Config Data Byte 2 CFG2 7 6 5 4 3 2 1 0
09h R/W Non-Removable

0Ah R/W Port Disable (Self) PDS 7 6 5 4 3 2 1 0
0Bh R/W Port Disable (Bus) PDB 7 6 5 4 3 2 1 0
0Ch R/W Max Power (Self) MAXPS 7 6 5 4 3 2 1 0
0Dh R/W Max Power (Bus) MAXPB 7 6 5 4 3 2 1 0
0Eh R/W Hub Controller Max

0Fh R/W Hub Controller Max

10h R/W Power-on Time PWRT 7 6 5 4 3 2 1 0

R/W Register Name Abbr

NRD 7 6 5 4 3 2 1 0

Devices

HCMCS 7 6 5 4 3 2 1 0

Current (Self)

HCMCB 7 6 5 4 3 2 1 0

Current (bus)

Bit 7

(MSb)

Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1

Bit 0

(LSb)

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5.3.9.1 Register 00h: Status/Command (Reset = 0x00)

Bit Number Bit Name Description

7:3 Reserved Reserved. {Note: Software must never write a ‘1’ to these bits}

2 RESET Reset the SMBus Interface and internal memory back to RESET_N assertion

1 WRITE_PROT Write Protect: The external SMBus host sets this bit after the Hub’s internal

0 USB_ATTACH USB Attach & power-down the SMBus Interface.

default settings. {Note: During this reset, this bit is automatically cleared to its
default value of 0.}

0 = Normal Run/Idle State.
1 = Force a reset.

memory is loaded with configuration data. {Note: The External SMBus Host is
responsible for verification of downloaded data.}

0 = The internal memory (address range 01-10h) is no t write protected.
1 = The internal memory (address range 01-10h) is “write-prote cted” to
prevent unintentional data corruption.}

Note: {This bit is write once and is only cleared by assertion of the external

RESET_N pin.}

0 = Default; SMBus slave interface is active.
1 = Hub will signal a USB attach event to an upstream device, Note: SMBus
Slave interface will completely power down after the ACK has completed.

Note: {This bit is write once and is only cleared by assertion of the external

RESET_N pin.}

5.3.9.2 Register 01h: Vendor ID (LSB) (Reset = 0x00)

Bit Number Bit Name Description

7:0 VID_LSB Least Significant Byte of the Vendor ID.

5.3.9.3 Register 02h: Vendor ID (MSB) (Reset = 0x00)

Bit Number Bit Name Description

7:0 VID_MSB Most Significant Byte of the Vendor ID.

5.3.9.4 Register 03h: Product ID (LSB) (Reset = 0x00)

Bit Number Bit Name Description

7:0 PID_LSB Least Significant Byte of the Product ID.

5.3.9.5 Register 04h: Product ID (MSB) (Reset = 0x00)

Bit Number Bit Name Description

7:0 PID_MSB Most Significant Byte of the Product ID.

5.3.9.6 Register 05h: Device ID (LSB) (Reset = 0x00)

Bit Number Bit Name Description

7:0 DID_LSB Least Significant Byte of the Device ID.

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5.3.9.7 Register 06h: Device ID (MSB) (Reset = 0x00)

Bit Number Bit Name Description

7:0 DID_MSB Most Significant Byte of the Device ID.

5.3.9.8 Register 07h: CONFIG_BYTE_1 (Reset = 0x00)

Bit Number Bit Name Description

7 SELF_BUS_PWR Self or Bus Power: Selects between Self- and Bus-Powered operation.

0 = Bus-Powered operation.
1 = Self-Powered operation.

Note: If Dynamic Power Switching is enabled , this bit is ignored and the

SELF_PWR pin is used to determine if the hub is operating from self
or bus power.

6 PORT_IND Port Indicator Support: Indicates implementation of LED indicators

0 = No LED indicators.
1 = LED indicators.

5 HS_DISABLE High Speed Disable: Disables the capability to attach as either a High/Full-

speed device, and forces attachment as Full-speed only i.e. (no High-Speed
support).

0 = High-/Full-Speed.
1 = Full-Speed-Only (High-Speed disabled!)

4 MTT_ENABLE Multi-TT enable: Enables one transaction translator per port operation.

0 = single TT for all ports.
1 = one TT per port (multiple TT’s supported)

3 EOP_DISABLE EOP Disable: Disables EOP generation of EOF1 when in Full-Speed mode.

0 = EOP generation is normal.
1 = EOP generation is disabled.

2:1 CURRENT_SNS Over Current Sense: Indicates whether current sensing is on a port-by-port

0 PORT_PWR Port Power Switching: Indicates whether port power switching is on a port-by-

basis, or ganged.
00 = Ganged sensing (all ports together).

01 = Individual port-by-port.

port basis or ganged.
0 = Ganged switching (all ports together)

1 = Individual port-by-port switching.

5.3.9.9 Register 08h: Configuration Data Byte 2 (Reset = 0x00)

Bit Number Bit Name Description

7 DYNAMIC Dynamic Power Enable: Controls the ability for the Hub to transition to Bus-

Powered operation if the local power source is removed (can revert back to
Self-Power if local power source is restored).

0 = No Dynamic auto-switching.
1 = Dynamic Auto-switching capable.

6 Reserved Reserved

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Bit Number Bit Name Description

5:4 OC_TIMER OverCurrent Timer: Over Current Timer delay.

00 = 0.1ms
01 = 2ms
10 = 4ms
11 = 6 m s

3 COMPOUND Compound Device: Designate s if Hub is part of a compound device.

0 = No.
1 = Yes, Hub is part of a compound device.

2:0 Reserved Reserved

5.3.9.10 Register 09h: Non-Removable Device (Reset = 0x00)

Bit Number Bit Name Description

7:0 NR_DEVICE Non-Removable Device: Indicates which port(s) include non-removable devic-

es. ‘0’ = port is removable, ‘1’ = port is non-removable.
Bit 7= 1; Port 7 non-removable.

Bit 6= 1; Port 6 non-removable.
Bit 5= 1; Port 5 non removable.
Bit 4= 1; Port 4 non-removable.
Bit 3= 1; Port 3 non-removable.
Bit 2= 1; Port 2 non-removable.
Bit 1= 1; Port 1 non removable.
Bit 0 is Reserved, always = ‘0’.

5.3.9.11 Register 0Ah: Port Disable For Self Powered Operation (Reset = 0x00)

Bit Number Bit Name Description

7:0 PORT_DIS_SP Port Disable Self-Powered: Disables 1 or more contiguous ports. ‘0’ = port is

available, ‘1’ = port is disabled.
Bit 7= 1; Port 7 is disabled.

Bit 6= 1; Port 6 is disabled.
Bit 5= 1; Port 5 is disabled.
Bit 4= 1; Port 4 is disabled.
Bit 3= 1; Port 3 is disabled.
Bit 2= 1; Port 2 is disabled.
Bit 1= 1; Port 1 is disabled.
Bit 0 is Reserved, always = ‘0’

5.3.9.12 Register 0Bh: Port Disable For Bus Powered Operation (Reset = 0x00)

Bit Number Bit Name Description

7:0 PORT_DIS_BP Port Disable Bus-Powered: Disables 1 or more contiguous ports. ‘0’ = port is

available, ‘1’ = port is disabled.
Bit 7= 1; Port 7 is disabled.

Bit 6= 1; Port 6 is disabled.
Bit 5= 1; Port 5 is disabled.
Bit 4= 1; Port 4 is disabled.
Bit 3= 1; Port 3 is disabled.
Bit 2= 1; Port 2 is disabled.
Bit 1= 1; Port 1 is disabled.
Bit 0 is Reserved, always = ‘0’

DS000002251A-page 24  2007 - 2016 Microchip Technology Inc.

USB2507

5.3.9.13 Register 0Ch: Max Power For Self Powered Operation (Reset = 0x00)

Bit Number Bit Name Description

7:0 MAX_PWR_SP Max Power Self_Powered: Value in 2mA increments that the Hub consumes

5.3.9.14 Register 0Dh: Max Power For Bus Powered Operation (Reset = 0x00)

Bit Number Bit Name Description

7:0 MAX_PWR_BP Max Power Bus_Powered: Value in 2mA increments that the Hub consumes

from an upstream port (VBUS) when operating as a self-powered hub. This
value includes the hub silicon along with the combined power con sumption
(from VBUS) of all associated circuitry on the board. This value also includ es
the power consumption of a permanently attached peripheral if the hub is
configured as a compound device, and the embedded periphera l reports 0mA
in its descriptors.

Note: The USB 2.0 Specification does not permit this value to exceed

100mA

A value of 50 (decimal) indicates 100mA.

from an upstream port (VBUS) when operating as a bus-powered hub. This
value includes the hub silicon along with the combined power con sumption
(from VBUS) of all associated circuitry on the board. This value also includ es
the power consumption of a permanently attached peripheral if the hub is
configured as a compound device, and the embedded periphera l reports 0mA
in its descriptors.

A value of 50 (decimal) indicates 100mA.

5.3.9.15 Register 0Eh: Hub Controller Max Current For Self Powered Operation (Reset = 0x00)

Bit Number Bit Name Description

7:0 HC_MAX_C_SP Hub Controller Max Current Self-Powered: Value in 2mA increments that the

Hub consumes from an upstream port (VBUS) when operating as a self­powered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board. This
value does NOT include the power consumption of a permanently attached
peripheral if the hub is configured as a compound device.

Note: The USB 2.0 Specification does not permit this value to exceed

100mA

A value of 50 (decimal) indicates 100mA, which is the default value.

5.3.9.16 Register 0Fh: Hub Controller Max Current For Bus Powered Operation (Reset = 0x00)

Bit Number Bit Name Description

7:0 HC_MAX_C_BP Hub Controller Max Current Bus-Powered: Value in 2mA increments that the

Hub consumes from an upstream port (VBUS) when operating as a bus­powered hub. This value will include the hub silicon along with the combine d
power consumption (from VBUS) of all associated circuitry on the board. This
value will NOT include the power consumption of a permanen tly attached
peripheral if the hub is configured as a compound device.

A value of 50 (decimal) would indicate 100mA, which is the default value.

5.3.9.17 Register 10h: Power-On Time (Reset = 0x00)

Bit Number Bit Name Description

7:0 POWER_ON_TIME Power On Time: The length of time that it takes (in 2 ms intervals) from the

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 25

time the host initiated power-on sequence begins on a port until power is good
on that port.

USB2507

HUB

50K

Strap Low

GR2

50K

Strap High

GR1

+V

5.3.9.18 Undefined Registers

The registers shown in Table 5-4 are the defined registers i n the Hub. Rea d s to und efined regi sters re turn 00h . Writes
to undefined registers have no effect and do not return an error.

5.3.9.19 Reserved Registers

Unless otherwise instructed, only a ‘0’ may be written to all reserved registers or bits.

5.4 Default Configuration Option:

The Microchip Hub can be configured via its internal default configuration. (please see , for specific details on how to
enable default configuration.

Please refer to Table 5-1 on page 15 for the internal default values that are loaded when this option is selected.

5.5 Default Strapping Options:

The Microchip Hub can be configured via a combination of internal defaul t values and pin strap options. Please see

Table 4-1, "7-Port Hub Pin Descriptions" for specific details on how to enable the default/pin-strap configuration option.

The strapping option pins only cover a limited sub-set of the configuration options. The internal default values will be
used for the bits & registers that are not controlle d by a strapping op tion pin. Please refer to Table 5-1 on page 15 for
the internal default values that are loaded when this option is selected.

The Amber and Green LED pins are sampled after RESET_N negation, and the logic values are used to configure the
hub if the internal default configuration mode is selected. The implementation shown below (see Figure 5-1) shows a
recommended passive scheme. When a pin is configured with a “Strap High” configuration, the LED functions with
active low signaling, and the PAD will “sink” the current from the external supply. When a pin is configured with a “Strap
Low” configuration, the LED functions with active high sign aling, and the PAD will “source” the current to the external
LED.

FIGURE 5-1: LED STRAPPING OPTION

DS000002251A-page 26  2007 - 2016 Microchip Technology Inc.

USB2507

t1

t4

t5 t6

t7 t8

Valid

Don’t Care

Don’t Care

Driven by Hub if strap is an output.

RESET_N

VSS

Strap Pins

VSS

Hardware

reset

asserted

Read Strap

Options

Drive Strap

Outputs to

inactive

levels

Attach

USB

Upstream

USB Reset

recovery

Idle

Start

completion

request

response

t2

t3

5.6 Reset

There are two different resets that the Hub experiences. One is a hardware reset (via the RESET_N pin) and the second
is a USB Bus Reset.

5.6.1 EXTERNAL HARDWARE RESET_N

A valid hardware reset is defined as, assertion of RESET_N for a minimum of 1us after all power supplies are within
operating range. While reset is asserted, the Hub (and its associated external circuitry) consumes less than 500A of
current from the upstream USB power source (300A for the Hub and 200A for the external circuitry).

Assertion of RESET_N (external pin) causes the following:

1. All downstream ports are disabled, and PRTPWR power to downstream devices is removed.

2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.

3. All transactions immediately terminate; no states are saved.

4. All internal registers return to the default state (in most cases, 00(h)).

5. The external crystal oscillator is halted.

6. The PLL is halted.

7. LED indicators are disabled.
The Hub is “operational” 500s after RESET_N is negated.
Once operational, the Hub immediately reads OEM-specific data from the external EEPROM (if the SMBus option is not

disabled).

5.6.1.1 RESET_N for Strapping Option Configuration

FIGURE 5-2: RESET_N TIMING FOR DEFAULT/STRAP OPTION MODE

TABLE 5-5: RESET_N TIMING FOR DEFAULT/STRAP OPTION MODE

Name Description MIN TYP MAX Units

t1 RESET_N Asserted. 1 sec
t2 Strap Setup Time 16.7 nsec
t3 Strap Hold Time. 16.7 1400 nsec
t4 hub outputs driven to inactive logic states 2.0 1.5 sec

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 27

USB2507

t1

t2

t4

t5 t6 t7

RESET_N

VSS

Hardware

reset

asserted

Read Strap

Options

Read EEPROM

+

Set Options

Attach

USB

Upstream

USB Reset

recovery

Idle

Start

completion

request

response

t3

TABLE 5-5: RESET_N TIMING FOR DEFAULT/STRAP OPTION MODE (CONTINUED)

Name Description MIN TYP MAX Units

t5 USB Attach (See Note). 100 msec
t6 Host acknowledges attach and signals USB Reset. 100 msec
t7 USB Idle. undefined msec
t8 Completion time for requests (with or without data

stage).

Note 1: When in Bus-Powered mode, the Hub and its associated circuitry must not consume more than 100mA from

the upstream USB power source during t1+t5.

2: All Power Supplies must have reached the operating levels mandated in Section 7.0, "DC Parameters", prior

to (or coincident with) the assertion of RESET_N.

5.6.1.2 RESET_N for EEPROM Configuration

FIGURE 5-3: RESET_N TIMING FOR EEPROM MODE

5 msec

TABLE 5-6: RESET_N TIMING FOR EEPROM MODE

Name Description MIN TYP MAX Units

t1 RESET_N Asserted. 1 sec
t2 Hub Recovery/Stabilization. 500 sec
t3 EEPROM Read / Hub Config. 2.0 99.5 msec
t4 USB Attach (See Note). 100 msec
t5 Host acknowledges attach and signals USB Reset. 100 msec
t6 USB Idle. undefined msec
t7 Completion time for requests (with or without data

5 msec

stage).

Note 1: When in Bus-Powered mode, the Hub and its associated circuitry must not consume more than 100mA from

2: All Power Supplies must have reached the operating levels mandated in Section 7.0, "DC Parameters", prior

the upstream USB power source during t4+t5+t6+t7.

to (or coincident with) the assertion of RESET_N.

DS000002251A-page 28  2007 - 2016 Microchip Technology Inc.

5.6.1.3 RESET_N for SMBus Slave Configuration

t1

t2 t4

t5

t6 t7

RESET_N

VSS

Hardware

reset

asserted

Reset

Negation

SMBus Code

Load

Attach

USB

Upstream

USB Reset

recovery

Idle

Start

completion

request

response

t3

Hub PHY

Stabilization

FIGURE 5-4: RESET_N TIMING FOR SMBUS MODE

USB2507

TABLE 5-7: RESET_N TIMING FOR SMBUS MODE

Name Description MIN TYP MAX Units

t1 RESET_N Asserted. 1 sec
t2 Hub Recovery/Stabilization. 500 sec
t3 SMBus Code Load (See Note). 10 99.5 msec
t4 Hub Configuration and USB Attach. 100 msec
t5 Host acknowledges attach and signals USB Reset. 100 msec
t6 USB Idle. Undefined msec
t7 Completion time for requests (with or without data

5 msec

stage).

Note 1: For Bus-Powered configurations, the 99.5ms (MAX) is required, and the Hub and its associated circui try

must not consume more than 100mA from the upstream USB power source during t2+t3+t4+t5+t6+t7. For
Self-Powered configurations, t3 MAX is not applicable and the time to load the configuration is determined
by the external SMBus host.

2: All Power Supplies must have reached the operating levels mandated in Section 7.0, "DC Parameters", prior

to (or coincident with) the assertion of RESET_N.

5.6.2 USB BUS RESET

In response to the upstream port signaling a reset to the Hub, the Hub does the following:

Note: The Hub does not propagate the upstream USB reset to downstream devices.

1. Sets default address to 0.

2. Sets configuration to: Unconfigured.

3. Negates PRTPWR[7:1] to all downstream ports.

4. Clears all TT buffers.

5. Moves device from suspended to active (if suspended).

6. Complies with Section 11.10 of the USB 2.0 Specification for behavior after completion of the reset sequence.
The Host then configures the Hub and the Hub’s downstream port devices in accordance with the USB Specification.

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 29

USB2507

6.0 XNOR TEST

XNOR continuity tests all signal pins on the Hub (every pin except for NC, XTAL1/CLKIN, XTAL2, ATEST/REG_EN,
RBIAS, TEST1, Power, and Ground). This functionality is enabled by driving TEST1 and CFG_SEL[1] high, driving
SCLK low and transition RESET_N from low to high. The output from the XNOR chain is driven to GR2. For each pin
tested for continuity GR2 should toggle.

DS000002251A-page 30  2007 - 2016 Microchip Technology Inc.

USB2507

7.0 DC PARAMETERS

7.1 Maximum Ratings

Parameter Symbol MIN MAX Units Comments

Storage

Temperature

Lead

Temperature

1.8V supply
voltage

T

A

V

DDA18PLL

V

DD18

-55 150 °C

325 °C Soldering < 10 seconds

-0.5 2.5 V

3.3V supply
voltage

Voltage on any

V

DDA33

V

DDA33PLL

V

DD33

V

DD33CR

-0.5 4.0 V

-0.5 (3.3V supply vo ltage + 2) 6V

I/O pin

Voltage on

-0.5 4.0 V

XTAL1

Voltage on

XTAL2

-0.5 V

+ 0.3V V

DD18

Note: Stresses above the specified parameters could cause permanent damage to the device. This is a stress

rating only and functional operation of the device at a ny condition above those in dicated in the operation
sections of this specification is not implied. When powering this device from laboratory or system power
supplies, it is important that the Absolute Maximum Ratings not be exceeded or devi ce failure can result.
Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off. In
addition, voltage transients on the AC power line may appear on the DC output. When this possibility exists,
it is suggested that a clamp circuit be used.

7.2 Recommended Operating Conditions

Parameter Symbol MIN MAX Units Comments

Operating Temperature T

1.8V supply voltage V

3.3V supply voltage V

A

DDA18PLL

V

DD18

DDA33

V

DDA33PLL

V

DD33

V

DD33CR

Voltage on any I/O pin -0.3 5.5 V If any 3.3V supply voltage drops

070°C

1.62 1.98 V

3.0 3.6 V

below 3.0V, then the MAX
becomes:

(3.3V supply voltage + 0.5)
Voltage on XTAL1 -0.3 V
Voltage on XTAL2 -0.3 V

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 31

DDA33

DD18

V
V

USB2507

TABLE 7-1: DC ELECTRICAL CHARACTERISTICS

Parameter Symbol MIN TYP MAX Units Comments

I, IS Type Input Buffer
Low Input Level
High Input Level
Input Leakage
Hysteresis (‘IS’ Only)

Input Buffer with Pull-Up
(IPU)

Low Input Level
High Input Level
Low Input Leakage
High Input Leakage

Input Buffer with Pull-Down
IPD

Low Input Level
High Input Level
Low Input Leakage
High Input Leakage

ICLK Input Buffer

V

V

V

I

HYSI

V

V

I

ILL

I

IHL

V

V

I

ILL

I

IHL

ILI

IHI

IL

ILI

IHI

ILI

IHI

2.0

-10

250 300

2.0

+26

-10

2.0

+10

-22

0.8

+10
350

0.8

+72
+10

0.8

-10

-82

V
V

uA

mV

V

V
uA
uA

V

V
uA
uA

TTL Levels

V

= 0 to V

IN

TTL Levels

= 0

V

IN

= V

V

IN

DD33

TTL Levels

= 0

V

IN

= V

V

IN

DD33

DD33

Low Input Level
High Input Level
Input Leakage
Hysteresis

O12 and I/O12 Type Buffer
Low Output Level
High Output Level
Output Leakage

OD12 Type Buffer
Low Output Level
Output Leakage

V

V

V

V
V

V

ILCK

IHCK

I

IL

HYSC

OL

OH

I

OL

OL

I

OL

2.0

-10
50

2.4

-10

0.8

+10
100

0.4

+10

0.4

+10

V
V

uA

mV

V
V

uA

V

µA

TTL Levels

= 0 to V

V

IN

= 12mA @ V

I

OL

= -4mA @ V

I

OH

= 0 to V

V

IN

(Note 1)

I

= 12mA @ V

OL

VIN = 0 to V
(Note 1)

DD33

DD33

DD33

DD33

DD33

DD33

= 3.3V

= 3.3V

= 3.3V

DS000002251A-page 32  2007 - 2016 Microchip Technology Inc.

TABLE 7-1: DC ELECTRICAL CHARACTERISTICS (CONTINUED)

Parameter Symbol MIN TYP MAX Units Comments

I/OSD12 Type Buffer

USB2507

Low Output Level
Output Leakage
Hysteresis

IO-U
(Note 2)

I-R
(Note 3)

Supply Current Unconfigured
High-Speed Host

Full-Speed Host
Supply Current

Configured
(High-Speed Host)

2 Ports @ FS/LS
2 Ports @ HS
1 Port HS, 1 Port FS/LS
4 Ports @ HS
7 Ports @ HS

Supply Current
Configured
(Full-Speed Host)

1 Port
2 Ports
3 Ports
4 Ports
7 Ports

Supply Current
Suspend

V

OL

I

OL

V

HYSI

I

CCINIT

I

CCINIT

I

HCC2

I

HCH2

I

HCH1C1

I

HCC4

I

HCC7

I

FCC1

I

FCC2

I

FCC3

I

FCC4

I

FCC7

I

CSBY

-10

250 300

100

90

180
240
225
300
360

175
175
175
175
175

225 uA Total from all supplies.

0.4
+10
350

V

µA

mV

mA
mA

mA
mA
mA
mA
mA

mA
mA
mA
mA
mA

I

= 12 mA @ V

OL

V

IN

= 0 to V

DD33

DD33

(Note 1)

Total from all supplies

Total from all supplies

= 3.3V

Note 1: Output leakage is measured with the current pins in high impedance.

2: See USB 2.0 Specification for USB DC electrical characteristics.
3: RBIAS is a 3.3V tolerant analog pin.

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 33

USB2507

CAPACITANCE TA = 25°C; fc = 1MHz; V

Parameter Symbol MIN TYP MAX Unit Test Condition

Clock Input Capacitance C

Input Capacitance C
Output Capacitance C

Power Sequencing

There are no power supply sequence restrictions for the Hub. The order in which power supplies power-up and power­down is implementation dependent.

IN

IN

OUT

DD33

= 3.3V

Limits

12 pF All pins except USB pins (and pins under

test tied to AC ground)

8pF

12 pF

DS000002251A-page 34  2007 - 2016 Microchip Technology Inc.

USB2507

8.0 AC SPECIFICATIONS

8.1 Oscillator/Clock

Crystal: Parallel Resonant, Fundamental Mode, 24 MHz 100ppm.
External Clock: 50% Duty cycle  10%, 24 MHz  100ppm, Jitter < 100ps rms.

8.1.1 SMBUS INTERFACE:

The Microchip Hub conforms to all voltage, power, and timing characteristics and specifications as set forth in the
SMBus 1.0 Specification for Slave-Only devices (except as noted in Section 5.3).

8.1.2 I2C EEPROM:

Frequency is fixed at 59KHz 

8.1.3 USB 2.0

The Hub conforms to all voltage, power, and timing characteristics and specifications as set forth in the USB 2.0 Spec­ification. Please refer to the USB Specification for more information.

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 35

USB2507

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b

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A2

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A1

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c

α

β

φ

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9.0 PACKAGE OUTLINE

FIGURE 9-1: 80-PIN TQFP PACKAGE OUTLINE (12X12X1.4MM BODY - 2MM FOOTPRINT)

DS000002251A-page 36  2007 - 2016 Microchip Technology Inc.

APPENDIX A: DATA SHEET REVISION HISTORY

TABLE A-1: REVISION HISTORY

Revision Section/Figure/Entry Correction

DS000002251A (07-29-16) Replaces previous SMSC version Rev. 2.3 (08-27-07).

USB2507

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 37

USB2507

THE MICROCHIP WEB SITE

Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make
files and information easily available to customers. Accessible by using your favorite Internet browser, the web site con­tains the following information:

• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
guides and hardware support documents, latest software releases and archived software

• General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion
groups, Microchip consultant program member listing

• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of semi­nars and events, listings of Microchip sales offices, distributors and factory representatives

CUSTOMER CHANGE NOTIFICATION SERVICE

Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive
e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or
development tool of interest.

To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notifi­cation” and follow the registration instructions.

CUSTOMER SUPPORT

Users of Microchip products can receive assistance through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales
offices are also available to help customers. A listing of sales offices and locations is included in the back of this docu­ment.

Technical support is available through the web site at: http://www.microchip.com/support

DS000002251A-page 38  2007 - 2016 Microchip Technology Inc.

USB2507

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 39

USB2507

PART NO. XXX

Package

Device

Device:

USB2507

Package:

ADT = 80-Pin TQFP

Example:

a) USB2507-ADT = 80-Pin TQFP

RoHS Compliant Package, Tray

-

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

DS000002251A-page 40  2007 - 2016 Microchip Technology Inc.

USB2507

YSTEM

CERTIFIEDBYDNV

== ISO/TS16949==

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device applications a nd the like is provided only for your convenience and may be super­seded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REP­RESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELA TED TO THE INFORMATION, INCLUDING BUT NOT LIM ITE D T O I TS CO ND ITI ON, QUAL IT Y, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use . Use of Micro-
chip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold
harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property rights unless otherwise state d.

Trademarks

The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer,
LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoL yzer , PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST , SST
Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper S peed Control, HyperLight Load, IntelliMOS, mT ouch,
Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorpor ated in the U.S.A.

Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial
Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, T ot a l Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless
DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered tradema rk of Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in

other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2007 - 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781522408093

QUALITYMANAGEMENTS

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 41

Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler an d
Te mpe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
devices, Serial EEPROMs, microperipherals, nonvolatile memor y and
analog products. In addition, Microchip’s quali ty system f or the design
and manufacture of development systems is ISO 9001:2000 certified.

®

MCUs and dsPIC® DSCs, KEELOQ

®

code hopping

Worldwide Sales and Service

AMERICAS

Corporate Office

2355 West Chandler Blvd.
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06/23/16

 2007 - 2016 Microchip Technology Inc. DS000002251A-page 42