The TC820 is a 3-3/4 digit, multi-measurement system
especiallysuitedforuse in portable instruments.It integrates a dual slope A/D converter, auto-ranging frequency counter and logic pr obe into a single 44-pin
surface mount, or 40-pin through hole package. The
TC820 operates from a single 9V input voltage (battery) and features a built-in battery low flag. Function
and decimal pointselectionareaccomplishedwithsimple logic inputs designed for direct connection to an
external microcontroller or rotary switch.
Device Selection Table
Part
Number
TC820CPL3-3/4 Digits40-Pin PDIP0°Cto+70°C
TC820CKW 3-3/4Digits 44-PinPQFP 0°Cto+70°C
TC820CLW 3-3/4 Digits 44-Pin PLCC 0°Cto+70°C
2002 Microchip TechnologyInc.DS21476B-page 1
ResolutionPackage
Operating
Temp. Range
TC820
S
Package Type
44-Pin PLCC
BC3P2
OFE2
AGD2
BC2P1
PKFE1
AGD1
BP1BT
BP3
BP2
BP1
V
DISP
BC3P2
OFE2
AGD2
BC2P1
PKFE1
AGD1
BC1BT
BP3
BP2
BP1
V
DISP
AGD3
HFE3
BC4P3
6543 1442
7
8
9
10
11
12
13
14
15
16
17
18 19 20 2123 24
DGND
AGD4
TC820CLW
LOGIC
ANNUNC
RANGE/FREQ
44-Pin PQFP
AGD3
BC4P3
HFE3
44 43 42 4139 3840
1
2
3
4
5
6
7
8
9
10
11
12 13 14 1517 18
DGND
AGD4
TC820CKW
LOGIC
ANNUNC
RANGE/FREQ
22
L–E4
16
DP0/LO
DD
L-E4
V
DP1/HI
DP0/LO
DD
V
DP1/HI
OSC3
OSC242OSC141EOC/HOLD
43
25
26
BUZIN
BUZOUT
FREQ/VOLTS
OSC1
OSC3
OSC2
37 36 35 34
19
20
21 22
BUZIN
BUZOUT
FREQ/VOLTS
INT
V
40
27 28
UR
PKHOLD
INT
V
EOC/HOLD
33
32
31
30
29
28
27
26
25
24
23
UR
PKHOLD
39
38
37
36
35
34
33
32
31
30
29
C
V
VIN+
V
V
V
C
C
COM
V
OR
C
AZ
V
BUFF
VIN+
V
IN
V
REF
V
REF
C
REF
C
REF
COM
V
SS
OR
AZ
BUFF
-
IN
REF
REF
REF
REF
SS
-
-
+
-
+
-
+
-
+
Segments L-E4
Segments AGD4
Segments BC4P3
Segments HFE3
Segments AGD3
Segments BC3P2
Segments OFE2
Segments AGD2
Segments BC2P1
Segments PKFE1
Segments AGD1
Segments BC1BT
BP3
BP2
BP1
DGND
ANNUNC
LOGIC
RANGE/FREQ
DP0/LO
40-Pin PDIP
1
2
3
4
5
6
7
8
9
TC820CPL
10
11
12
13
14
15
16
17
18
19
20
V
40
DD
OSC3
39
38
OSC2
OSC1
37
V
36
INT
C
35
AZ
V
34
BUFF
+
V
33
IN
-
V
32
IN
-
V
31
REF
+
V
30
REF
C
29
28
27
26
25
24
23
22
21
-
REF
+
C
REF
COM
V
SS
PKHOLD
FREQ/VOLT
BUZIN
BUZOUT
DP1/HI
DS21476B-page 2
2002 Microchip TechnologyInc.
Typical Applications
/
TC820
Triplex LCD
EOC
Under Range
Over Range
Analog Input
Full Scale Select
Frequency Input
Logic Probe
Input
Low Drift Voltage
Differential
Reference
3-3/4 Digit A/D
Converter
Analog GND
Auto-Ranging
Frequency
Counter
Logic Probe
Digital Ground
Logic High
Logic Low
To LCD
and Buzzer
Over RangePKHoldLow Batt
Clock
Oscillator
TC820
Peak Hold
Comparator
Peak
Hold
Triple LCD
Drivers
Low
Battery
Detect
+
9V
Annunciator Drive
Decimal
Point
Drivers
Buzzer
Driver
Function
Select
Volts
Frequency
Logic
Buzzer
Control
Decimal
Point
Select
Function
Select
C
REF
VIN+
VIN-
V
REF
V
REF
Common
V
DD
V
SS
+C
+
-
REF-VBUFF
DGND
C
Detect
UR OR
AZ
Low
Batt
V
INT
To LCD
A/D Control
DEINT
Under Range
Over Range
Range Frequency
Range
Input
EOC/
HOLD
EOC
÷2
TC820
PEAK
HOLD
OSC3OSC2OSC1
Logic
Low
Frequency Counter Input
A/D Counter Select
SEL
B
A
Low Batt
ANNUNC
V
÷8
DISP
BUZIN
Range
A/D Counter
(3999 Counts)
Comparator
A > B
Display
Latch
Logic
Triples
Drivers
SEG0 ••• BP3
Low
Buzzer
Driver
Range/
Frequency
Frequency
Volts
Logic
DP0/LO
15
DP1/HI
2002 Microchip TechnologyInc.DS21476B-page 3
TC820
1.0ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage (VDDto GND) ................................15V
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.
Analog Input Voltage:
(Either Input) (Note 1) ............................ V
Reference Input Voltage(Either Input)....... VDDto V
DD
to V
SS
SS
Digital Inputs...........................................VDDto DGND
Drive Voltage
Buzzer Frequency—5—kHzF
Counter TIme-Base Period—1—SecondF
Low Battery Flag Voltage6.777.3VV
Input Low Voltage——DGND + 1.5V
Input High VoltageVDD–1.5——V
Output Low Voltage,
VDD–1.5—DGND+0.4VIL=50µA
UR, OR Outputs
Control Pin Pull-down Current—5—µAV
may result in invaliddisplay readings,butwillnotdestroy the deviceif limitedt o ±1mA.
2: Dissipation ratings assumedevice is mounted with all leads solderedto printed circuit board.
≤ +70°C
A
≤ +85°C
A
=399mV
IN
≤ +70°C
A
≤ +85°C
=9V
S
=DGND
DISP
=40kHz
OSC
=40kHz
OSC
to V
DD
IN=VDD
A
SS
Ext Ref = 0ppm/°C
V
2002 Microchip TechnologyInc.DS21476B-page 5
TC820
2.0PIN DESCRIPTIONS
ThedescriptionsofthepinsarelistedinTable2-1.
TABLE 2-1:PIN F UNCTION TABLE
Pin Number
(40-PDIP)
140L-E4LCD segment driver for L ("logic LOW"), polarity, and "e" segment of most significant
241AGD4LCD segment drive for "a," "g," and "d" segments of MSD.
342BC4P3LCD segmentdrivefor "b" and "c" segmentsof MSD and decimal point 3.
443HFE3LCD segment drive for H ("logic HIGH"), and "f" and "e" segmentsof third LSD.
544AGD3LCD segment drive for "a," "g," and "d" segments of third LSD.
61BC3P2LCD segmentdrive for "b" and "c" segmentsof third LSD and decimal point 2.
72OFE2LCD segmentdrive for "over range," and "f" and "e" segments of second LSD.
83AGD2LCD segment drive for "a," "g," and "d" segmentsof second LSD.
94BC2P1LCD segmentdrivefor "b " and "c" segmentsof second LSD and decimal point 1.
105PKFE1LCD segment drive for "hold peak reading," and "f" and "e" segmentsof LSD.
116AGD1LCD segment drive for "a," "g," and "d" segments of LSD.
127BC1BTLCD segmentdrivefor"b"and "c" segments of LSD and "low battery."
138BP3LCD backplane#3.
149BP2LCD backplane#2.
1510BP1LCD backplane#1.
—11V
1612DGNDInternal logicdigital ground,thelogic "0" level. Nominally4.7VbelowV
1713ANNUNC Square-wave output at the backplane frequency, synchronized t o BP1. ANNUNC can be
1814LOGICLogic mode control input. When connected to V
1915RANGE/
2016DP0/LO D ual purpose input. Decimalpoint select input for voltagemeasurements. In logic mode,
Pin Number
(44-PQFP)
SymbolDescription
digit (MSD).
DISP
FREQ
Sets peak LCD drive signal: V
compensate for temperature variation of LCD crystal threshold voltage.
used to control display annunciators. Connecting an LCD segment to ANNUNC turns it
on; connecting it to its backplane turns it off.
LCD displays "OL"andthedecimal pointinputs controlthe HIGH and LOWannunciators.
When the "low" annunciator is on, the buzzer will also be on. When unconnectedor connected to DGND, the TC820 is in the Voltage/FrequencyMeasurementmode.Thispin
has a 5µA internal pull-down to DGND
Dual purposeinput. In Rangemode,whenconnected to VDD, the integration time
will be 200 counts instead of 2000 counts
connecting this pin to V
pull-down to DGND in Volts mode only. Decimalpoint logic:
willturn on the "low" LCD segment. Thereis an internal5µA
DD
PEAK
=(VDD)–V
.
DISP.VDISP
DD
mayalsobeusedto
DD
, the converteris in Logic mode. The
.
DP1
00None
01DP1
10DP2
11DP3
2117DP1/HIDual purpose input. Decimalpoint selectinput for voltagemeasurements. In Logic mode,
2218BUZOUT Buzzer output. Audio frequency, 5kHz, output which drives a piezoelectric buzzer.
2319BUZINBuzzercontrol input.Connecting BUZIN to V
2420FREQ/
VOLTS
DS21476B-page 6
connecting this pin to V
pull-down to DGND in Volts mode only.
OR’ed (internally)withthe "logiclevel low" input. There is an internal 5µApull-downto
DGND.
Voltage or frequencymeasurement selectinput. When unconnected,or connected
VOLTS to DGND, the A/D converter function is active. When connected to V
frequency counter function is active. This pin has an internal 5µA pull-down to DGND.
DPQDecimal Point Selected
will turn on the "high" LCD segment. There is an internal 5µA
DD
turns the buzzer on. BUZIN is logically
DD
2002 Microchip TechnologyInc.
DD
,the
TC820
TABLE 2-1:PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-PDIP)
2521PKHOLD Peak hold input. When connectedto VDD, the converter will only update the display if a
—22URUnder range output.Thisoutputwill be HIGH when the digitalreading is 380
—23OROver range output. This output will be HIGH when the analog signal inputis greater
new conversion value is greaterthanthepreceding value.Thus,thepeakreading will be
storedand held indefinitely. When unconnected, or connected to DGND, the converter
will operate normally. This pin has an internal 5µA pull-down to DGND.
countsor less.
than full scale. The LCD will display"OL"whenthe inputis over ranged.
Negative supply connection. Connect to negativeterminal of 9V battery.
SS
+P ositive connection for referencecapacitor.
REF
-Negative connection for reference capacitor.
REF
+High differential reference input connection.
REF
-Low differential reference input connection.
REF
-Low analog input signal connection.
IN
+High analoginput signalconnection.
IN
Buffer output. Connect to integration resistor.
BUFF
Auto-zero capacitor connection.
AZ
Integrator output. Connect to integration capacitor.
INT
/
Bi-directionalpin. Pulses low (i.e., from VDDto DGND) at the end of each conversion. If
HOLD
connected to V
LCD segmentdrive for "a," "g,"and "d" segmentsof MSD.
DD
, conversions will continue,butthe displayisnot updated.
DD
DD
.
2002 Microchip TechnologyInc.DS21476B-page 7
TC820
3.0DETAILED DESCRIPTION
The TC820 is a 3-3/4 digit measurement system combining an integrating analog-to-digital converter, frequency counter, and logic level tester in a single
package. The TC820 supersedes the TC7106 in new
designs by improving performance and reducing system cost. The TC820 adds features that are difficult,
expensive,orimpossibleto provide with olderA/D converters (see Table 3-1). The high level of integration
permitsTC820basedinstruments to deliver higher performance and more f eatures, while actually reducing
partscount.Fabricated in low power CMOS, the TC820
directly drives a 3-3/4 digit (3999 maximum) LCD.
With a maximum range of 3999 counts,the TC820 provides 10 times greater resolution in the 200mV to
400mV range than traditional 3-1/2 digit meters. An
auto-zerocycleensuresazero reading with a 0V input.
CMOS processing reduces analog input biascurrent to
only 1pA. Rollover error (the difference in readings for
equal magnitude but opposite polarity input signals) is
less than ±1 count. Differential reference inputs permit
ratiometric measurements for ohms or bridge transducer applications.
The TC820's frequency counter option simplifies
design of an instrument well-suited to both analog and
digitaltroubleshooting: voltage,current,and resistance
measurements, plus precise frequency measurements
to 4MHz ( higher frequencies can be measured with an
external pr escaler), and a simple logic probe. The frequency counter will automatically adjust its range to
match the input frequency, over a four-decade range.
Two logic level measurement inputs permit a TC820
based meter to function as a logic probe. When combinedwithexternallevel shifters,theTC820willdisplay
logiclevelson the LCD and also turn on a piezoelectric
buzzer when the measured l ogic level is low.
Other TC820 features simplify instrument design and
reduce parts count. On-chip decimal point dr ivers are
included, as is a low battery detection annunciator. A
piezoelectricbuzzer can be controlled with an external
switch or by the logic probe inputs. Two oscillator
optionsareprovided: a crystalcanbeusedifhighaccuracy frequency measurements are desired, or a simple
RC option can be used for low-end instruments.
A "peak reading hold" input allows the TC820 to retain
the highest A/D or frequency reading. This feature is
useful in measuring motor starting current, maximum
temperature, and similar applications.
A family of instruments can be created with the TC820.
No additional design effort is required to create instruments with 3-3/4 digit resolution.
The TC820 operates from a single 9V battery, with typical power of 10mW.Packages include a 40-pin plastic
DIP, 44- pin plastic flat package (PQFP), and 44-pin
PLCC.
TABLE 3-1:COMPETITIVE EVALUATION
Features ComparisonTC8207106
3-3/4 Digit ResolutionYesNo
Auto-Ranging Frequency
Counter
Logic ProbeYesNo
Decimal Point DriveYesNo
Peak Reading Hold
The TC820 analog-to-digital converter operates on t he
principle of dual slope integration. An understanding of
the dual slope conversion technique will aid the user in
followingthedetailedTC820theoryof operationfollowing this section. A conventional dual slope converter
measurement cycle has t wo distinct phases:
1.Input Signal Integration
2.Reference Voltage Integration (De-integration)
Referring to Figure 3-1, the unknown input signal to be
convertedisintegratedfromzerofora fixedtimeperiod
(t
), measured by counting clock pulses. A constant
INT
reference voltage of the opposite polarity is then integrated until the integrator output voltage returns to
zero. The reference integration (de-integration) time
(t
) is then directly proportional to the unknown
DEINT
input voltage (V
).
IN
DS21476B-page 8
2002 Microchip TechnologyInc.
TC820
g
T
In a simple dual slope converter, a complete conversion requires the integrator output to "ramp-up" from
zero and "ramp-down" back to zero. A simple mathematicalequationrelates the inputsignal,referencevoltage, and integration time.
EQUATION 3-1:
1
R
INTCINT
Where: V
REF
t
INT
t
DEINT
For a constant V
t
INT
V
IN
∫
0
= Ref erence Voltage
= I ntegration Time
= De- integration Time
:
INT
(t)dt =
V
REFtDEINT
R
INTCINT
EQUATION 3-2:
t
REF
DEINT
t
INT
VIN=V
FIGURE 3-1:BASIC DUAL SLOPE
CONVERTER
Analog
Input Signal
REF
Voltage
Output
Integrator
Fixed Signal
Integrate Time
R
Polarity Control
Accuracy in a dual slope converter is unrelated to the
integrating resistor and capacitor values as long as
they are stable during a measurement cycle. An inherent benefit of the dual slope technique is noise immunity. Noise spikes are integrated or averaged to zero
during the integration periods, making integrating
ADCs immune to the large conversion errors that
plague successive approximation converters in high
noise environments. Interfering signals, with frequency
components at multiples of the averaging (integrating)
period, will be attenuated (Figure 3-2). Integrating
ADCs commonly operate with the signal integration
period set to a multiple of the 50/60Hz power line
period.
C
Integrator
–
+
Switch
Driver
Phase
Control
Display
V
= V
IN
VIN = 1.2V
Variable Reference
Inte
rate Time
Comparator
–
+
Control
Logioc
REF
REF
Clock
Counter
FIGURE 3-2:NORMAL MODE
REJECTION O F DUAL
SLOPE CONVERTER
30
T = Measurement
Period
20
10
Normal Mode Rejection (dB)
0
0.1/T1/T10/
Input Frequency
3.2Analog Section
In addition to the basic integrate and de-integrate dual
slope phases discussed above, the TC820 design
incorporates a "zero integrator output" phase and an
"auto-zero" phase. These additional phases ensure
thatthe integratorstartsat0V(evenaftera severe over
range conversion), and that all offset voltage errors
(buffer amplifier, integrator and comparator) are
removed f rom t he conversion. A true digital zero reading is assured without any external adjustments.
A complete conversion consists of four distinctphases:
1.Zero IntegratorOutput
2.Auto-Zero
3.Signal Integrate
4.Reference De-integrate
3.2.1ZE RO INTEGRATOR OUTPUT
PHASE
This phase guarantees that the integrator output is at
0V before the system zero phase is entered, ensuring
that the true system offset voltages will be compensated for even after an over range conversion. The
duration of this phase is 500 counts plus the unused
de-integrate counts.
3.2.2AUTO-ZERO PHASE
During the auto-zero phase, the differentialinputsignal
is disconnectedfrom the measurement circuit by opening internalanalogswitches,andthe internalnodesare
shortedtoAnalogCommon(0V
input condition. Additional analog switches close a
feedback loop around the integrator and comparator to
permitcomparatoroffset voltageerrorcompensation.A
voltageestablishedon C
then compensatesforinter-
AZ
nal device offset voltages during the m easurement
cycle.The auto-zerophaseresidualis typically10µVto
15µV. The auto-zero duration is 1500 counts.
)toestablishazero
REF
2002 Microchip TechnologyInc.DS21476B-page 9
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