TC7129
4-1/2 Digit Analog-to-Digital Converters with
On-Chip LCD Drivers
Features
• Count Resolution: ±19,999
• Resolutionon 200mV Scale: 10µV
• True Differential Input and Reference
• Low Power Consumption: 500µAat9V
• Direct LCD Driver for 4-1/2 Digits, Decimal Points,
Low Battery Indicator, and Continuity Indicator
• Over Range and Under Range Outputs
• Range Select Input: 10:1
• High Common Mode Rejection Ratio: 110dB
• External Phase Compensation Not Required
Applications
• Full Featured Multimeters
• Digital Measurement Devices
Device SelectionTable
Package
Code
TC7129CPL Normal 40-PinPDIP 0°Cto+70°C
TC7129CKW Formed 44-Pin PQFP 0°Cto+70°C
TC7129CLW – 44-Pin PLCC 0°Cto+70°C
Pin
Layout
Package
Temperature
Range
General Description
The TC7129 is a 4-1/2 digit analog-to-digital converter
(ADC) that directly drives a multiplexed liquid crystal
display (LCD). Fabricated in high performance, low
power CMOS, the TC7129 AD C is designed specifically for high resolution, battery powered digital multimeter applications. The traditional dual slope method
of A/D conversion has been enhanced with a successive integration technique to produce readings accurate to better than 0.005% of full scale, and resolution
down to 10µV per count.
The TC7129 includes features important to multimeter
applications. It detects and indicates low battery condition. A continuity output drives an annunciator on the
display, and can be used with an external driver to
sound an audible alarm. Over range and under range
outputs and a range change input provide the ability to
create auto-ranging instruments. For snapshot readings, the TC7129 includes a latch-and-hold input to
freeze the present reading. Thiscombination of features
makes the TC7129 the ideal choice for full featured
multimeter and digital measurement applications.
Typical Application
Low Battery Continuity
20
13141516171819
12
9
1011
8
TC7129
29
27262524232221
28
*
0.1µF
+
150kΩ
10kΩ
+
9V
2002 Microchip TechnologyInc. DS21459B-page 1
323130
1µF
–
3534
36
20
kΩ
100kΩ
*Note: RC network between Pins 26 and 28 is not required.
+
0.1
µF
V
33
IN
39
3837
V+
5pF
1234567
120kHz
40
330kΩ
10pF
0.1µF
V+
TC7129
Package Type
ANNUNICATOR
B2, C2, LO BATT
Display
Output
Lines
, C1, CONT
B
1
A
F1, E1, DP
A
F2, E2, DP
B3, C
A
F3, E3, DP
B4, C
A4, G4, D
F4, E4, DP
OSC1
OSC3
, G1, D
1
, G2, D
2
MINUS
3
,
, G3, D
3
4
V
DP4/OR
,
BC
BP
BP
BP
DISP
1
2
3
4
5
1
6
1
7
8
2
9
2
10
11
3
12
3
13
5
14
4
15
4
16
3
17
2
18
1
19
20
40-Pin PDIP
TC7129CPL
40
OSC2
DP
39
38
DP
37
RANGE
36
DGND
REF LO
35
REF HI
34
IN HI
33
32
IN LO
31
BUFF
C
30
29
C
28
COMMON
CONTINUITY
27
INT OUT
26
INT IN
25
V+
24
23
V-
22
LATCH/HOLD
21
DP3/UR
REF
REF
1
2
-
+
, E1, DP
F
1
B2, C2, BATT
A
, G2, D
2
F2, E2, DP
B3, C
MINUS
3
,
A
, G3, D
3
F3, E3, DP
B4, C
A4, G4, D
F4, E4, DP
44-Pin QFP 44-Pin PLCC
1
, D
, CONT
1
1
, G
, C
1
1
ANNUNCIATOR
OSC3
A
B
OSC1NCOSC2
44 43 42 41 39 3840
1
1
2
3
2
4
2
5
NC
6
7
3
8
3
BC
9
4
5
,
10
4
11
4
12 13 14 15 17 18
BP3BP
1
2
BP
TC7129CKW
16
/OR
4
DISP
V
DP
NC
/UR
3
DP
1DP2
DP
RANGE
37 36 35 34
19 20 21 22
V-
V+
LATCH/HOLD
DGND
33
32
31
30
29
28
27
26
25
24
23
INT IN
REF LO
REF HI
IN HI
IN LO
BUFF
NC
C
-
REF
C
+
REF
COMMON
CONTINUITY
INT OUT
F1, E1, DP
B2, C2, BATT
A
, G2, D
2
F2, E2, DP
B3, C
MINUS
3
,
A
, G3, D
3
F3, E3, DP
B4, C
A4, G4, D
F4, E4, DP
NC
BC
4
,
1
, D
, CONT
1
1
, G
, C
1
1
A
B
6543 1442
7
1
8
9
2
10
2
11
12
13
3
3
5
4
4
18 19 20 21 23 24
3BP2
BP
ANNUNCIATOR
OSC3
OSC1NCOSC2
TC7129CLW
22
1
/OR
BP
DISP
4
V
DP
NC
/UR
3
DP
DP1DP2RANGE
43 42 41 40
25 26 27 28
V-
V+
LATCH/HOLD
DGND
39
38
37
36
35
34
33
3214
3115
3016
2917
INT IN
REF LO
REF HI
IN HI
IN LO
BUFF
NC
C
-
REF
C
+
REF
COMMON
CONTINUITY
INT OUT
DS21459B-page 2
2002 Microchip TechnologyInc.
TC7129
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage (V+ to V-).......................................15V
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.
Reference Voltage (REF HI or REF LO) ......... V+ to V-
Input Voltage (IN HI or IN LO) (Note 1)........... V+ to V-
.......................................... V+ to (DGND – 0.3V)
V
DISP
Digital Input (Pins 1, 2, 19, 20,
21, 22, 27, 37, 39, 40).......................... DGND to V+
Analog Input (Pins 25, 29, 30) ........................ V+ to V-
Package Power Dissipation (T
≤ 70°C)
A
Plastic DIP .....................................................1.23W
PLCC .............................................................1.23W
Plastic QFP ....................................................1.00W
Operating Temperature Range ............... 0°C to +70°C
StorageTemperature Range ..............-65°C t o +150°C
TC7129 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: V+ to V- = 9V, V
Pinnumbersreferto40-pinDIP.
Symbol Parameter Min Typ Max Unit Test Conditions
=1V,TA=+25°C,f
REF
= 120kHz, unless otherwise indicated.
CLK
Input
Zero InputReading -0000 0000 +0000 Counts V
Zero Reading Drift — ±0.5 — µV/°C V
Ratiometric Reading 9997 9999 10000 Counts V
RangeChange Accuracy 0.9999 1.0000 1.0001 Ratio V
RE Rollover Error — 1 2 Counts V
NL Linearity Error — 1 — Counts 200mV Scale
CMRR Common Mode Rejection Ratio — 110 — dB V
CMVR Common Mode Voltage Range — (V-) + 1.5 — V V
— (V+) – 1 — V 200mV Scale
e
N
I
IN
Power
V
COM
DGND Digital Ground Voltage 4.5 5.3 5.8 V V+ to Pin 36, V+ to V- = 9V
I
S
Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400µA. Currents above this value may
Noise (Peak-to-Peak Value not
Exceeded 95% of Time)
Input Leakage Current — 1 10 pA VIN=0V,Pins32,33
Scale Factor Temperature Coefficient — 2 7 ppm/°C V
Common Voltage 2.8 3.2 3.5 V V+ to Pin 28
CommonSinkCurrent — 0.6 — mA ∆Common = +0.1V
CommonSource Current — 10 — µA ∆Common = -0.1V
Sink Current — 1.2 — mA ∆DGND= +0.5V
Supply Voltage Range 6 9 12 V V+ to VSupplyCurrent ExcludingCommon
Current
result in invalid display readings, but will not destroy the device if limited to ±1mA. Dissipation ratings assume device is
mounted with all leads soldered to printed circuit board.
—14—µV
—0.81.3mAV+toV-=9V
P-PVIN
= 0V,200mV Scale
IN
=0V,0°C<TA<+70°C
IN
IN=VREF
IN
V
IN
IN
CM
IN
200mV Scale
IN
External V
= 1000mV, Range= 2V
=1VonHighRange,
= 0.1V on Low Range
-=VIN+ = 199mV
=1V,VIN= 0V,200mV Scale
=0V
=0V
= 199mV, 0°C < TA<+70°C
=0ppm/°C
REF
2002 Microchip TechnologyInc. DS21459B-page 3
TC7129
TC7129 ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: V+ to V- = 9V, V
Pinnumbersreferto40-pinDIP.
Symbol Parameter Min Typ Max Unit Test Conditions
f
CLK
Digital
Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400µA. Currents above this value may
ClockFrequency — 120 360 kHz
Resistance — 50 — kΩ V
V
DISP
Low Battery Flag Activation Voltage 6.3 7.2 7.7 V V+ to V-
Continuity Comparator Threshold
Voltages
Pull-down Current — 2 10 µA Pins 37, 38, 39
"Weak Output" Current
Sink/Source
Pin 22 Source Current — 40 — µA
Pin22SinkCurrent — 3 — µA
result in invalid display readings, but will not destroy the device if limited to ±1mA. Dissipation ratings assume device is
mounted with all leads soldered to printed circuit board.
=1V,TA=+25°C,f
REF
100 200 — mV V
— 200 400 mV V
—3/3— µA Pins 20, 21 Sink/Source
—3/9— µA Pin 27 Sink/Source
= 120kHz, unless otherwise indicated.
CLK
DISP
OUT
OUT
to V+
Pin27=High
Pin27=Low
DS21459B-page 4
2002 Microchip TechnologyInc.
TC7129
2.0 PIN DESCRIPTIONS
ThedescriptionsofthepinsarelistedinTable2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin No.
40-PinPDIP
1 40 2 OSC1 Input to first clock inverter.
2 41 3 OSC3 Output of second clock inverter.
3 42 4 ANNUNCIATOR Backplane square wave output for driving annunciators.
443 5B
544 6A
61 7F
72 8B
83 9A
9410F
10 5 11 B
11 7 13 A
12 8 14 F
13 9 15 B
14 10 16 A
15 11 17 F
16 12 18 BP
17 13 19 BP
18 14 20 BP
19 15 21 V
20 16 22 DP
21 18 24 DP
22 19 25 LATCH
23 20 26 V- Negative power supply terminal.
24 21 27 V+ Positive power supply terminal and positive rail for display drivers.
25 22 28 INT IN Inputto integrator amplifier.
26 23 29 INT OUT Output of integrator amplifier.
27 24 30 CONTINUITY Input: When LO, continuityflagon the displayis OFF. When HI,
28 25 31 COMMON Sets Commonmode voltage of 3.2V belowV+ for DE, 10X, etc.
29 26 32 C
30 27 33 C
31 29 35 BUFFER Output of buffer amplifier.
32 30 36 IN LO Negativeinputvoltage terminal.
33 31 37 IN HI Positive input voltage terminal.
34 32 38 REF HI Positive referencevoltage.
35 33 39 REF LO Negative reference voltage
Pin No.
44-Pin PQFP
Pin No.
44-PinPLCC
Symbol Function
, CONT Output to display segments.
1,C1
1,G1,D1
,DP1Output to display segments.
1,E1
, LO BATT Output to display segments.
2,C2
2,G2,D2
,DP2Output to display segments.
2,E2
, MINUS Output to display segments.
3,C3
3,G3,D3
,DP3Output to display segments.
3,E3
,BC5Output to display segments.
4,C4
4,D4,G4
,DP4Output to display segments.
4,E4
3
2
1
DISP
/OR Input: When HI, turns on most significant decimal point.
4
/UR Input: Second most significant decimal point on when HI.
3
Output to display segments.
Output to display segments.
Output to display segments.
Output to display segments.
Backplane #3 output to display.
Backplane #2 output to display.
Backplane #1 output to display.
Negative rail for display drivers.
Output: Pulled HI when result count exceeds ±19,999.
Output: Pulled HI when result count is less than ±1000.
/HOLD Input: When floating, ADC operates in the Free Run mode. When
pulled HI, the last displayed reading is held. When pulled LO, the
result counter contents are shown incrementing during the
de-integrate phase of cycle.
Output: Negative going edge occurs when the data latches are
updated. Can be used forconverter statussignal.
continuity flag is ON.
Output: HI whenvoltage betweeninputs is less than +200mV. LO
when voltage between inputs is more than +200mV.
Can be used as pre-regulator for external reference.
+ Positive side of external reference capacitor.
REF
REF-
Negative side of external reference capacitor.
2002 Microchip TechnologyInc. DS21459B-page 5
TC7129
TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)
Pin No.
40-PinPDIP
36 34 40 DGND Internal ground reference for digital section. See Section 4.3,
37 35 41 RANGE 3µA pull-downfor 200mV scale. Pulled HI externallyfor2V scale.
38 36 42 DP
39 37 43 DP
40 38 44 OSC2 Output of first clock inverter. Inputof second clockinverter.
— 6,17, 28, 39 12, 23, 34, 1 NC No connection.
Pin No.
44-Pin PQFP
Pin No.
44-PinPLCC
Symbol Function
±5V Power Supply.
2
Internal 3µA pull-down. When HI, decimal point 2 will be on.
Internal 3µA pull-down. When HI, decimal point 1 will be on.
1
DS21459B-page 6
2002 Microchip TechnologyInc.
TC7129
3.0 DETAILED DESCRIPTION
(All Pin Designations Refer to 40-Pin PDIP.)
The TC7129 is designed to be the heart of a high
resolution analog measurement instrument. The only
additional components required are a few passive elements: a voltage reference, an LCD, and a power
source. Most componentvalues are not critical; substitutes can be chosen based on the information given
below.
The basic circuit for a digital multimeter application is
shown i n Figure 3-1. See Section 4.0, TypicalApplications for variations.Typicalvalues for each component
are shown. The sections below give component selection criteria.
3.1 Oscillator (X
The primary criterion for selecting the crystal oscillator
is to choose a frequencythatachievesmaximumrejection of line frequency noise. To do this, the integration
phase should last an integral number of line cycles.
The integration phase of the TC7129 is 10,000 clock
cycles on the 200mV range and 1000 clock cycles on
the 2V range. One clock cycle is equal to two oscillator
cycles. For 60Hz rejection, the oscillator frequency
should be chosen so that the period of one line cycle
equals the integration time for the 2V range:
OSC,CO1,CO2,RO
)
The resistor and capacitorvalues are not critical; those
shown work for most applications. In some situations,
the capacitor values may have to be adjusted to compensate for parasitic capacitance in the circuit. The
capacitorscan be low cost ceramic devices.
Some applications can use a simple RC network
instead of a crystal oscillator. The RC oscillator has
more potential for jitter, especially in the least
significantdigit. See Section 4.8, RC Oscillator.
3.2 Integrating Resistor (R
The integrating resistor sets the charging current for
the integrating capacitor.Choose a value that provides
a current between 5µA and 20µA at 2V, the maximum
full scale input. The typical value chosen gives a
charging current of 13.3µA:
INT
)
EQUATION 3-2:
I
CHARGE
ToohighavalueforR
noise pickup and increases errors due to leakage current. Too low a value degrades the linearity of the
integration,leading to inaccurate readings.
2V
=
INT
150kΩ
13.3µA
increases the sensitivity to
EQUATION 3-1:
1/60 second = 16.7msec =
1000 clock cycles *2 OSC cycles/clock cycle
OSC Frequency
This equation gives an oscillator frequency of 120kHz.
A similar calculation gives an optimum f requency of
100kHz for 50Hz rejection.
2002 Microchip TechnologyInc. DS21459B-page 7
TC7129
FIGURE 3-1: STANDARD CIRCUIT
Low Battery Continuity
V+
20
DP
4
/OR
DP
3
/UR
V
DISP
LATCH/
HOLD
V-
V+
+
INT IN
9V
13141516171819
Display Drive Outputs
CONTINUITY
COMMON
INT OUT
27262524232221
28
C
INT
0.1µF
150kΩ
R
10kΩ
R
BIAS
12
TC7129
C
C
REF
REF
+
-
29
C
+
REF
1µF
INT
9
1011
8
IN LO
323130
0.1
µF
C
V
33
IF
IN
IN HI
REF HI
R
IF
100kΩ
BUFF
– +
REF LO
3534
36
R
REF
20
kΩ
DGND
ANNUNC
RANGE
DP
2
3837
D
REF
OSC3
DP
1
39
1234567
OSC1
OSC2
40
C
RF
0.1µF
5pF
120
kHz
330kΩ
R
O
10pF
V+
C
O1
Crystal
C
O2
3.3 Integrating Capacitor (C
INT
)
The charge stored in the integrating capacitor during
the integrate phase is directly proportional to the input
voltage. The primary selection criterion for C
INT
is to
choose a value that gives the highest voltage swing
while remaining within the high linearity portion of the
integratoroutputrange.Anintegratorswingof2V is the
recommended value. The capacitor value can be
calculated using t he following equation:
EQUATION 3-3:
t
INTxIINT
=
INT
V
SWING
is the integration time.
Where t
C
INT
Using the values derived above (assuming 60Hz
operation), the equation becomes:
EQUATION 3-4:
C
16.7msec x 13.3µA
==0.1µA
INT
2V
The capacitor should have low dielectric absorption to
ensure good integration linearity. Polypropylene and
Teflon capacitors are usually suitable. A good measurement of the dielectric absorption is to connect the
reference capacitor across the inputs by connecting:
Pin to Pin:
20 → 33 (C
30 → 32 (C
+toINHI)
REF
-toINLO)
REF
A reading between 10,000 and 9998 is acceptable;
anything lower i ndicates unacceptably high dielectric
absorption.
3.4 Reference Capacitor (C
REF
)
The reference capacitor stores the reference voltage
during several phases of the measurement cycle. Low
leakage is the primary selection criterion for this component. The value must be high enough to offset the
effectof stray capacitance at the capacitor terminals.A
valueofatleast1µF is recommended.
DS21459B-page 8
2002 Microchip TechnologyInc.
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