The TC3405 is a l ow cost, low power analog-to-digital
converter based on Microchip’s Sigma-Delta technology. I t will per form 16-bit conversions (15-bit pl us sign)
at up to eight per second. The TC3405 is optimized for
use as a microcontroller peripheral in low cost, battery
operated systems. A voltage reference is included, or
an external referencecan be used. A V
a resetgeneratorprovidesPower-on Reset and Brownout protection while an extra threshold detector is suitable for use as an early warning power fail detector,or
as a Wake-up Timer.
The TC3405’s 2-wire microPort™ digital interface is
used for starting conversions and for reading out the
data. Driving the SCLK line l ow starts a conversion.
Afterthe conversion starts, each additional falling edge
(up to six) detected on SCLK for t
the A/D resolution by one bit and cuts conversion time
in half. After a conversion is completed, clocking the
SCLK line puts the MSB t hrough LSB of the resulting
dataword onto the SDATline,much like a shift register.
The part automatically sleeps when not performing a
data conversion.
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
Absolute Maximum Ratings*
Supply Voltage .....................................................6.0V
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.
Voltage on Pin:
RESET
................................ (GND – 0.3V) to 5.5V
Input Voltage (All Other Pins):
................................. (GND – 0.3V) to (V
DD
+0.3V)
Operating Temperature Range ................. 0°C to 85°C
Storage Temperature ........................ -65°C to +150°C
TC3405 DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: TA= 25°C and VDD= 2.7V, unless otherwise specified. Boldface type specifications apply for
2: Resistance from INn+ to INn- or INn to GND.
3: @V
=1.8V,I
DD
= 1.25V, Internal Clock Frequency = 520kHz.
REF
+–VIN-).
IN
≤ 200µA.
SOURCE
DD
DD
V
V
DD
——V
——VI
DD
SOURCE
V
=400µA (Note 3 )
TC3405 AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: T
temperaturesof 0°C to 85°C. V
SymbolParameterMinTypMaxUnitTest Conditions
t
1
t
2
t
3
Resolution Reduction Clock Width1——µsecWidth of SCLK (Negative)
Resolution Reduction Clock Width1——µsecWidth of SCLK (Positive)
Conversion Time(15-bit Plus Sign)—125—msec 16-bit Conversion, TA=25°C(Note 1)
Conversion Time (14-bit Plus Sign)—t
Conversion Time (13-bit Plus Sign)—t
Conversion Time (12-bit Plus Sign)—t
Conversion Time(11-bit Plus Sign)—t
Conversion Time (10-bit Plus Sign)—t
Conversion Time(9-bitP lus Sign)—t
t
4
t
5
t
6
t
7
t
8
t
9
t
11
Resolution Reduction Window—t3/85.7—msec Widthof SCLK
SCLK to Data Valid1000——nsecSCLK FallingEdgeto SDAT Valid
Address Setup0——nsecAddress Valid to SCLK
Address Hold1000——nsecSCLK to AddressValidHold
Acknowledge Delay——1000nsecSCLKto SDAT Delay
RESET Active Time-out Period—t3*2—msecDelay from POR or Brown-out
RESET Delay5—64µsecDelay VTHFalling at 10V/msec to
Note 1: Nominal temperature driftis -2830ppm/C° for temperature less than 25°C and -1340ppm/°C for temperatures
greater than 25°C
= 25°C and VDD= 2.7V, unless otherwise specified. Boldface type specifications apply for
A
= 1.25V, Internal Clock Frequency = 520kHz.
REF
/2.0—msec15-bit Conversion
3
/4.0—msec14-bit Conversion
3
/7.8—msec13-bit Conversion
3
/15.1—msec 12-bitConversion
3
/28.6—msec 11-bit Conversion
3
/51.4—msec 10-bitConversion
3
Recovery to RESET
RESET
Low
=V
.
OH
DS21414B-page 4
2002 Microchip TechnologyInc.
TC3405
2.0PIN DESCRIPTIONS
ThedescriptionsofthepinsarelistedinTable2-1.
TABLE 2-1:PIN FUNCTION TABLE
Pin No.
(16-Pin PDIP)
(16-Pin QSOP)
1IN1+AnalogInput. This is the positive terminalof a true differential input consisting of IN1+ and IN1-.
2IN1-AnalogInput. This is the negative terminalof a true differential input consisting of IN1+ and IN1-.
3IN2Analog Input. This is the positive terminal of a true differential input with the negative input tied
4IN3Analog Input. This is the positive terminal of a true differential input with the negative input tied
5IN4Analog Input. This is the positive terminal of a true differential input with the negative input tied
6V
7REF
8GNDGround Terminal.
9REF
10SDATDigital Output (push-pull). This is the microPort™ serial data output.S DAT is driven low while the
11ENABLE Digital Input.Whenthisinput control is pulled low,t he partisinternally restarted.Thatis, any data
12RESET
13A1DigitalInput. Controlsanalogmultiplexerinconjunction withA0 to select one of thefour input
14A0DigitalInput. Controlsanalogmultiplexerinconjunction withA1 to select one of thefour input
15SCLKDigitalInput. This is the microPort™ serial clock input. The TC3405comes out of Sleep mode and a
16V
SymbolDescription
V
= (IN1+ – IN-). See Section 1.0, Electrical Characteristics.
IN1
= (IN+ – IN-) IN1- can swing to, but not below, ground. See Section 1.0, Electrical Characteristics.
V
IN1
internally to GND. See Section 1.0, Electrical Characteristics.
internally to GND. See Section 1.0, Electrical Characteristics.
internally to GND. See Section 1.0, Electrical Characteristics.
AnalogInput. This is the positive input to the internal comparator used to monitor the voltage supply.
TH
The negative input is tied to an internal reference. When V
reset generator drives RESET
AnalogInput. The converter’sreference voltageis the differentialbetween this pin and ground times
IN
two.ItmaybetieddirectlytoREF
reference voltage less than 1.25 may be used in place of REF
AnalogOutput. The internalreferenceconnects to this pin. It may be scaledexternally, and tiedto the
OUT
REF
inputto providetheconverter’s reference voltage.Caremustbe taken in connectingexternal
IN
circuitry to this pin. This pin is in a high impedance state during Sleep mode.
TC3405is converting data, effectively providing a “busy” signal. Afterthe conversion is complete,
every highto low transition on the SCLKpin putsa bit from the resulting data word on theSDAT pin
(from MSB to LSB).
conversion or data read sequence is cleared and the part goes into Sleep mode. When ENABLE
returns high, the part resumes normaloperation.
Digital Output(open drain).This is the outputoftheVDDmonitor reset generator. RESET is driven low
when a Power-on Reset or Brown-out condition is detected.
See Section 1.0, AC Electrical Characteristics.
channels. This address is latched at the falling edgeof the SCLK, which startsan A/D conversion.
A1, A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4.
channels. Thisaddress is latchedatthe fallingedgeofthe SCLK, whichstarts an A/Dconversion.A1,
A0=00=Input1;01=Input2;10=Input3;11=Input4.
conversion cycle begins when this pin is driven low. After the conversion starts, each additional
fallingedge(uptosix) detectedon SCLK for t
the conversion is complete, the data word can be shifted out on the S DAT pin by clocking the SCLK
pin.
Power SupplyInput.
DD
low. See Section 1.0, Electrical Characteristics.
or scaled using a resistor divider. Any user supplied
OUT
seconds, reduces the A/D resolution by one bit. When
4
falls belowtheinternal reference, the
TH
.
OUT
2002 Microchip TechnologyInc.DS21414B-page 5
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