Microchip Technology TC3405VQR, TC3405VPE Datasheet

TC3405
T
16-Bit, Low Cost, Low Power Sigma-Delta A/D Converter
Features
• 16-bit Resolution at Eight Conversions Per Second, Adjustable Down to 10-bit Resolution at 512 Conversions Per Second
• 1.8V – 5.5V Operation, Low Power Operating 250µA; Sleep: 35µA
• microPort™ Serial Bus Requires only two Interface Lines
• Uses Internal or External Reference
• Automatically Enters Sleep Mode when not in use
• One Differential and Three Single-ended Inputs with Built-In Multiplexer
•V
Monitor and Reset Generator Operational in
DD
Shutdown Mode
Applications
• Consumer Electronics, Thermostats, CO Monitors, Humidity Meters, Security Sensors
• Embedded Systems, Data Loggers, Portable Equipment
• Medical Instruments
Device Selection Table
Part
Number
TC3405VPE 16-PinPDIP(Narrow) 0°Cto+85°C TC3405VQR 16-PinQSOPNar row) 0°Cto+85°C
Package
Temperature
Range
Package Type
16-Pin PDIP
16-Pin QSOP
IN1+
V
REF
GND
1
215
IN1-
314
IN2
IN3
IN4
TH
IN
TC3405
413
512
611
710
89
16
V
DD
SCLK
A0
A1
RESET
ENABLE
SDAT
REF
OU
General Description
The TC3405 is a l ow cost, low power analog-to-digital converter based on Microchip’s Sigma-Delta technol­ogy. I t will per form 16-bit conversions (15-bit pl us sign) at up to eight per second. The TC3405 is optimized for use as a microcontroller peripheral in low cost, battery operated systems. A voltage reference is included, or an external referencecan be used. A V a resetgeneratorprovidesPower-on Reset and Brown­out protection while an extra threshold detector is suit­able for use as an early warning power fail detector,or as a Wake-up Timer.
The TC3405’s 2-wire microPort™ digital interface is used for starting conversions and for reading out the data. Driving the SCLK line l ow starts a conversion. Afterthe conversion starts, each additional falling edge (up to six) detected on SCLK for t the A/D resolution by one bit and cuts conversion time in half. After a conversion is completed, clocking the SCLK line puts the MSB t hrough LSB of the resulting dataword onto the SDATline,much like a shift register. The part automatically sleeps when not performing a data conversion.
TheTC3405isavailableina16-PinPDIPanda16-Pin QSOP package.
monitor with
DD
seconds reduces
4
2002 Microchip TechnologyInc. DS21414B-page 1
TC3405
Typical Application
V
BATT
+
Input 1
+
Input 2
+
Input 3
Input 4 +
V
BATT
130k
110k
C1
0.1µF
Functional Block Diagram
IN1+
IN1-
IN2
IN3
IN4
A0
R1
R2
±10%
+
+
+
+
R3
390
IN1+ IN1-
IN2+ IN3+
IN4+
V
TH
REF
REF
1 of 4
AMux
SET
DQ
CLR
V
DD
ENABLE
TC3405
RESET
IN
OUT
TC3405
Start
Conv.
SDAT
SCLK
AO
AI
V
BATT
R6
100k
V
DD
Σ
Modulator
CONV done
CONVCLK
Clock Generator
and Control
Circuitry
1.193V
Data Shift Reg.
CLKOUT
x2
I/01 I/02
I/03 I/04
RST
V
CC
µ
Controller
REF
OUT
REF
IN
SDAT
SCLK
ENABLE
DS21414B-page 2
SET
A1
V
TH
+
1.23V
DQ
CLR
Reset Delay Timer
GND
RESET
2002 Microchip TechnologyInc.
TC3405
1.0 ELECTRICAL
CHARACTERISTICS
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the
Absolute Maximum Ratings*
Supply Voltage .....................................................6.0V
operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affectdevice reliability.
Voltage on Pin:
RESET
................................ (GND – 0.3V) to 5.5V
Input Voltage (All Other Pins):
................................. (GND – 0.3V) to (V
DD
+0.3V)
Operating Temperature Range ................. 0°C to 85°C
Storage Temperature ........................ -65°C to +150°C
TC3405 DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: TA= 25°C and VDD= 2.7V, unless otherwise specified. Boldface type specifications apply for
temperaturesof 0°C to 85°C. V
Symbol Parameter Min Typ Max Unit Test Conditions
Power Supply
V
DD
I
DD
I
DDSLEEP
Supply Voltage 1.8 5.5 V SupplyCurrent, DuringDataConversion 250 µA Supply Current, Sleep Mode 35 80 µATA=+25°C
Accuracy (Dif fere ntial Inputs)
RES Resolution 16 Bits INL IntegralNon-Linearity .0038 %FSR V V
OS
V
NOISE
Offset Error ±0.9 %FSR IN+, IN- = 0V
Referred to input 60 µVrms CMR Common Mode Rejection 75 dB At DC FSE Full Scale Error 0.4% %FS PSRR Power SupplyRejection Ratio 75 dB V
INn+, INn-, INn
± Differential Input Voltage V
V
IN
Absolute Voltage RangeonINn+, INn-, INn GND V
Input Bias Current 1 100 nA C
IN
R
IN
REF
V
REF
I
REF
V
REFOUT
REF REF
Input Sampling Capacitance 2 pF
Differential Input Resistance 2.0 M Note 2
REF
IN,
OUT
REFINVoltage Range 0 1.25 V
REFINInput Current 1 µA
SINK SRC
REF
REF
REF
Voltage 1.175 1.193 V
OUT
Current Sink Capability 10 µA
OUT
Current Source Capability 300 µA
OUT
Note 1: Differential input voltage defined as (V
2: Resistance from INn+ to INn- or INn to GND. 3: @V
=1.8V,I
DD
= 1.25V, Internal Clock Frequency = 520kHz.
REF
+–VIN-).
IN
200µA.
SOURCE
38 50
DD DD
µA
DD
DD
V Note 1 V
=2.7V
=2.5Vto3.5V
2002 Microchip TechnologyInc. DS21414B-page 3
TC3405
TC3405 DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: TA= 25°C and VDD= 2.7V, unless otherwise specified. Boldface type specifications apply for
temperaturesof 0°C to 85°C. V
Symbol Parameter Min Typ Max Unit Test Conditions
SCLK, A0 A1, ENABLE
V
IL
V
IH
I
LEAK
Input Low Voltage 0.3 x
Input High Voltage 0.7xV Leakage Current 1 µA
SDAT, RESET
V
OL
V
OH
V
DDMIN
V
TH
V
CCPFI
V
THR
,PFI
OutputLow Voltage 0.4 V IOL=1.5mA OutputHighVoltage (SDAT) 0.9 x V MinimumVDDfor PFO, RESET Valid 1.1 1.3 µA
PFI Input VoltageRange 0 V
, PFI Input Current -0.1 .01 0.1 µA
V
TH
Threshold (VTH,PFI) 1.23 V Threshold Hysteresis 30 mV Threshold Tempco 30 ppm/°C
Note 1: Differential input voltage defined as (V
2: Resistance from INn+ to INn- or INn to GND. 3: @V
=1.8V,I
DD
= 1.25V, Internal Clock Frequency = 520kHz.
REF
+–VIN-).
IN
200µA.
SOURCE
DD
DD
V
V
DD
——V
——VI
DD
SOURCE
V
=400µA (Note 3 )
TC3405 AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: T
temperaturesof 0°C to 85°C. V
Symbol Parameter Min Typ Max Unit Test Conditions
t
1
t
2
t
3
Resolution Reduction Clock Width 1 µsec Width of SCLK (Negative) Resolution Reduction Clock Width 1 µsec Width of SCLK (Positive) Conversion Time(15-bit Plus Sign) 125 msec 16-bit Conversion, TA=25°C(Note 1) Conversion Time (14-bit Plus Sign) t Conversion Time (13-bit Plus Sign) t Conversion Time (12-bit Plus Sign) t Conversion Time(11-bit Plus Sign) t Conversion Time (10-bit Plus Sign) t Conversion Time(9-bitP lus Sign) t
t
4
t
5
t
6
t
7
t
8
t
9
t
11
Resolution Reduction Window t3/85.7 msec Widthof SCLK SCLK to Data Valid 1000 nsec SCLK FallingEdgeto SDAT Valid Address Setup 0 nsec Address Valid to SCLK Address Hold 1000 nsec SCLK to AddressValidHold Acknowledge Delay 1000 nsec SCLKto SDAT Delay RESET Active Time-out Period t3*2 msec Delay from POR or Brown-out
RESET Delay 5 64 µsec Delay VTHFalling at 10V/msec to
Note 1: Nominal temperature driftis -2830ppm/C° for temperature less than 25°C and -1340ppm/°C for temperatures
greater than 25°C
= 25°C and VDD= 2.7V, unless otherwise specified. Boldface type specifications apply for
A
= 1.25V, Internal Clock Frequency = 520kHz.
REF
/2.0 msec 15-bit Conversion
3
/4.0 msec 14-bit Conversion
3
/7.8 msec 13-bit Conversion
3
/15.1 msec 12-bitConversion
3
/28.6 msec 11-bit Conversion
3
/51.4 msec 10-bitConversion
3
Recovery to RESET
RESET
Low
=V
.
OH
DS21414B-page 4
2002 Microchip TechnologyInc.
TC3405
2.0 PIN DESCRIPTIONS
ThedescriptionsofthepinsarelistedinTable2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin No.
(16-Pin PDIP)
(16-Pin QSOP)
1 IN1+ AnalogInput. This is the positive terminalof a true differential input consisting of IN1+ and IN1-.
2 IN1- AnalogInput. This is the negative terminalof a true differential input consisting of IN1+ and IN1-.
3 IN2 Analog Input. This is the positive terminal of a true differential input with the negative input tied
4 IN3 Analog Input. This is the positive terminal of a true differential input with the negative input tied
5 IN4 Analog Input. This is the positive terminal of a true differential input with the negative input tied
6V
7REF
8 GND Ground Terminal. 9REF
10 SDAT Digital Output (push-pull). This is the microPort™ serial data output.S DAT is driven low while the
11 ENABLE Digital Input.Whenthisinput control is pulled low,t he partisinternally restarted.Thatis, any data
12 RESET
13 A1 DigitalInput. Controlsanalogmultiplexerinconjunction withA0 to select one of thefour input
14 A0 DigitalInput. Controlsanalogmultiplexerinconjunction withA1 to select one of thefour input
15 SCLK DigitalInput. This is the microPort™ serial clock input. The TC3405comes out of Sleep mode and a
16 V
Symbol Description
V
= (IN1+ – IN-). See Section 1.0, Electrical Characteristics.
IN1
= (IN+ – IN-) IN1- can swing to, but not below, ground. See Section 1.0, Electrical Characteristics.
V
IN1
internally to GND. See Section 1.0, Electrical Characteristics.
internally to GND. See Section 1.0, Electrical Characteristics.
internally to GND. See Section 1.0, Electrical Characteristics. AnalogInput. This is the positive input to the internal comparator used to monitor the voltage supply.
TH
The negative input is tied to an internal reference. When V reset generator drives RESET
AnalogInput. The converter’sreference voltageis the differentialbetween this pin and ground times
IN
two.ItmaybetieddirectlytoREF reference voltage less than 1.25 may be used in place of REF
AnalogOutput. The internalreferenceconnects to this pin. It may be scaledexternally, and tiedto the
OUT
REF
inputto providetheconverter’s reference voltage.Caremustbe taken in connectingexternal
IN
circuitry to this pin. This pin is in a high impedance state during Sleep mode.
TC3405is converting data, effectively providing a “busy” signal. Afterthe conversion is complete, every highto low transition on the SCLKpin putsa bit from the resulting data word on theSDAT pin (from MSB to LSB).
conversion or data read sequence is cleared and the part goes into Sleep mode. When ENABLE returns high, the part resumes normaloperation.
Digital Output(open drain).This is the outputoftheVDDmonitor reset generator. RESET is driven low when a Power-on Reset or Brown-out condition is detected. See Section 1.0, AC Electrical Characteristics.
channels. This address is latched at the falling edgeof the SCLK, which startsan A/D conversion. A1, A0 = 00 = Input 1; 01 = Input 2; 10 = Input 3; 11 = Input 4.
channels. Thisaddress is latchedatthe fallingedgeofthe SCLK, whichstarts an A/Dconversion.A1,
A0=00=Input1;01=Input2;10=Input3;11=Input4.
conversion cycle begins when this pin is driven low. After the conversion starts, each additional fallingedge(uptosix) detectedon SCLK for t the conversion is complete, the data word can be shifted out on the S DAT pin by clocking the SCLK pin.
Power SupplyInput.
DD
low. See Section 1.0, Electrical Characteristics.
or scaled using a resistor divider. Any user supplied
OUT
seconds, reduces the A/D resolution by one bit. When
4
falls belowtheinternal reference, the
TH
.
OUT
2002 Microchip TechnologyInc. DS21414B-page 5
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