Microchip Technology PICkit™ 3 Starter Kit User’s Guide

PICkit™ 3 Starter Kit

User’s Guide

 2012 Microchip Technology Inc. DS41628B

Note the following details of the code protection feature on Microchip devices:

YSTEM

CERTIFIED BY DNV

== ISO/TS 16949 ==

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, K PICSTART, PIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MTP, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.

Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.

Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries.

All other trademarks mentioned herein are property of their respective companies.

Printed on recycled paper.

ISBN: 9781620766972

EELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,

logo, rfPIC, SST, SST Logo, SuperFlash

QUALITY MANAGEMENT S

DS41628B-page 2  2012 Microchip Technology Inc.

Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

MCUs and dsPIC® DSCs, KEELOQ

code hopping

PICkit™ 3 STARTER KIT USER’S GUIDE

Table of Contents

Chapter 1. Overview

1.1 Introduction ............................................................................................. 13

1.2 Highlights ................................................................................................ 13

1.3 What’s New ............................................................................................ 13

1.4 Included Items ........................................................................................ 13

1.5 The Low Pin Count Board ...................................................................... 14

1.6 Software Overview ................................................................................. 15

1.7 Running the Demonstrations .................................................................. 15

Chapter 2. PIC® MCU Architecture

2.1 Introduction ............................................................................................. 17

2.2 Core Basics ........................................................................................... 17

2.3 Data/Program Bus .................................................................................. 20

2.4 Accumulator ............................................................................................ 20

2.5 Instructions ............................................................................................. 20

2.6 Byte ........................................................................................................ 21

2.7 Bit ........................................................................................................... 21

2.8 Literal ...................................................................................................... 21

2.9 Control .................................................................................................... 22

2.10 Stack Level ............................................................................................. 25

2.11 Memory Organization ............................................................................. 25

2.12 Program Memory .................................................................................... 25

2.12.1 Flash Program Memory ......................................................................... 25

2.12.2 Configuration Words .............................................................................. 25

2.12.3 Device ID ............................................................................................... 25

2.12.4 Revision ID ............................................................................................ 26

2.12.5 User ID .................................................................................................. 27

2.13 Data Memory .......................................................................................... 27

2.13.1 Core Registers ....................................................................................... 28

2.13.2 Special Function Registers .................................................................... 28

2.13.3 General Purpose RAM .......................................................................... 28

2.13.4 Common RAM ....................................................................................... 28

2.14 Banks ...................................................................................................... 28

2.15 Data EEPROM Memory ......................................................................... 34

2.16 Programming Basics .............................................................................. 34

2.16.1 MPASM™ Assembler Operation ........................................................... 34

2.16.2 XC8 Operation ....................................................................................... 34

2.16.3 Numbers in the Assembler .................................................................... 36

2.16.4 Numbers in the XC8 Compiler ............................................................... 36

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PICkit™ 3 STARTER KIT USER’S GUIDE

2.17 MPASM Assembler Directives ................................................................ 36

2.17.1 Banksel .................................................................................................36

2.17.2 cblock .....................................................................................................36

2.17.3 Org (addr) ..............................................................................................37

2.17.4 End .........................................................................................................37

2.17.5 Errorlevel ...............................................................................................37

2.17.6 #include ..................................................................................................37

Chapter 3. Lessons

3.1 Lessons .................................................................................................. 40

3.2 Lesson 1: Hello World (Turn on an LED) ................................................ 41

3.2.1 Introduction ............................................................................................41

3.2.2 Hardware Effects ...................................................................................41

3.2.3 Summary ................................................................................................41

3.2.4 New Registers ........................................................................................41

3.2.5 New Instructions ....................................................................................42

3.2.6 Assembly ...............................................................................................43

3.2.7 C Language ...........................................................................................45

3.3 Lesson 2: Blink ....................................................................................... 46

3.3.1 Introduction ............................................................................................46

3.3.2 Hardware Effects ...................................................................................46

3.3.3 Summary ................................................................................................46

3.3.4 New Registers ........................................................................................46

3.3.5 New Instructions ....................................................................................46

3.3.6 Assembly ...............................................................................................47

3.3.7 C Language ...........................................................................................49

3.4 Lesson 3: Rotate ................................................................................... 50

3.4.1 Introduction ............................................................................................50

3.4.2 Hardware Effects ...................................................................................50

3.4.3 Summary ................................................................................................50

3.4.4 New Registers ........................................................................................50

3.4.5 New Instructions ....................................................................................50

3.4.6 Assembly ...............................................................................................51

3.4.7 C Language ...........................................................................................53

3.5 Lesson 4: Analog-to-Digital Conversion ................................................. 54

3.5.1 Introduction ............................................................................................54

3.5.2 Hardware Effects ...................................................................................54

3.5.3 Summary ................................................................................................54

3.5.4 New Registers ........................................................................................54

3.5.5 New Instructions ....................................................................................56

3.5.6 Assembly ...............................................................................................57

3.5.7 C Language ...........................................................................................57

3.6 Lesson 5: Variable Speed Rotate ........................................................... 59

3.6.1 Introduction ............................................................................................59

3.6.2 Hardware Effects ...................................................................................59

3.6.3 Summary ................................................................................................59

3.6.4 New Registers ........................................................................................59

3.6.5 New Instructions ....................................................................................59

3.6.6 Assembly ...............................................................................................61

3.6.7 C Language ...........................................................................................61

DS41628B-page 4  2012 Microchip Technology Inc.

3.7 Lesson 6: Debounce ............................................................................... 62

3.7.1 Introduction ............................................................................................ 62

3.7.2 Hardware Effects ................................................................................... 62

3.7.3 Summary ............................................................................................... 63

3.7.4 New Registers ....................................................................................... 63

3.7.5 New Instructions .................................................................................... 63

3.7.6 Assembly ............................................................................................... 63

3.7.7 PIC18 ..................................................................................................... 63

3.7.8 C Language ........................................................................................... 63

3.8 Lesson 7: Reversible Variable Speed Rotate ......................................... 64

3.8.1 Introduction ............................................................................................ 64

3.8.2 Hardware Effects ................................................................................... 64

3.8.3 Summary ............................................................................................... 64

3.8.4 New Registers ....................................................................................... 65

3.8.5 New Instructions .................................................................................... 65

3.8.6 Assembly ............................................................................................... 65

3.8.7 C Language ........................................................................................... 66

3.9 Lesson 8: Pulse-Width Modulation (PWM) ............................................. 67

3.9.1 Introduction ............................................................................................ 67

3.9.2 Hardware Effects ................................................................................... 67

3.9.3 Summary ............................................................................................... 67

3.9.4 New Registers ....................................................................................... 67

3.9.5 Assembly ............................................................................................... 70

3.10 Lesson 9: Timer0 .................................................................................... 71

3.10.1 Introduction ............................................................................................ 71

3.10.2 Hardware Effects ................................................................................... 71

3.10.3 Summary ............................................................................................... 71

3.10.4 New Registers ....................................................................................... 71

3.10.5 Assembly ............................................................................................... 72

3.10.6 C Language ........................................................................................... 72

3.11 Lesson 10: Interrupts and Pull-ups ......................................................... 73

3.11.1 Introduction ............................................................................................ 73

3.11.2 Hardware Effects ................................................................................... 73

3.11.3 Summary ............................................................................................... 73

3.11.4 New Registers ....................................................................................... 75

3.11.5 New Instructions .................................................................................... 76

3.11.6 Assembly ............................................................................................... 76

3.11.7 C Language ........................................................................................... 77

3.12 Lesson 11: Indirect Addressing .............................................................. 78

3.12.1 Introduction ............................................................................................ 78

3.12.2 Hardware Effects ................................................................................... 78

3.12.3 Summary ............................................................................................... 78

3.12.4 New Registers ....................................................................................... 80

3.12.5 New Instructions .................................................................................... 80

3.12.6 Assembly Language .............................................................................. 81

3.12.7 C language ............................................................................................ 82

3.13 Lesson 12: Look-up Table ..................................................................... 83

3.13.1 Intro ....................................................................................................... 83

3.13.2 Hardware Effects ................................................................................... 83

3.13.3 Summary ............................................................................................... 83

 2012 Microchip Technology Inc. DS41628B-page 5

PICkit™ 3 STARTER KIT USER’S GUIDE

3.13.4 New Registers ........................................................................................83

3.13.5 New Registers ........................................................................................85

3.13.6 New Instructions: ...................................................................................86

3.13.7 Assembly Language ..............................................................................87

3.13.8 C Language ...........................................................................................90

3.14 Lesson 13: EEPROM ............................................................................. 92

3.14.1 Introduction ............................................................................................92

3.14.2 Hardware Effects ...................................................................................92

3.14.3 Summary ................................................................................................92

3.14.4 New Registers ........................................................................................93

3.14.5 New Instructions ....................................................................................93

3.14.6 Assembly Language ..............................................................................93

3.14.7 C Language ...........................................................................................94

Appendix A. Block Diagram and MPLAB® X Shortcuts

A.1 Useful MPLAB® X Shortcuts .................................................................. 96

A.2 Finding Register Names ......................................................................... 96

A.3 PIC MCU Assembly Coding Practices: ................................................... 96

DS41628B-page 6  2012 Microchip Technology Inc.

PICkit™ 3 STARTER KIT USER’S GUIDE

Preface

NOTICE TO CUSTOMERS

All documentation becomes dated, and this manual is no exception. Microchip tools and documentation are constantly evolving to meet customer needs, so some actual dialogs and/or tool descriptions may differ from those in this document. Please refer to our web site (www.microchip.com) to obtain the latest documentation available.

Documents are identified with a “DS” number. This number is located on the bottom of each page, in front of the page number. The numbering convention for the DS number is “DSXXXXXA”, where “XXXXX” is the document number and “A” is the revision level of the document.

For the most up-to-date information on development tools, see the MPLAB Select the Help menu, and then Topics to open a list of available online help files.

INTRODUCTION

This chapter contains general information that will be useful to know before using the PICkit™ 3 Starter Kit User’s Guide. Items discussed in this chapter include:

• Document Layout

• Conventions Used in this Guide

• Warranty Registration

• Recommended Reading

• The Microchip Web Site

• Development Systems Customer Change Notification Service

• Customer Support

• Document Revision History

IDE online help.

DOCUMENT LAYOUT

This document describes how to use the PICkit™ 3 Starter Kit User’s Guide as a development tool to emulate and debug firmware on a target board. The manual layout is as follows:

• Section Chapter 1. “Overview”

• Section Chapter 2. “PIC® MCU Architecture”

• Section Chapter 3. “Lessons”

• Appendix A. “Block Diagram and MPLAB® X Shortcuts”

 2012 Microchip Technology Inc. DS41628B-page 7

PICkit™ 3 Starter Kit User’s Guide

CONVENTIONS USED IN THIS GUIDE

This manual uses the following documentation conventions:

DOCUMENTATION CONVENTIONS

Description Represents Examples

Arial font:

Italic characters Referenced books MPLAB

Emphasized text ...is the only compiler...

Initial caps A window the Output window

A dialog the Settings dialog A menu selection select Enable Programmer

Quotes A field name in a window or

dialog

Underlined, italic text with right angle bracket

Bold characters A dialog button Click OK

N‘Rnnnn A number in verilog format,

Text in angle brackets < > A key on the keyboard Press <Enter>, <F1>

Courier New font:

Plain Courier New Sample source code #define START

Italic Courier New A variable argument file.o, where file can be

Square brackets [ ] Optional arguments mcc18 [options] file

Curly brackets and pipe character: { | }

Ellipses... Replaces repeated text var_name [,

A menu path File>Save

A tab Click the Power tab

where N is the total number of digits, R is the radix and n is a digit.

Filenames autoexec.bat File paths c:\mcc18\h Keywords _asm, _endasm, static Command-line options -Opa+, -Opa- Bit values 0, 1 Constants 0xFF, ‘A’

Choice of mutually exclusive arguments; an OR selection

Represents code supplied by user

IDE User’s Guide

“Save project before build”

4‘b0010, 2‘hF1

any valid filename

[options]

errorlevel {0|1}

var_name...] void main (void)

{ ... }

DS41628B-page 8  2012 Microchip Technology Inc.

WARRANTY REGISTRATION

Please complete the enclosed Warranty Registration Card and mail it promptly. Sending in the Warranty Registration Card entitles users to receive new product updates. Interim software releases are available at the Microchip web site.

1.1 INTRODUCTION

This chapter introduces the hardware that is included in the kit, as well as a quick start to downloading and installing the accompanying software.

1.2 HIGHLIGHTS

This chapter discusses:

-What’s New

- Included Items

- The Low Pin Count (LPC) Board Hardware

- Software Overview

- Running the Demonstrations

1.3 WHAT’S NEW

This kit is an update to the PICkit™ 2 Starter Kit. Modifications to the previous LPC board (DM164120-1) were made so that the full functionality of the code can be debugged without the need of a debug header. The software has also been rewritten to accommodate new technologies. The following is a list of new features:

1. Software is in both the ‘C’ and assembler language

2. Extension of the number of lessons and modules covered

3. MPLAB

4. New PIC16 enhanced mid-range and PIC18 routines

5. Uses the universal XC8 compiler

The following is a list of hardware changes to the LPC board:

1. Potentiometer connected to RA4 (formerly to RA0)

2. Switch connected to RA2 (formerly to RA3)

This new LPC board is still backwards compatible. Bridging the old pins to the new pins will restore functionality.

PICkit™ 3 STARTER KIT USER’S GUIDE

Chapter 1. Overview

X support as well as the older MPLAB® 8

1.4 INCLUDED ITEMS

1. 1x PICkit 3 Programmer

2. 1x Micro USB cable

3. 1x LPC Board (Part Number : DM164130-9)

4. 1x PIC16F1829-I/P

5. 1x PIC18F14K22 -I/P

The 13 lessons can be downloaded from the web.

The PIC16F1829 is a new enhanced mid-range device, which supports more features than the older mid-range PIC16 parts.

 2012 Microchip Technology Inc. DS41628B-page 13

PICkit™ 3 Starter Kit User’s Guide

20-pin DIP

Socket

External Power

Push Button

ICSP™ Programming Header

14-pin Expansion Header

Generous Prototyping

Area

Potentiometer

LEDs

The software associated with the kit supports the PIC16F1829 and PIC18F14K22. The software is intended to run on these two devices, although the software can be easily ported to other devices.

1.5 THE LOW PIN COUNT BOARD

Support for 18-pin devices requires some board modifications. 14- and 20-pin PIC devices will have full access to all of the human interface devices. If an 8-pin part is used, then the LEDs will have to be bridged to the necessary pins on the PIC MCU. The switch and potentiometer are already connected to pins that are supported by an 8-pin device. The board provides holes next to the LEDs that can be easily soldered to in order to create any desired hardware changes.

The board is programmable by an In-Circuit Serial Programmer™ (ICSP™), such as a PICkit™ programmer. The board should be supplied with 5V. Figure 1-1 shows the LPC Demo Board.

FIGURE 1-1: DEMO BOARD HARDWARE LAYOUT

Ta bl e 1 -1 lists the components that are connected to the two PIC devices that come

with the board.

TABLE 1-1: PIN ASSIGNMENTS

Device LEDs <DS4:DS1> Switch – SW1 Potentiometer – RP1

PIC16F1829 <RC4:RC0> RA2 RA4

PIC18F14K22 <RC4:RC0> RA2 RA4

DS41628B-page 14  2012 Microchip Technology Inc.

1.6 SOFTWARE OVERVIEW

This guide will assume that the reader has a basic knowledge of electronics. The reader does not need to have any programming experience with a PIC MCU before reading, although a basic knowledge of programming and what the difference between a bit and byte will help.

The software is written in both assembly and ‘C’ in the MPLAB X and MPLAB 8 integrated design environment (IDE). The assembly version is more complex and requires more lines of code, however it is closely tied to the PIC device’s hardware and the reader will gain a much better understanding by doing these lessons in parallel with the ‘C’ routines. The ‘C’ programming language is a higher level language assembly, hence it provides the reader with an easier to read flow of the program. Each lesson has both versions and are functionally equivalent.

It is recommended that the lessons be followed sequentially, as presented, since most of the lessons build up on one another. Each new program will introduce a new peripheral or concept. This guide is not intended to be read without following along in the code.

The PIC18 and enhanced PIC16 programs will be presented side-by-side and their differences and similarities explained.

1.7 RUNNING THE DEMONSTRATIONS

Overview

The board comes preprogrammed with a lesson. To use this program, either apply 5V to the power header (P2), or connect a programmer to the programmer header (P1) and apply 5V through the programmer in the IDE. The demo program will blink the four red LEDs in succession. Press the push button (SW1), and the sequence will reverse. Rotate the potentiometer (RP1), and the light sequence will blink at a different rate. This demo program is developed through the first seven lessons in this guide.

 2012 Microchip Technology Inc. DS41628B-page 15

PICkit™ 3 Starter Kit User’s Guide

NOTES:

DS41628B-page 16  2012 Microchip Technology Inc.

Chapter 2. PIC® MCU Architecture

Data Bus

Program

Bus

Instruction reg

Program Counter

8 Level Stack

(13-bit)

Direct Addr

Addr MUX

FSR reg

STATUS reg

MUX

ALU

Power-up

Timer

Oscillator

Start-up Timer

Power-on

Reset

Watchdog

Timer

Instruction

Decode &

Control

Timi ng

Generation

OSC1/CLKIN

OSC2/CLKOUT

Brown-out

Reset

Internal

Oscillator

Block

Configuration

Data Bus

Program

Bus

Instruction reg

Program Counter

8 Level Stack

(13-bit)

Addr MUX

FSR reg

STATUS reg

MUX

ALU

W Reg

Instruction

Decode &

Control

Timi ng

Generation

Internal

Oscillator

Block

Configuration

Data Bus

Program

Bus

Instruction Reg

Program Counter

16-Level Stack

(15-bit)

RAM Addr

Addr MUX

Indirect

Addr

FSR0 Reg

STATUS Reg

MUX

ALU

Instruction

Decode and

Control

Timi ng

Generation

Internal

Oscillator

Block

Configuration

Flash

Program

Memory

RAM

FSR regFSR reg

FSR1 Reg

MUX

Program Memory

Read (PMR)

FSR regFSR reg

BSR Reg

2.1 INTRODUCTION

This chapter describes the architecture of the enhanced mid-range PIC16F1829 (DS41440), as well as the PIC18 (DS41365).

2.2 CORE BASICS

Enhanced PIC16 and PIC18 devices use a modified Harvard architecture, meaning the code memory and data memory are independent. This allows faster execution because code instructions and data can be accessed simultaneously. The subsequent instruction is fetched while decoding and executing the current instruction. In Figure 2-1 and

Figure 2-3, the reader should notice the separate lines for data bus and program bus.

This guide will cover nearly all of the registers and modules as seen in the following figures. The following block diagrams should be referenced while each lesson is being performed in order to understand the interactions.

PICkit™ 3 STARTER KIT USER’S GUIDE

FIGURE 2-1: SIMPLIFIED ENHANCED MID-RANGE PIC

MCU BLOCK DIAGRAM

 2012 Microchip Technology Inc. DS41628B-page 17

PICkit™ 3 Starter Kit User’s Guide

PORTA

EUSART

Comparators

MSSP

Timer2Timer1 Timer4Timer0

ECCP1

ADC

10-Bit

ECCP2 ECCP3 CCP4 CCP5

Timer6

PORTB

PORTC

PORTD

PORTE

LCD

Latch

Note 1: See applicable chapters for more information on peripherals.

CPU

Program

Flash Memory

EEPROM

RAM

Timing

Generation

INTRC

Oscillator

MCLR

OSC1/CLKIN

OSC2/CLKOUT

Figure 2-1

FIGURE 2-2: SIMPLIFIED ENHANCED MID-RANGE PIC® MCU DATA BLOCK DIAGRAM

DS41628B-page 18  2012 Microchip Technology Inc.

FIGURE 2-3: SIMPLIFIED PIC18 BLOCK DIAGRAM

Instruction

Decode and

Control

PORTA

PORTB

PORTC

RA1

RA0

Data Latch

Data Memory

Address Latch

Data Address<12>

Access

BSR

FSR0 FSR1 FSR2

inc/dec

logic

Address

PCH PCL

PCLATH

31-Level Stack

Program Counter

PRODLPRODH

8 x 8 Multiply

BITOP

ALU<8>

Table Pointer<21>

inc/dec logic

Data Bus<8>

Table Latch

ROM Latch

PCLATU

PCU

Note 1: RA3 is only available when MCLR functionality is disabled.

2: OSC1/CLKIN and OSC2/CLKOUT are only available in select oscillator modes and when these pins are

not being used as digital I/O.

EUSARTComparator

MSSP

10-bit

ADC

Timer2Timer1 Timer3Time r0

ECCP1

BOR

Data

EEPROM

Instruction Bus <16>

STKPTR

Bank

State machine control signals

Decode

Power-up

Timer

Oscillator

Start-up Timer

Power-on

Reset

Watchdog

Timer

OSC1

(2)

OSC2

(2)

VDD,

Internal

Oscillator

Fail-Safe

Clock Monitor

Precision

Reference

Band Gap

MCLR

(1)

Block

LFINTOSC

Oscillator

16 MHz

Oscillator

Single-Supply Programming

FVR

REF

Address Latch

Program Memory

Data Latch

REF

RA3 RA4 RA5

RB4 RB5 RB6 RB7

RC0 RC1

RC2

RC3 RC4 RC5 RC6 RC7

(512/768 bytes)

RA1

PIC® MCU Architecture

 2012 Microchip Technology Inc. DS41628B-page 19

PICkit™ 3 Starter Kit User’s Guide

T c lock cycle

OSC

-------------=

4 * T

FOSC

-------------

4 MHz

------------- ----

1 µs== =

BTFSS PORTA, RA0

2.3 DATA/PROGRAM BUS

The data bus is connected to the outside world via port pins, as well as all of the peripheral registers (timers, ADC, PWM). The program bus connects to the Flash memory where the program is stored. This is where assembled code is programmed to.

2.4 ACCUMULATOR

There is only one accumulator – the working register (WREG). The accumulator handles all data bus related tasks, such as mathematical operations. The ALU only deals with 8-bit sized data – hence the categorical names of 8/16/32-bit micros.

2.5 INSTRUCTIONS

Instructions tell what the PIC device should do, whether it is shifting a few bits or jumping to a new line in code. They form the very essence of each program in program memory. All enhanced mid-range PIC devices have only 49 instructions. The PIC18 has 75 available instructions. Since there are very few instructions needed to learn, the PIC device can be referred to as a “reduced instruction set computing”, or RISC, processor.

Each instruction will be explained in detail as they are introduced in each lesson. For now, the basis of what makes up each instruction will be explained.

One instruction cycle consists of four clock cycles. This means that if the PIC MCU is running at 4 MHz, each instruction will take one microsecond, as seen in Equation 2-1.

EQUATION 2-1: INSTRUCTION TIME

All instructions are executed in a single instruction cycle, unless a conditional test is true, or the program counter (PC) is changed. In these cases, the execution takes two instruction cycles, with the additional instruction cycle executed as a NOP (do nothing), see Example 2-1.

EXAMPLE 2-1:

This takes two instruction cycles only if pin RA0 is set (active-high), since the skip operation affects the PC.

The PIC18 has a larger word size than the enhanced PIC16 architecture. The PIC18 has a 16-bit wide word containing the operation code (opcode) and all required operands. The enhanced PIC16 has a 14-bit wide word. An opcode is interpreted by the processor and is unique to each instruction.

The opcodes are broken into four formats:

1. Byte oriented

2. Bit oriented

3. Literal

4. Control

DS41628B-page 20  2012 Microchip Technology Inc.

2.6 BYTE

ADDWF data,f

BSF PORTA,RA0

MOVLW ‘A’

PIC® MCU Architecture

All byte instructions on the enhanced PIC16 contain a 6-bit opcode, 7-bit file address, and a destination bit. All PIC18 byte instructions contain a 6-bit opcode, 8-bit file address, a destination bit, and a RAM access bit.The sum of all the bit field sizes confirms that the PIC16 enhanced core does indeed have a 14-bit wide word size for instructions. Likewise, the same can be seen for the PIC18 for its 16-bit wide word length.

The RAM access bit (a) on the PIC18 is set when the user wishes to use the Bank Select Register (BSR) for manually selecting the bank. The PIC16 user will always need to make sure that they are in the correct bank by using the ‘banksel’ directive. This is explained in the first few lessons.

The destination bit (d) specifies whether the result will be stored in WREG or back in the original file register. When ‘d’ is zero, the result is placed in the WREG resister. Otherwise, the result is placed in the file register.

The file register (f) specifies which register to use. This can be a Special Function Register (SFR) or General Purpose Register (GPR).

EXAMPLE 2-2:

2.7 BIT

2.8 LITERAL

This adds the contents of WREG and data, with the result being saved back to the file register data.

The PIC18 can move data from one file register directly to another file register, circumventing the WREG. All file moves in the enhanced PIC16 architecture must go through the WREG.

Bit instructions operate on a specific bit within a file register. These instructions may set or clear a specific bit within a file register. They may also be used to test a specific bit within a file register. All bit instructions on the enhanced PIC16 contain a 4-bit opcode, 7-bit file address, and a 3-bit bit address. All PIC18 byte instructions contain a 4-bit opcode, 8-bit file address, 3-bit bit address and a RAM access bit.

EXAMPLE 2-3:

This sets pin RA0 in the PORTA register.

Literal operations contain the data operand within the instruction. Both architectures use an 8-bit intermediate value. The rest of the bits are reserved for the opcode.

EXAMPLE 2-4:

This moves the ASCII value of ‘A’ (0x41) into WREG.

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PICkit™ 3 Starter Kit User’s Guide

2.9 CONTROL

Instructions that dictate what address the PC will select in program memory are called control instructions. This would include call, goto, and branch. Each has a unique word length. Please refer to the “Instruction Set Summary” chapter in any PIC data sheet for more information.

device

DS41628B-page 22  2012 Microchip Technology Inc.

PIC® MCU Architecture

Byte-oriented file register operations

13 8 7 6 0

d = 0 for destination W

OPCODE d f (FILE #)

d = 1 for destination f f = 7-bit file register address

Bit-oriented file register operations

13 10 9 7 6 0

OPCODE b (BIT #) f (FILE #)

b = 3-bit bit address f = 7-bit file register address

Literal and control operations

13 8 7 0

OPCODE k (literal)

k = 8-bit immediate value

13 11 10 0

OPCODE k (literal)

k = 11-bit immediate value

General

CALL and GOTO instructions only

MOVLP instruction only

13 5 4 0

OPCODE k (literal)

k = 5-bit immediate value

MOVLB instruction only

13 9 8 0

OPCODE k (literal)

k = 9-bit immediate value

BRA instruction only

FSR Offset instructions

13 7 6 5 0

OPCODE n k (literal)

n = appropriate FSR

FSR Increment instructions

13 7 6 0

OPCODE k (literal)

k = 7-bit immediate value

13 3 2 1 0

OPCODE n m (mode)

n = appropriate FSR m = 2-bit mode value

k = 6-bit immediate value

13 0

OPCODE

OPCODE only

ADDWF MYREG, W

BSF MYREG, BIT

MOVLW 0x45

CALL LABEL

MOVLP 15

MOVLB 3

BRA LABEL

ADDFSR FSR1, 3

MOVIW ++FSR0

Example Instruction

FIGURE 2-4: ENHANCED PIC16 GENERAL FORMAT FOR INSTRUCTIONS

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PICkit™ 3 Starter Kit User’s Guide

Byte-oriented file register operations

15 10 9 8 7 0

d = 0 for result destination to be WREG register

OPCODE d a f (FILE #)

d = 1 for result destination to be file register (f) a = 0 to force Access Bank

Bit-oriented file register operations

15 12 11 9 8 7 0

OPCODE b (BIT #) a f (FILE #)

b = 3-bit position of bit in file register (f)

Literal operations

15 8 7 0

OPCODE k (literal)

k = 8-bit immediate value

Byte to Byte move operations (2-word)

15 12 11 0

OPCODE f (Source FILE #)

CALL, GOTO and Branch operations

15 8 7 0

OPCODE n<7:0> (literal)

n = 20-bit immediate value

a = 1 for BSR to select bank

f = 8-bit file register address

a = 0 to force Access Bank a = 1 for BSR to select bank f = 8-bit file register address

15 12 11 0

1111 n<19:8> (literal)

15 12 11 0

1111 f (Destination FILE #)

f = 12-bit file register address

Control operations

Example Instruction

ADDWF MYREG, W, B

MOVFF MYREG1, MYREG2

BSF MYREG, bit, B

MOVLW 7Fh

GOTO Label

15 8 7 0

OPCODE n<7:0> (literal)

15 12 11 0

1111 n<19:8> (literal)

CALL MYFUNC

15 11 10 0

OPCODE n<10:0> (literal)

S = Fast bit

BRA MYFUNC

15 8 7 0

OPCODE n<7:0> (literal)

BC MYFUNC

FIGURE 2-5: PIC18 GENERAL FORMAT FOR INSTRUCTIONS

There are some subtle differences between the block diagrams in Figure 2-1 and

Figure 2-3. This document will point out a few of the important ones.

DS41628B-page 24  2012 Microchip Technology Inc.

2.10 STACK LEVEL

The PIC18 has a deeper stack level of 31, whereas the enhanced core has 16. A deeper stack allows the PIC device to make more calls in the software before returning to the original address where the first call was made.

A call or goto modifies the program counter to point to a different place in code. Without these, the code would execute from the top to the bottom. The lessons will show the significance of this.

The call stack is used to save the return address before going to a new position in program memory.

As a frame of reference, some of the baseline parts (PIC10/12) devices have a call stack that is only two levels deep. It is quite a challenge to create modular code with a limited stack depth.

2.11 MEMORY ORGANIZATION

There are three sections of memory in the PIC16 enhanced mid-range and PIC18 devices:

1. Program Memory

2. Data RAM

3. Data EEPROM

PIC® MCU Architecture

2.12 PROGRAM MEMORY

There are five sections of program memory:

1. Flash Program Memory

2. Configuration Words

3. Device ID

4. Revision ID

5. User ID

2.12.1 Flash Program Memory

All enhanced mid-range and PIC18 devices use Flash memory for programming. Flash allows the PIC device to be erased and written to hundreds of thousands of times.

2.12.2 Configuration Words

There are several Configuration Word bits, or fuses, that allow different configurations at run-time. Oscillator selections, memory protection, low-voltage detection, etc., are some examples of configuration options. Each device has different configuration options. Enhanced mid-range Configuration bits are read-only during code execution. PIC18 can read all and write most Configuration bits during code execution. The Configuration bits are programmed in a special way, as seen in the lesson source files.

2.12.3 Device ID

The Device ID contains the read-only manufacture’s ID for the PIC MCU. The PIC16F1829 ID is stored in DEVICEID and the PIC18F14K22 is stored in DEVID1 and DEVID2.

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PICkit™ 3 Starter Kit User’s Guide

PC<14:0>

0000h

0004H

Stack Level 0

Stack Level 15

Reset Vecto r

Interrupt Vector

Stack Level 1

0005h

On-chip

Program

Memory

Page 0

07FFh

Rollover to Page 0

0800h

0FFFh 1000h

7FFFh

Page 1

Rollover to Page 3

Page 2

Page 3

17FFh

1800h

1FFFh

2000h

CALL

, CALLW

RETURN, RETLW

Interrupt, RETFIE

2.12.4 Revision ID

There are five bits in each PIC MCU that indicate the silicon revision of the PIC device. These bits are read-only and found in the DEVID register. There are usually multiple revisions of silicon for each PIC device. The errata document, which points out any errors and their temporary work-arounds, should be read alongside the data sheet.

The PIC18 has a program bus that is 21 bits wide, whereas the enhanced core is only 15 bits wide. A larger program bus infers that the program memory is larger, since it allows the core to locate a higher address value. The enhanced core program counter is capable of addressing 32K x 14 program memory space as seen in Figure 2-6.

FIGURE 2-6: ENHANCED MID-RANGE PROGRAM MEMORY MAP AND

CALL STACK

PIC18 devices are capable of addressing a 2-Mbyte program memory space, as seen in Figure 2-7. PIC18 devices also have two interrupt vectors, whereas the enhanced PIC devices only have one. A stark difference is that the PIC18 has no concept of pages, whereas the enhanced core has its program memory split into different pages.

DS41628B-page 26  2012 Microchip Technology Inc.

PIC® MCU Architecture

PC<20:0>

Stack Level 1



Stack Level 31

Reset Vector

Low Priority Interrupt Vector

 

CALL,RCALL,RETURN

RETFIE,RETLW

0000h

0018h

High Priority Interrupt Vector

0008h

User Memory Space

1FFFFFh

4000h

3FFFh

200000h

On-Chip

Program Memory

Read ‘0’

1FFFh

2000h

On-Chip

Program Memory

Read ‘0’

PIC18(L)F14K22

PIC18(L)F13K22

Changing pages is necessary in the enhanced core when changing execution from one page to another. None of the lessons for the enhanced PIC16 occupy more than one page and, therefore, page changes are not necessary. If the code does overflow into another page, the assembler will give a warning, indicating that a pagesel may be required.

FIGURE 2-7: PIC18 PROGRAM MEMORY MAP AND CALL STACK

2.13 DATA MEMORY

2.12.5 User ID

These four memory locations are designated as ID locations where the programmer can store checksum or other code identification numbers. These are readable and writable during normal execution.

The data memory layout of the two device families is perhaps the most significant. Data memory on both families can be split into four types:

1. Core Registers

2. Special Function Registers

3. General Purpose RAM

4. Common RAM

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PICkit™ 3 Starter Kit User’s Guide

2.13.1 Core Registers

The core registers contain the registers that directly affect the basic operation of the PIC device, repeated at the top of every data memory bank. Here are three examples of the 12 core registers:

1. STATUS

2. WREG

3. INTCON

The STATUS register contains the arithmetic status of the ALU. The WREG register is used to move bits in and out of registers. The INTCON register contains the various enable and flag bits that would cause the PIC MCU to jump to the Interrupt Vector.

2.13.2 Special Function Registers

The Special Function Registers provide access to the peripheral functions in the device. The Special Function Registers occupy 20 bytes immediately after the core registers of every data memory bank (addresses x0Ch/x8Ch through x1Fh/x9Fh) on the enhanced mid-range core. The PIC18 enhanced core has all of its SFRs in Access RAM, which is discussed in Section 2.14 “Banks”.

2.13.3 General Purpose RAM

2.14 BANKS

GPRs are used for data storage and scratchpad operations in the user’s application. Think of this as RAM that can be used for your program, but the correct bank must be selected before using. For the enhanced mid-range PIC devices, there are up to 80 bytes of GPR that follow immediately after the SFR space in each data memory bank.

2.13.4 Common RAM

There are 16 bytes of common RAM accessible from all banks in the enhanced core. The PIC18 architecture has something similar called Access RAM, which contains up to 96 bytes.

The PIC18F14K22 data memory is divided into 16 banks that contain 256 bytes each. The PIC16F1829 data memory is partitioned in 32 memory banks with 128 bytes in each bank. For the PIC16 enhanced mid-range, each bank consists of:

1. 12 core registers

2. 20 Special Function Registers (SFR)

3. Up to 80 bytes of General Purpose RAM (GPR)

4. 16 bytes of shared RAM (accessible by any bank)

Figure 2-8 shows the above information on the enhanced PIC16.

DS41628B-page 28  2012 Microchip Technology Inc.

PIC® MCU Architecture

0Bh

0Ch

1Fh

20h

6Fh

70h

7Fh

00h

Common RAM

(16 bytes)

General Purpose RAM

(80 bytes maximum)

Core Registers

(12 bytes)

Special Function Registers

(20 bytes maximum)

Memory Region

7-bit Bank Offset

FIGURE 2-8: ENHANCED MID-RANGE BANKED MEMORY PARTITIONING

Addresses 70h-7Fh are shared by all of the banks. This is useful for storing a few bytes of RAM without the need to switch banks each time the byte is used. Figure 2-9 shows the first eight banks on the PIC16F1829. Notice how the top 12 core registers are accessible from every bank, as are the 16 bytes of common RAM.

 2012 Microchip Technology Inc. DS41628B-page 29

DS41628B-page 30  2012 Microchip Technology Inc.

FIGURE 2-9: PIC16F1829 MEMORY MAP – THE CORRECT BANK MUST BE SELECTED BEFORE WRITING/READING FROM A

PICkit™ 3 Starter Kit User’s Guide

BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7

000h INDF0 080h INDF0 100h INDF0 180h INDF0 200h INDF0 280h INDF0 300h INDF0 380h INDF0 001h INDF1 081h INDF1 101h INDF1 181h INDF1 201h INDF1 281h INDF1 301h INDF1 381h INDF1 002h PCL 082h PCL 102h PCL 182h PCL 202h PCL 282h PCL 302h PCL 382h PCL 003h STATUS 083h STATUS 103h STATUS 183h STATUS 203h STATUS 283h STATUS 303h STATUS 383h STATUS 004h FSR0L 084h FSR0L 104h FSR0L 184h FSR0L 204h FSR0L 284h FSR0L 304h FSR0L 384h FSR0L 005h FSR0H 085h FSR0H 105h FSR0H 185h FSR0H 205h FSR0H 285h FSR0H 305h FSR0H 385h FSR0H 006h FSR1L 086h FSR1L 106h FSR1L 186h FSR1L 206h FSR1L 286h FSR1L 306h FSR1L 386h FSR1L 007h FSR1H 087h FSR1H 107h FSR1H 187h FSR1H 207h FSR1H 287h FSR1H 307h FSR1H 387h FSR1H 008h BSR 088h BSR 108h BSR 188h BSR 208h BSR 288h BSR 308h BSR 388h BSR 009h WREG 089h WREG 109h WREG 189h WREG 209h WREG 289h WREG 309h WREG 389h WREG 00Ah PCLATH 08Ah PCLATH 10Ah PCLATH 18Ah PCLATH 20Ah PCLATH 28Ah PCLATH 30Ah PCLATH 38Ah PCLATH 00Bh INTCON 08Bh INTCON 10Bh INTCON 18Bh INTCON 20Bh INTCON 28Bh INTCON 30Bh INTCON 38Bh INTCON 00Ch PORTA 08Ch TRISA 10Ch LATA 18Ch ANSELA 20Ch WPUA 28Ch — 30Ch — 38Ch INLVLA

00Dh PORTB 00Eh PORTC 08Eh TRISC 10Eh LATC 18Eh ANSELC 20Eh WPUC 28Eh —30Eh—38EhINLVLC 00Fh 010h

011h PIR1 091h PIE1 111h CM1CON0 191h EEADRL 211h 012h PIR2 092h PIE2 112h CM1CON1 192h EEADRH 212h 013h

014h

015h TMR0 095h OPTION_REG 115h CMOUT 195h EECON1 215h 016h 017h 018h

019h

01Ah

01Bh

01Ch

01Dh

01Eh CPSCON0 09Eh ADCON1 11Eh APFCON1 19Eh TXSTA 21Eh

01Fh CPSCON1 09Fh 020h

06Fh 0EFh 16Fh 1EFh 26Fh 2EFh 070h 0F0h

07Fh 0FFh 17Fh 1FFh 27Fh 2FFh 37Fh 3FFh

Legend: = Unimplemented data memory locations, read as ‘0’.

Note 1: Available only on PIC16(L)F1829.

(1)

08Dh TRISB

(1)

10Dh LATB

(1)

18Dh ANSELB

(1)

20Dh WPUB

(1)

28Dh — 30Dh — 38Dh INLVLB

—08Fh—10Fh—18Fh—20Fh—28Fh—30Fh—38Fh— —090h—110h—190h—210h—290h— 310h — 390h —

—093h— 113h CM2CON0 193h EEDATL 213h

—094h— 114h CM2CON1 194h EEDATH 214h

TMR1L 096h PCON 116h BORCON 196h EECON2 216h TMR1H 097h WDTCON 117h FVRCON 197h T1CON 098h OSCTUNE 118h DACCON0 198h

—217h —218h

T1GCON 099h OSCCON 119h DACCON1 199h RCREG 219h

TMR2 09Ah OSCSTAT 11Ah SRCON0 19Ah TXREG 21Ah

PR2 09Bh ADRESL 11Bh SRCON1 19Bh SPBRGL 21Bh

T2CON 09Ch ADRESH 11Ch

— 19Ch SPBRGH 21Ch

— 09Dh ADCON0 11Dh APFCON0 19Dh RCSTA 21Dh

—11Fh— 19Fh BAUDCON 21Fh

General Purpose

0A0h

General Purpose Register

80 Bytes

120h

General Purpose Register 80 Bytes

1A0h

General Purpose Register

80 Bytes

220h

96 Bytes

Accesses

70h – 7Fh

170h

Accesses

70h – 7Fh

1F0h

Accesses

270h

70h – 7Fh

SSP1BUF SSP1ADD SSP1MSK

SSP1STAT

SSP1CON SSP1CON2 SSP1CON3

—

SSP2BUF

SSP2ADD

SSP2MSK

SSP2STAT

SSP2CON

SSP2CON2

SSP2CON3

General Purpose Register

80 Bytes

Accesses

70h – 7Fh

291h CCPR1L 311h 292h CCPR1H 312h 293h CCP1CON 313h

294h PWM1CON 314h

295h CCP1AS 315h 296h PSTR1CON 316h 297h — 317h 298h

(1)

299h

(1)

29Ah

(1)

29Bh

(1)

29Ch

(1)

29Dh

(1)

29Eh

(1)

29Fh

CCPR2L

CCPR2H

CCP2CON

PWM2CON

CCP2AS

PSTR2CON

CCPTMRS

—

2A0h

General Purpose Register

80 Bytes

2F0h

Accesses

70h – 7Fh

318h

319h

31Ah

31Bh

31Ch

31Dh

31Eh

31Fh 320h

36Fh 370h

CCPR3L CCPR3H

CCP3CON

—

— — —

CCPR4L

CCPR4H

CCP4CON

—

General Purpose Register

80 Bytes

Accesses

70h – 7Fh

391h IOCAP 392h IOCAN 393h

394h IOCBP

395h IOCBN 396h IOCBF 397h 398h

399h —

39Ah CLKRCON

39Bh

39Ch MDCON

39Dh

39Eh

39Fh 3A0h

3EFh 3F0h

IOCAF

(1)

— —

—

MDSRC

MDCARL

MDCARH

General Purpose Register

80 Bytes

Accesses

70h – 7Fh

(1)

+ 71 hidden pages

Microchip Technology PICkit™ 3 Starter Kit User’s Guide

Specifications and Main Features

Frequently Asked Questions

User Manual

1.1 INTRODUCTION

1.2 HIGHLIGHTS

1.3 WHAT’S NEW

Chapter 1. Overview

1.4 INCLUDED ITEMS

1.5 THE LOW PIN COUNT BOARD

FIGURE 1-1: DEMO BOARD HARDWARE LAYOUT

TABLE 1-1: PIN ASSIGNMENTS

1.6 SOFTWARE OVERVIEW

1.7 RUNNING THE DEMONSTRATIONS

Chapter 2. PIC® MCU Architecture

2.1 INTRODUCTION

2.2 CORE BASICS

FIGURE 2-2: SIMPLIFIED ENHANCED MID-RANGE PIC® MCU DATA BLOCK DIAGRAM

FIGURE 2-3: SIMPLIFIED PIC18 BLOCK DIAGRAM

2.3 DATA/PROGRAM BUS

2.4 ACCUMULATOR

2.5 INSTRUCTIONS

EQUATION 2-1: INSTRUCTION TIME

EXAMPLE 2-1:

2.6 BYTE

EXAMPLE 2-2:

2.7 BIT

2.8 LITERAL

EXAMPLE 2-3:

EXAMPLE 2-4:

2.9 CONTROL

FIGURE 2-4: ENHANCED PIC16 GENERAL FORMAT FOR INSTRUCTIONS

FIGURE 2-5: PIC18 GENERAL FORMAT FOR INSTRUCTIONS

2.10 STACK LEVEL

2.11 MEMORY ORGANIZATION

2.12 PROGRAM MEMORY

2.12.1 Flash Program Memory

2.12.2 Configuration Words

2.12.3 Device ID

2.12.4 Revision ID

FIGURE 2-7: PIC18 PROGRAM MEMORY MAP AND CALL STACK

2.13 DATA MEMORY

2.12.5 User ID

2.13.1 Core Registers

2.13.2 Special Function Registers

2.13.3 General Purpose RAM

2.14 BANKS

2.13.4 Common RAM

FIGURE 2-8: ENHANCED MID-RANGE BANKED MEMORY PARTITIONING