• 200 kHz to 750 kHz Programmable Switching
Frequency
®
• HyperLight Load
• Hyper Speed Control® (MIC2126)
• Enable Input and Power Good Output
• Built-in 5V Regulator for Single-Supply Operation
• Programmable current limit and “hiccup” mode
short-circuit protection
• 7 ms internal soft-start, internal compensation,
and thermal shutdown
• Supports Safe Start-Up into a Prebiased Output
• –40°C to +125°C Junction Temperature Range
• Available in 16-pin, 3 mm × 3 mm QFN Package
(MIC2125)
= 28V and V
IN
OUT
Applications
• Networking/Telecom Equipment
• Base Stations, Servers
• Distributed Power Systems
• Industrial Power Supplies
General Description
The MIC2125 and MIC2126 are constant-frequency
synchronous buck controllers featuring a unique
adaptive ON-time control architecture. The MIC2125/6
operate over an input voltage range from 4.5V to 28V
and can be used to supply load current up to 25A. The
output voltage is adjustable down to 0.6V with a
guaranteed accuracy of ±1%. The device operates with
programmable switching frequency from 200 kHz to
750 kHz.
®
HyperLight Load
efficiency and ultra-fast transient response as the
Hyper Speed Control® architecture under medium to
heavy loads. It also maintains high efficiency under
light load conditions by transitioning to variable
frequency, discontinuous conduction mode operation.
The MIC2125/6 offer a full suite of features to ensure
protection of the IC during fault conditions. These
include undervoltage lockout to ensure proper
operation under power-sag conditions, internal
soft-start to reduce inrush current, “hiccup” mode
short-circuit protection, and thermal shutdown.
DS20005459B-page 2 2015 Microchip Technology Inc.
MIC2125/6
1.0ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VIN.............................................................................................................................................................. –0.3V to +30V
V
, P
DD
V
SW
V
BST
V
BST
V
PG
V
FB
P
GND
ESD Rating
Operating Ratings ‡
Supply Voltage (VIN) ...................................................................................................................................... 4.5V to 28V
V
SW
†Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
‡ Notice: The device is not guaranteed to function outside its operating ratings.
Note 1: Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5 k in series
.................................................................................................................................................... –0.3V to +6V
VDD
, V
FREQ
, V
, VEN....................................................................................................................–0.3V to (VIN +0.3V)
ILIM
to VSW................................................................................................................................................... –0.3V to 6V
............................................................................................................................................................. –0.3V to 36V
................................................................................................................................................. –0.3V to (VDD + 0.3V)
................................................................................................................................................. –0.3V to (VDD + 0.3V)
, V
to A
FREQ
........................................................................................................................................... –0.3V to +0.3V
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.
J
S
J
JA
JC
–40—+125°CNote 1
–65—+150°C—
——+150°C—
—50.8 —°C/W—
—25.3 —°C/W—
DS20005459B-page 6 2015 Microchip Technology Inc.
MIC2125/6
2.0TYPICAL PERFORMANCE CURVES
Note:The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise noted, V
FIGURE 2-1:VIN Operating Supply
Current vs. Input Voltage (MIC2125).
= 12V, FREQ = 350 kHz.
IN
FIGURE 2-4:VIN Shutdown Current vs.
Input Voltage (MIC2125).
FIGURE 2-2:Feedback Voltage vs. Input
Voltage (MIC212 5).
FIGURE 2-3:Output Voltage vs. Input
Voltage (MIC212 5).
Note: Unless otherwise noted, V
*Note: For Case Temperature graphs: The temperature measurement was taken at the hottest point on the MIC2125/6
case mounted on a 5 square inch PCBn. Actual results will depend upon the size of the PCB, ambient temperature and
proximity to other heat emitting components.
FIGURE 2-19:Line Regulation vs.
Temperature (MIC2125).
= 12V, FREQ = 350 kHz.
IN
FIGURE 2-22:Output Regulation vs. Input
Voltage (MIC2125).
FIGURE 2-20:Feedback Voltage vs.
Output Current (MIC2125).
FIGURE 2-21:Line Regulation vs. Output
Current (MIC2125).
FIGURE 2-23:Case Temperature* vs.
Output Current (MIC2125).
FIGURE 2-24:Case Temperature* vs.
Output Current (MIC2125).
DS20005459B-page 10 2015 Microchip Technology Inc.
MIC2125/6
Note: Unless otherwise noted, V
*Note: For Case Temperature graphs: The temperature measurement was taken at the hottest point on the MIC2125/6
case mounted on a 5 square inch PCBn. Actual results will depend upon the size of the PCB, ambient temperature and
proximity to other heat emitting components.
FIGURE 2-25:Case Temperature* vs.
Output Current (MIC2125).
= 12V, FREQ = 350 kHz.
IN
FIGURE 2-28:Efficiency (V
Output Current (MIC2125).
= 18V) vs.
IN
FIGURE 2-26:Efficiency (V
Output Current (MIC2125).
FIGURE 2-27:Efficiency (V
Output Current (MIC2125).
= 5V) vs.
IN
= 12V) vs.
IN
FIGURE 2-29:Efficiency (V
Output Current (MIC2126).
FIGURE 2-30:Efficiency (V
Output Current (MIC2126).
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:PIN FUNCTION TABLE
Pin NumberSymbolDescription
1V
DD
Internal Linear regulator output. Connect a 4.7 F ceramic capacitor from VDD to
for decoupling. In the applications where VIN < +5.5V, VDD should be tied to
A
GND
VIN to by-pass the linear regulator.
2P
VDD
5V supply input for the low-side N-channel MOSFET driver, which can be tied to
externally. A 4.7 F ceramic capacitor from P
V
DD
VDD
to P
is recommended for
GND
decoupling.
3I
LIM
Current limit setting input. Connect a resistor from SW to I
to set the overcurrent
LIM
threshold for the converter.
4DLLow-side gate driver output. The DL driving voltage swings from ground to VDD.
5P
GND
Power ground. P
is the return path for the low side gate driver. Connect P
GND
GND
pin to the source of low-side N-Channel external MOSFET.
6FREQSwitching frequency adjust input. Connect FREQ to the mid-point of an external
resistor divider from VIN to GND to program the switching frequency. Tie to VIN to
operate at 750 kHz frequency.
7DHHigh-side gate driver output. The DH driving voltage is floating on the switch node
voltage (VSW).
8SWSwitch node and current-sense input. Connect the SW pin to the switch node of the
buck converter. The SW pin also senses the current by monitoring the voltage
across the low-side MOSFET during OFF time. In order to sense the current
accurately, connect the low-side MOSFET drain to the SW pin using a Kelvin
connection.
9BSTBootstrap Capacitor Input. Connect a ceramic capacitor with a minimum value of
0.1 F from BST to SW.
10OVPOutput Overvoltage Protection Input. Connect to the mid-point of an external
resistive divider from the V
if the output overvoltage protection is not required.
A
GND
to GND to program overvoltage limit. Connect to
OUT
11NCNo connect.
12A
GND
Analog Ground. Connect A
to the exposed pad.
GND
13FBFeedback input. Input to the transconductance amplifier of the control loop. The FB
pin is regulated to 0.6V. A resistor divider connecting the feedback to the output is
used to set the desired output voltage.
14PGOpen-drain Power good output. Pull-up with an external pull-up resistor to VDD or to
an external power rail.
15ENEnable input. A logic signal to enable or disable the buck converter operation.
Logic-high enables the device; logic-low shuts down the regulator. In disable mode,
the VDD supply current for the device is minimized to 0.1 µA typically. Do not pull-up
EN pin to VDD/P
16V
Supply voltage input. The VIN operating voltage range is from 4.5V to 28V. A 1 F
IN
ceramic capacitor from VIN to A
17EPExposed Pad. Connect the exposed pad to the A
VDD
.
is required for decoupling.
GND
copper plane to improve the
GND
thermal performance.
DS20005459B-page 16 2015 Microchip Technology Inc.
MIC2125/6
t
ON ESTIMATED
V
OUT
VINfSW
-----------------------
=
D
MAX
tSt
OFF MIN
–
t
S
---------------------------------- -
1
220ns
t
S
-------------- -
–==
Where:
t
S
1/f
SW
4.0FUNCTIONAL DESCRIPTION
The MIC2125 and MIC2126 are adaptive on-time
synchronous buck controllers built for high input
voltage to low output voltage applications. They are
designed to operate over a wide input voltage range
from 4.5V to 28V and their output is adjustable with an
external resistive divider. An adaptive ON-time control
scheme is employed to obtain a constant switching
frequency and to simplify the control compensation.
Overcurrent protection is implemented when sensing
low-side MOSFET’s R
internal soft-start, enable, UVLO, and thermal
shutdown.
4.1Theory of Operation
The MIC2125/6 Functional Block Diagram appears on
page two. The output voltage is sensed by the
MIC2125/6 feedback pin (FB), and is compared to a
0.6V reference voltage (V
transconductance error amplifier (gm). Figure 4-1
shows the MIC2125/6 control loop timing during
steady-state operation. When the feedback voltage
decreases and the amplifier output is below 0.6V, the
comparator triggers and generates an ON-time period.
The ON-time period is predetermined by the fixed t
estimator circuitry value from Equation 4-1:
. The device features
DS(ON)
) at the low gain
REF
ON
EQUATION 4-2:
It is not recommended to use MIC2125/6 with an
OFF-time close to t
OFF(MIN)
operation.
The adaptive ON-time control scheme results in a
constant switching frequency in the MIC2125/6. The
actual ON-time and resulting switching frequency
varies with the different rising and falling times of the
external MOSFETs. Also, the minimum t
lower switching frequency in high VIN to V
applications.
during steady-state
results in a
ON
OUT
EQUATION 4-1:
Where:
V
OUT
V
IN
f
SW
At the end of the ON-time, the internal high-side driver
turns off the high-side MOSFET and the low-side driver
turns on the low-side MOSFET. The OFF-time depends
upon the feedback voltage. When the feedback voltage
decreases and the output of the g
0.6V, the ON-time period is triggered and the OFF-time
period ends. If the OFF-time period determined by the
feedback voltage is less than the minimum OFF-time
t
OFF(min)
logic applies the t
, which is about 220 ns, the MIC2125/6 control
OFF(min)
to maintain enough energy in the boost capacitor
(C
) to drive the high-side MOSFET.
BST
The maximum duty cycle is obtained from the 220 ns
t
OFF(MIN)
:
Output Voltage
Power Stage Input Voltage
Switching Frequency
amplifier is below
m
instead. t
OFF(min)
is required
FIGURE 4-1:MIC2125/6 Control Loop
Timing
Figure 4-2 shows the operation of the MIC2125/6
during load transient. The output voltage drops due to
a sudden increase in load, which results in the V
falling below V
. This causes the comparator to
REF
trigger an ON-time period. At the end of the ON-time, a
minimum OFF-time t
C
if the feedback voltage is still below V
BST
is generated to charge
OFF(min)
next ON-time is triggered immediately after the
t
OFF(min)
due to the low feedback voltage. This
operation results in higher switching frequency during
load transients. The switching frequency returns to the
nominal set frequency once the output stabilizes at new
load current level. The output recovery time is fast and
the output voltage deviation is small in MIC2125/6
converter due to the varying duty cycle and switching
frequency.
Unlike true current-mode control, the MIC2125/6 uses
the output voltage ripple to trigger an ON-time period.
In order to meet the stability requirements, the
MIC2125/6 feedback voltage ripple should be in phase
with the inductor current ripple and large enough to be
sensed by the g
feedback voltage ripple is 20 mV ~ 100 mV over the full
input voltage range. If a low-ESR output capacitor is
selected, then the feedback voltage ripple may be too
small to be sensed by the g
voltage ripple and the feedback voltage ripple are not
necessarily in phase with the inductor current ripple if
the ESR of the output capacitor is very low. For these
applications, ripple injection is required to ensure
proper operation. Refer to the Ripple Injection section
under Application Information for details about the
ripple injection technique.
4.2Discontinuous Conduction Mode
(MIC2125 Only)
amplifier. The recommended
m
amplifier. Also, the output
m
FIGURE 4-3:MIC2125 Control Loop
Timing (Discontinuous Conduction Mode)
The typical no load supply current during discontinuous
conduction mode is only about 340 A, allowing the
MIC2125 to achieve high efficiency at light load
operation.
4.3Soft-Start
Soft-start reduces the power supply inrush current at
startup by controlling the output voltage rise time. The
MIC2125/6 implements an internal digital soft-start by
ramping up the reference voltage V
in about 7 ms. Once the soft-start is completed, the
related circuitry is disabled to reduce the current
consumption.
from 0 to 100%
REF
The MIC2125 operates in discontinuous conduction
mode at light load. The MIC2125 has a zero crossing
comparator (ZC detection) that monitors the inductor
current by sensing the voltage drop across the low-side
MOSFET during its ON-time. If the V
inductor current goes slightly negative, the MIC2125
turns off both the high-side and low-side MOSFETs.
During this period, the efficiency is optimized by
shutting down all the non-essential circuits and the load
current is supplied by the output capacitor. The control
circuitry wakes up when the feedback voltage falls
below V
and triggers a tON pulse. Figure 4-3 shows
REF
the control loop timing in discontinuous conduction
mode.
DS20005459B-page 18 2015 Microchip Technology Inc.
The MIC2125/6 uses the low-side MOSFET R
sense the inductor current.
FIGURE 4-4:MIC2125/6 Current-Limiting
Circuit
In each switching cycle of the MIC2125/6 converter, the
inductor current is sensed by monitoring the voltage
across the low-side MOSFET during the OFF period.
An internal current source of 36 µA generates a voltage
across the external resistor R
V
is the sum of the voltage across the low side
(ILIM)
. The I
CL
pin voltage
LIM
MOSFET and the voltage across the resistor (V
The sensed voltage V
ground (P
) after a blanking time of 150 ns.
GND
is compared with the power
(ILIM)
If the absolute value of the voltage drop across the low
side MOSFET is greater than V
, the current limit
CL
event is triggered. Eight consecutive current limit
events triggers hiccup mode. The hiccup sequence,
including the soft-start, reduces the stress on the
switching FETs and protects the load and supply from
severe short conditions.
The current limit can be programmed by using
Equation 4-3.
EQUATION 4-3:
DS(ON)
to
CL
Because MOSFET R
varies from 30% to 40%
DS(ON)
with temperature, it is recommended to add a 50%
margin to ICL in the previous equation to avoid false
current limiting due to increased MOSFET junction
temperature rise. It is also recommended to connect
the SW pin directly to the drain of the low-side
MOSFET to accurately sense the MOSFET’s R
DS(ON)
.
4.5Negative Current Limit
(MIC2126 Only)
The MIC2126 implements negative current limit by
sensing the SW voltage when the low-side FET is off.
If the SW node voltage exceeds 12 mV typical, the
device turns off the low-side FET until the next ON-time
event is triggered. The negative current limit value is
given by Equation 4-4.
EQUATION 4-4:
).
4.6MOSFET Gate Drive
The MIC2125/6 high-side drive circuit is designed to
switch an N-Channel MOSFET. Figure 4-1 shows a
bootstrap circuit, consisting of a PMOS switch and
. This circuit supplies energy to the high-side drive
C
BST
circuit. Capacitor C
MOSFET is on and the voltage on the SW pin is
approximately 0V. When the high-side MOSFET driver
is turned on, energy from C
MOSFET on. If the bias current of the high-side driver
is less than 10 mA, a 0.1 F capacitor is sufficient to
hold the gate voltage within minimal droop, (i.e.,
= 10 mA × 3.33 s/0.1 F = 333 mV). A small resistor,
RG in series with C
turn-on time of the high-side N-channel MOSFET.
The MIC2125/6 includes the OVP feature to protect the
load from overshoots due to input transients and output
short to a high voltage. When the overvoltage condition
is triggered, the converter turns off immediately to allow
the output voltage to discharge. The MIC2125/6 power
should be recycled to enable it again.
The MIC2125/6 are adjustable-frequency,
synchronous buck controllers featuring a unique
adaptive ON–time control architecture. The switching
frequency can be adjusted between 200 kHz and
750 kHz by changing the resistor divider network
consisting of R19 and R20.
MIC2125/26
V
DD
5V
4.7μF
V
IN
R19
2.2μF
x3
R20
FIGURE 5-1:Switching Frequency
Adjustment.
Equation 5-1 gives the estimated switching frequency.
EQUATION 5-1:
VDD/PVDD
AGND
VIN
FREQ
PGND
BST
SW
CS
FB
5.2MOSFET Selection
Voltage rating, on-resistance, and total gate charge are
important parameters for MOSFET selection.
The voltage rating for the high-side and low-side
MOSFETs are essentially equal to the power stage
input voltage V
added to the V
of the MOSFETs to account for voltage spikes due to
circuit parasitic elements.
The power dissipated in the MOSFETs is the sum of
conduction losses (P
losses (PAC).
EQUATION 5-2:
EQUATION 5-3:
The total high-side MOSFET switching loss is:
EQUATION 5-4:
. A safety factor of 30% should be
IN
while selecting the voltage rating
IN(MAX)
CONDUCTION
) and switching
For more precise setting, it is recommended to use
Figure 5-2.
FIGURE 5-2:Switching Frequency vs.
R20
DS20005459B-page 20 2015 Microchip Technology Inc.
Turn-on and turn-off transition times can be
approximated by:
The high-side MOSFET switching losses increase with
the switching frequency and the input voltage. The
low-side MOSFET switching losses are negligible and
can be ignored for these calculations.
5.3Inductor Selection
Inductance value, saturation, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine
the peak-to-peak inductor ripple current. Larger
peak-to-peak ripple current increases the power
dissipation in the inductor and MOSFETs. Larger
output ripple current also requires more output
capacitance to smooth out the larger ripple current.
Smaller peak-to-peak ripple current requires a larger
inductance value and therefore a larger and more
expensive inductor.
A good compromise between size, loss, and cost is to
set the inductor ripple current to be equal to 40% of the
maximum output current.
The inductance value is calculated by Equation 5-7.
The peak inductor current is equal to the average
output current plus one half of the peak-to-peak
inductor current ripple.
EQUATION 5-9:
The saturation current rating is given by:
EQUATION 5-10:
The RMS inductor current is used to calculate the I2R
losses in the inductor.
EQUATION 5-11:
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance.
The high-frequency operation of the MIC2125/6
requires the use of ferrite materials. Lower cost iron
powder cores may be used, but the increase in core
loss reduces the efficiency of the power supply. This is
especially noticeable at low output power. The winding
resistance decreases efficiency at the higher output
current levels. The winding resistance must be
minimized, although this usually comes at the expense
of a larger inductor. The power dissipated in the
inductor is equal to the sum of the core and copper
losses. At higher output loads, the core losses are
usually insignificant and can be ignored. At lower
output currents, the core losses can be significant.
Core loss information is usually available from the
magnetics vendor.
The amount of copper loss in the inductor is calculated
by Equation 5-12:
The type of the output capacitor is usually determined
by its equivalent series resistance (ESR). Voltage and
RMS current capability are two other important factors
for selecting the output capacitor. Recommended
capacitor types are ceramic, tantalum, low-ESR
aluminum electrolytic, OS-CON, and POSCAP. The
output capacitor’s ESR is usually the main cause of the
output ripple. The output capacitor ESR also affects the
control loop from a stability point of view. The maximum
value of ESR is calculated by Equation 5-13.
EQUATION 5-13:
The required output capacitance is calculated in
Equation 5-14.
EQUATION 5-14:
The power dissipated in the output capacitor is:
EQUATION 5-16:
5.5Input Capacitor Selection
The input capacitor reduces peak current drawn from
the power supply and reduces noise and voltage ripple
on the input. The input voltage ripple depends on the
input capacitance and ESR. The input capacitance and
ESR values are calculated by using Equation 5-17 and
Equation 5-18.
EQUATION 5-17:
As described in the Theory of Operation subsection of
the Functional Description, the MIC2125/26 requires at
least 20 mV peak-to-peak ripple at the FB pin to ensure
that the g
amplifier and the comparator behave
m
properly. Also, the output voltage ripple should be in
phase with the inductor current. Therefore, the output
voltage ripple caused by the output capacitors value
should be much smaller than the ripple caused by the
output capacitor ESR. If low-ESR capacitors, such as
ceramic capacitors, are selected as the output
capacitors, a ripple injection method should be applied
to provide the enough feedback voltage ripple. Refer to
the Ripple Injection subsection for details.
The voltage rating of the capacitor should be twice the
output voltage for a tantalum and 20% greater for
aluminum electrolytic or OS-CON. The output capacitor
RMS current is calculated in Equation 5-15.
EQUATION 5-15:
EQUATION 5-18:
The input capacitor should be qualified for ripple
current rating and voltage rating. The RMS value of the
input capacitor current is determined at the maximum
output current. Assuming the peak-to-peak inductor
current ripple is low:
EQUATION 5-19:
The power dissipated in the input capacitor is:
EQUATION 5-20:
DS20005459B-page 22 2015 Microchip Technology Inc.
MIC2125/6
V
OUT
V
FB
1
R1
R2
------ -
+
=
Where:
V
FB
0.6V
R2
V
FB
R1
V
OUTVFB
–
-----------------------------
=
R1
R2
OVP
V
REF
R1R2
V
OVP
0.6
-------------
1–=
5.6Output Voltage Setting
The MIC2125/26 requires two resistors to set the
output voltage, as shown in Figure 5-3.
R1
AMP
g
m
V
REF
FIGURE 5-3:Voltage-Divider
Configuration.
The output voltage is determined by Equation 5-21:
EQUATION 5-21:
FB
R2
5.7Output Overvoltage Limit Setting
The output overvoltage limit should be typically 20%
higher than the nominal output voltage. Set the OVP
limit by connecting a resistor divider from the output to
ground as shown in Figure 5-4.
FIGURE 5-4:OVP Voltage-Divider
Configuration.
Choose R2 in the range of 10 k to 49.9 k and
calculate R1 using Equation 5-23.
EQUATION 5-23:
A typical value of R1 can be in the range of 3 k and
15 k. If R1 is too large, it may allow noise to be
introduced into the voltage feedback loop. If R1 is too
small in value, it will decrease the efficiency of the
power supply, especially at light loads. Once R1 is
selected, R2 can be calculated using Equation 5-22.
EQUATION 5-22:
5.8Ripple Injection
The VFB ripple required for proper operation of the
MIC2125/6 g
100 mV. However, the output voltage ripple is generally
designed as 1% to 2% of the output voltage. For low
output voltages, such as a 1V, the output voltage ripple
is only 10 mV to 20 mV, and the feedback voltage ripple
is less than 20 mV. If the feedback voltage ripple is so
small that the g
sense it, then the MIC2125/6 loses control and the
output voltage is not regulated. In order to have
sufficient V
be applied for low output voltage ripple applications.
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
• Enough ripple at the feedback voltage due to the
large ESR of the output capacitors (Figure 5-5).
The converter is stable without any ripple
injection.
• Inadequate ripple at the feedback voltage due to
the small ESR of the output capacitors.
The output voltage ripple is fed into the FB pin
through a feed-forward capacitor, C
as shown in Figure 5-7. The typical C
between 1 nF and 100 nF.
in this situation,
ff
value is
ff
FIGURE 5-7:Invisible Ripple at FB.
The process of sizing the ripple injection resistor and
capacitors is as follows.
•Select C
as 100 nF, which can be considered
INJ
as short for a wide range of the frequencies.
•Select C
feedback pin. Typical choice of C
to feed all output ripples into the
ff
is 0.47 nF to
ff
47 nF, if R1 and R2 are in the k range. The Cff
value can be calculated using Equation 5-26:
EQUATION 5-26:
•Select R
according to Equation 5-27.
INJ
FIGURE 5-6:Inadequate Ripple at FB.
With the feed-forward capacitor, the feedback
voltage ripple is very close to the output voltage
ripple.
EQUATION 5-25:
• Virtually no ripple at the FB pin voltage due to the
very low ESR of the output capacitors.
Therefore, additional ripple is injected into the FB pin
from the switching node SW via a resistor R
capacitor C
DS20005459B-page 24 2015 Microchip Technology Inc.
, as shown in Figure 5-7.
INJ
EQUATION 5-27:
and a
INJ
MIC2125/6
6.0PCB LAYOUT GUIDELINES
PCB layout is critical to achieve reliable, stable and
efficient performance. The following guidelines should
be followed to ensure proper operation of the
MIC2125/26 converter.
6.1IC
• The ceramic bypass capacitors which are
connected to the V
located right at the IC. Use wide traces to connect
to the VDD, P
respectively.
• The signal ground pin (A
directly to the ground planes.
• Place the IC close to the point-of-load (POL).
• Signal and power grounds should be kept
separate and connected at only one location.
VDD
and P
DD
and A
GND
6.2Input Capacitor
• Place the input ceramic capacitors as close as
possible to the MOSFETs.
• Place several vias to the ground plane close to
the input capacitor ground terminal.
For more information about the Evaluation board layout, please contact Microchip sales.
pins must be
VDD
, P
pins
GND
) must be connected
GND
6.3Inductor
• Keep the inductor connection to the switch node
(SW) short.
• Do not route any digital lines underneath or close
to the inductor.
• Keep the switch node (SW) away from the
feedback (FB) pin.
• The SW pin should be connected directly to the
drain of the low-side MOSFET to accurately
sense the voltage across the low-side MOSFET.
6.4Output Capacitor
• Use a copper plane to connect the output
capacitor ground terminal to the input capacitor
ground terminal.
• The feedback trace should be separate from the
power trace and connected as close as possible
to the output capacitor. Sensing a long
high-current load trace can degrade the DC load
regulation.
6.5MOSFETs
• MOSFET gate drive traces must be short. The
ground plane should be the connection between
the MOSFET source and P
• Choose a low-side MOSFET with a high CGS/CGD
ratio and a low internal gate resistance to
minimize the effect of d
• Use a 4.5V V
threshold voltage is more immune to glitches than
a 2.5V or 3.3V rated MOSFET.
DS2005459B-page 32 2015 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•Microchip is willing to work with the customer who is concerned about the integrity of their code.
•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, K
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, PICSTART, PIC
SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O,
Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
T empe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the desig n
and manufacture of development systems is ISO 9001:2000 certified.
®
MCUs and dsPIC® DSCs, KEELOQ
®
code hopping
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