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SMSC EVB8740/EVB8741Revision 1.0 (04-29-13)
USER MANUAL
EVB8740/EVB8741 Evaluation Board User Manual
SMSC
LAN8740A/
LAN8741A
10/100
Ethernet
Magnetics
& RJ45
EVB8740/EVB8741
MIIEthernet
40-pin
Connector
1 Introduction
The LAN8740A/LAN8741A is a low-power, 10BASE-T/100BASE-TX physical layer (PHY) transceiver
with variable I/O voltage that is compliant with the IEEE 802.3, 802.3u, and 802.3az (Energy Efficient
Ethernet) standards. Energy Efficient Ethernet (EEE) support results in significant power savings during
low link utilizations.
The EVB8740/EVB8741 is a PHY Evaluation Board (EVB) that interfaces a Media Independent
Interface (MII) MAC controller to the LAN8740A/LAN8741A Ethernet MII PHY via a standard 40-pin
MII connector. The LAN8740A/LAN8741A is connected to an RJ45 Ethernet jack with integrated
magnetics for 10/100 connectivity. A simplified block diagram of the EVB8740/EVB8741 can be seen
in Figure 1.1.
Figure 1.1 EVB8740/EVB8741 Block Diagram
Note: Though the LAN8740A/LAN8741A supports an RMII mode of operation, the
EVB8740/EVB8741 evaluation board does not support this mode.
1.1 References
Concepts and material available in the following documents may be helpful when reading this
document. Visit www.smsc.com for the latest documentation.
SMSC LAN8740A/LAN8741A Datasheets
AN 25.3 Migrating from the LAN8710A/LAN8720A to the LAN8740/LAN8741/LAN8742
This section includes the following EVB8740/EVB8741 board details:
Power
Configuration
Mechanicals
2.1 Power
2.1.1+5V Power
Power is normally supplied to the EVB8740/EVB8741’s +3.3V regulator externally via the +5V power
pins of the MII connector. If desired, the EVB8740/EVB8741 can be powered without +5V present on
the MII connector by supplying +5V to the TP2 (red) test point with ground connected to the TP4
(black) test point.
Note: Before connecting an external power supply to TP2, ensure power is not present on the MII
connector’s +5V pins. Connecting +5V simultaneously via the MII connector and TP2 may
result in permanent damage to the board.
EVB8740/EVB8741 Evaluation Board User Manual
2.1.2VDDIO Power
The LAN8740A/LAN8741A’s VDDIO power may be supplied at a voltage other than +3.3V by
depopulating resistor R12 and supplying +1.6V to +3.6V externally via test point TP5 (purple), with
ground connected to the TP4 (black) test point.
Note: Before connecting an external power supply to TP5, ensure that resistor R12 has been
removed. Connecting an external power supply to TP5 while resistor R12 is populated may
result in permanent damage to the board.
2.1.3+1.2V Power
The LAN8740A/LAN8741A’s internal +1.2V regulator can be optionally disabled. Refer to Section 2.2.4,
"Internal +1.2V Regulator Configuration (REGOFF)," on page 6 for additional information.
SMSC EVB8740/EVB87413Revision 1.0 (04-29-13)
USER MANUAL
EVB8740/EVB8741 Evaluation Board User Manual
MII
Testpoints
VDDCR
Testpoint
Reset
Button
Integrated
RJ45 +
Magnetics
SPEED &
LINK/ACT
LEDs
(integrated in
magjack)
40-pin MII
connector
(P1)
VDDIO
Testpoint
+5V
Testpoint
+3.3V
Testpoint
SMSC
LAN8740A/
LAN8741A
GND
Testpoint
JP1 – JP4
AVDD_ETH
Testpoint
2.2 Configuration
The following sub-sections describe the various board features and configuration settings. A top view
of the EVB8740/EVB8741 is shown in Figure 2.1.
Figure 2.1 Top View of the EVB8740/EVB8741
2.2.1PHY Address Configuration
The EVB8740/EVB8741 allows the user to configure the default PHY address at power-up via the
PHYAD[2:0] configuration straps. Tab l e 2 .1 details the proper configuration required for each PHY
address value. By default, all EVB8740/EVB8741 PHY address straps are configured to a value of “0”.