The EMC1403 and EMC1404 are high accuracy, low
cost, System Management Bus (SMBus) temperature
sensors. Advanced features such as Resistance Error
Correction (REC), Beta Compensation (to support CPU
diodes requiring the BJT/transistor model including
45nm, 65nm and 90nm processors) and automatic
diode type detection combine to provide a robust
solution for complex environmental monitoring
applications.
Each device provides ±1° accuracy for external diode
temperatures and ±2°C accuracy for the internal diode
temperature. The EMC1403 monitors three temperature
channels (two external and one internal). The EMC1404
monitors four temperature channels (three external and
one internal).
Resistance Error Correction automatically eliminates the
temperature error caused by series resistance allowing
greater flexibility in routing thermal diodes. Beta
Compensation eliminates temperature errors caused by
low, variable beta transistors common in today's fine
geometry processors. The automatic beta detection
feature monitors each external diode/transistor and
determines the optimum sensor settings for accurate
temperature measurements regardless of processor
technology. This frees the user from providing unique
sensor configurations for each temperature monitoring
application. These advanced features plus ±1°C
measurement accuracy provide a low-cost, highly
flexible and accurate solution for critical temperature
monitoring applications.
EMC1403-1-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
EMC1403-2-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
EMC1403-3-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
EMC1403-4-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
EMC1403-1-AIA-TR for 10-pin, DFN RoHS Compliant Package
EMC1403-2-AIA-TR for 10-pin, DFN RoHS Compliant Package
EMC1403-3-AIA-TR for 10-pin, DFN RoHS Compliant Package
EMC1403-4-AIA-TR for 10-pin, DFN RoHS Compliant Package
EMC1403-1-YZT-TR for 14-pin, SOIC RoHS Compliant Package
EMC1403-2-YZt-TR for 14-pin, SOIC RoHS Compliant Package
EMC1403-3-YZt-TR for 14-pin, SOIC RoHS Compliant Package
EMC1403-4-YZt-TR for 14-pin, SOIC RoHS Compliant Package
EMC1404-1-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
EMC1404-2-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
EMC1404-3-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
EMC1404-4-AIZL-TR for 10-pin, MSOP RoHS Compliant Package
Note: See Table 1.1, "Part Selection" for SMBus addressing options.
REEL SIZE IS 4,000 PIECES.
This product meets the halogen maximum concentration values per IEC61249-2-21
Data Sheet
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DS20005272A-page 2 2014 Microchip Technology Inc.
APPLICATION NOTE: For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA, THERM, and
ALERT), the voltage difference between VDD and the pull-up voltage must never exceed
3.6V.
The pin types are described below:
Power - these pins are used to supply either VDD or GND to the device.
AIO - Analog Input / Output.
DI - Digital Input.
OD - Open Drain Digital Output.
DIOD - Digital Input / Open Drain Output.
DS20005272A-page 10 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
Chapter 3 Electrical Specifications
3.1 Absolute Maximum Ratings
Table 3.1 Absolute Maximum Ratings
DESCRIPTIONRATINGUNIT
Supply Voltage (V
Voltage on 5V tolerant pins (V
Voltage on 5V tolerant pins (|V
Voltage on any other pin to Ground-0.3 to V
)-0.3 to 4.0V
DD
)-0.3 to 5.5V
5VT_pin
- VDD|) (see Note 3.1)-0.3 to 3.6V
5VT_pin
+0.3V
DD
Operating Temperature Range -40 to +125°C
Storage Temperature Range-55 to +150°C
Lead Temperature RangeRefer to JEDEC Spec. J-STD-020
Package Thermal Characteristics for MSOP-10
Thermal Resistance (
)132.2°C/W
j-a
Package Thermal Characteristics for SOIC-14
Thermal Resistance (
)77.7°C/W
j-a
Package Thermal Characteristics for DFN-10
Thermal Resistance (
)77.1°C/W
j-a
ESD Rating, All pins HBM2000V
Note: Stresses at or above those listed could cause permanent damage to the device. This is a stress
rating only and functional operation of the device at any other condition above those indicated
in the operation sections of this specification is not implied. When powering this device from
laboratory or system power supplies, it is important that the Absolute Maximum Ratings not be
exceeded or device failure can result. Some power supplies exhibit voltage spikes on their
outputs when the AC power is switched on or off. In addition, voltage transients on the AC
power line may appear on the DC output. If this possibility exists, it is suggested that a clamp
circuit be used.
Note 3.1For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA,
THERM, and
ALERT), the pull-up voltage must not exceed 3.6V when the device is unpowered.
Chapter 4 System Management Bus Interface Protocol
4.1 System Management Bus Interface Protocol
The EMC1403 and EMC1404 communicate with a host controller, such as an SIO, through the SMBus.
The SMBus is a two-wire serial communication protocol between a computer host and its peripheral
devices. A detailed timing diagram is shown in
For the first 15ms after power-up the device may not respond to SMBus communications.
.
Figure 4.1.
Figure 4.1 SMBus Timing Diagram
The EMC1403 and EMC1404 are SMBus 2.0 compatible and support Send Byte, Read Byte, Write
Byte, Receive Byte, and the Alert Response Address as valid protocols as shown below.
All of the below protocols use the convention in Table 4.1.
Table 4.1 Protocol Format
DATA SENT
TO DEVICE
# of bits sent# of bits sent
Attempting to communicate with the EMC1403 and EMC1404 SMBus interface with an invalid slave
address or invalid protocol will result in no response from the device and will not affect its register
contents. Stretching of the SMCLK signal is supported, provided other devices on the SMBus control
the timing.
DATA SENT TO
THE HOST
DS20005272A-page 14 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
4.2 Write Byte
The Write Byte is used to write one byte of data to the registers as shown below Table 4.2:
Table 4.2 Write Byte Protocol
START
SLAVE
ADDRESSWR
ACK
REGISTER
ADDRESSACK
REGISTER
DATAACKSTOP
1 -> 01001_10000XXh0XXh00 -> 1
4.3 Read Byte
The Read Byte protocol is used to read one byte of data from the registers as shown in Table 4.3.
Table 4.3 Read Byte Protocol
STARTSLAVE
ADDRESS
WRACKREGISTER
ADDRESS
ACKSTARTSLAVE
ADDRESS
RDACKREGISTER
DATA
NACKSTOP
1 -> 01001_10001XXh01 -> 01001_10011XX10 -> 1
4.4 Send Byte
The Send Byte protocol is used to set the internal address register pointer to the correct address
START
location. No data is transferred during the Send Byte protocol as shown in
Table 4.4 Send Byte Protocol
SLAVE
ADDRESSWR
ACK
REGISTER
ADDRESSACKSTOP
Table 4.4.
1 -> 01001_10000XXh00 -> 1
4.5 Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address
pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads
of the same register as shown in
The ALERT output can be used as a processor interrupt or as an SMBus Alert.
When it detects that the ALERT pin is asserted, the host will send the Alert Response Address (ARA)
to the general address of 0001_100xb. All devices with active interrupts will respond with their client
address as shown in
Table 4.6.
Table 4.6 Alert Response Address Protocol
1°C Temperature Sensor with Beta Compensation
Data Sheet
ALERT
START
1 -> 00001_100101001_100010 -> 1
APPLICATION NOTE: The ARA does not clear the Status Register and if the MASK bit is cleared prior to the Status
RESPONSE
ADDRESSRD
The EMC1403 and EMC1404 will respond to the ARA in the following way:
1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication
from the device was not prematurely stopped due to a bus contention event).
2. Set the MASK bit to clear the ALERT pin.
Register being cleared, the
ACK
ALERT pin will be reasserted.
DEVICE
ADDRESSNACKSTOP
4.7 SMBus Address
The EMC1403 and EMC1404 respond to hard-wired SMBus slave address as shown in Table 1.1.
Note: Other addresses are available. Contact Microchip for more information.
4.8 SMBus Timeout
The EMC1403 and EMC1404 support SMBus Timeout. If the clock line is held low for longer than
30ms, the device will reset its SMBus protocol. This function can be enabled by setting the TIMEOUT
bit in the Consecutive Alert Register (see
Section 6.12).
DS20005272A-page 16 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
Chapter 5 Product Description
The EMC1403 and EMC1404 are SMBus temperature sensors. The EMC1403 monitors one internal
diode and two externally connected temperature diodes. The EMC1404 monitors one internal diode
and three externally connected temperature diodes.
Thermal management is performed in cooperation with a host device. This consists of the host reading
the temperature data of both the external and internal temperature diodes of the EMC1403 and
EMC1404 and using that data to control the speed of one or more fans.
The EMC1403 and EMC1404 have two levels of monitoring. The first provides a maskable ALERT
signal to the host when the measured temperatures exceeds user programmable limits. This allows
the EMC1403 or EMC1404 to be used as an independent thermal watchdog to warn the host of
temperature hot spots without direct control by the host. The second level of monitoring provides a non
maskable interrupt on the
programmable limit.
Since the EMC1403 and EMC1404 automatically correct for temperature errors due to series
resistance in temperature diode lines, there is greater flexibility in where external diodes are positioned
and better measurement accuracy than previously available with non-resistance error correcting
devices. The automatic beta detection feature means that there is no need to program the device
according to which type of diode is present on the External Diode 1 channel. This also includes CPU
diodes that require the transistor or BJT model for monitoring their temperature. Therefore, the
EMC1403/EMC1404 can power up ready to operate for any system configuration.
For the EMC1404, External Diode channels 2 and 3 are only compatible with general purpose diodes
(such as a 2N3904).
Figure 5.1 shows a system level block diagram of the EMC1403. Figure 5.2 shows a system level block
diagram of the EMC1404.
THERM pin if the measured temperatures meet or exceed a second
The EMC1403 and EMC1404 have two modes of operation.
Active (Run) - In this mode of operation, the ADC is converting on all temperature channels at the
programmed conversion rate. The temperature data is updated at the end of every conversion and
the limits are checked. In Active mode, writing to the one-shot register will do nothing.
Standby (Stop) - In this mode of operation, the majority of circuitry is powered down to reduce
supply current. The temperature data is not updated and the limits are not checked. In this mode
of operation, the SMBus is fully active and the part will return requested data. Writing to the oneshot register will enable the device to update all temperature channels. Once all the channels are
updated, the device will return to the Standby mode.
5.1.1Conversion Rates
The EMC1403 and EMC1404 may be configured for different conversion rates based on the system
requirements. The conversion rate is configured as described in
rate is 4 conversions per second. Other available conversion rates are shown in Table 6.6.
5.1.2Dynamic Averaging
Dynamic averaging causes the EMC1403 and EMC1404 to measure the external diode channels for
an extended time based on the selected conversion rate. This functionality can be disabled for
increased power savings at the lower conversion rates (see
enabled, the device will automatically adjust the sampling and measurement time for the external diode
channels. This allows the device to average 2x or 16x longer than the normal 11 bit operation
(nominally 21ms per channel) while still maintaining the selected conversion rate. The benefits of
dynamic averaging are improved noise rejection due to the longer integration time as well as less
random variation of the temperature measurement.
When enabled, the dynamic averaging applies when a one-shot command is issued. The device will
perform the desired averaging during the one-shot operation according to the selected conversion rate.
When enabled, the dynamic averaging will affect the average supply current based on the chosen
conversion rate as shown in
Section 6.5. The default conversion
Section 6.4). When dynamic averaging is
Table 5.1 for EMC1403.
DS20005272A-page 18 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
Table 5.1 Supply Current vs. Conversion Rate for EMC1403
CONVERSION RATE
1 / 16 sec660uA430uA16x1x
1 / 8 sec660uA430uA16x1x
1 / 4 sec660uA430uA16x1x
1 / 2 sec660uA430uA16x1x
1 / sec660uA430uA16x1x
2 / sec930uA475uA8x1x
4 / sec (default) 950uA510uA4x1x
8 / sec1010uA630uA2x1x
16 / sec1020uA775uA1x1x
32 / sec1050uA1050uA0.5x0.5x
64 / sec1100uA1100uA0.25x0.25x
When enabled, the dynamic averaging will affect the average supply current based on the chosen
conversion rate as shown in
AVERAGE SUPPLY CURRENT
ENABLED
(DEFAULT)DISABLED
Table 5.2 for EMC1404.
AVERAGING FACTOR (BASED ON
11-BIT OPERATION)
ENABLED
(DEFAULT)DISABLED
Table 5.2 Supply Current vs. Conversion Rate for EMC1404
Table 5.2 Supply Current vs. Conversion Rate for EMC1404 (continued)
Data Sheet
AVERAGE SUPPLY CURRENT
CONVERSION RATE
32 / sec1050uA1050uA0.25x0.25x
64 / sec1100uA1100uA0.125x0.125x
ENABLED
(DEFAULT)DISABLED
5.2 THERM Output
The THERM output is asserted independently of the ALERT output and cannot be masked. Whenever
any of the measured temperatures exceed the user programmed THERM Limit values for the
programmed number of consecutive measurements, the
asserted, it will remain asserted until all measured temperatures drop below the THERM Limit minus
the THERM Hysteresis (also programmable).
When the THERM pin is asserted, the Therm status bits will likewise be set. Reading these bits will
not clear them until the
status bits will be automatically cleared.
5.3 ALERT Output
The ALERT pin is an open drain output and requires a pull-up resistor to VDD and has two modes of
operation: interrupt mode and comparator Mode. The mode of the
ALERT / COMP bit in the Configuration Register (see
AVERAGING FACTOR (BASED ON 1 1-BIT
OPERATION)
ENABLED
(DEFAULT)DISABLED
THERM output is asserted. Once it has been
THERM pin is deasserted. Once the THERM pin is deasserted, the THERM
ALERT output is selected via the
Section 6.4).
5.3.1ALERT Pin Interrupt Mode
When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit
measurement (
The
ALERT pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit
condition has been removed, the
cleared.
The ALERT pin can be masked by setting the MASK bit. Once the ALERT pin has been masked, it
will be de-asserted and remain de-asserted until the MASK bit is cleared by the user. Any interrupt
conditions that occur while the
The ALERT pin is used as an interrupt signal or as an Smbus Alert signal that allows an SMBus slave
to communicate an error condition to the master. One or more
together.
> high limit or < low limit) is detected on any diode or when a diode fault is detected.
ALERT pin will remain asserted until the appropriate status bits are
ALERT pin is masked will update the Status Register normally.
5.3.2ALERT Pin Comparator Mode
When the ALERT pin is configured to operate in comparator mode it will be asserted if any of the
measured temperatures exceeds the respective high limit. The
all temperatures drop below the corresponding high limit minus the THERM Hysteresis value.
When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be
set. Reading these bits will not clear them until the
deasserted, the status bits will be automatically cleared.
The MASK bit will not block the ALERT pin in this mode, however the individual channel masks (see
Section 6.11) will prevent the respective channel from asserting the ALERT pin.
ALERT outputs can be hard-wired
ALERT pin will remain asserted until
ALERT pin is deasserted. Once the ALERT pin is
DS20005272A-page 20 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
5.4 Beta Compensation
The EMC1403 and EMC1404 are configured to monitor the temperature of basic diodes (e.g. 2N3904),
or CPU thermal diodes. It automatically detects the type of external diode (CPU diode or diode
connected transistor) and determines the optimal setting to reduce temperature errors introduced by
beta variation for the External Diode 1 channel only. Compensating for this error is also known as
implementing the transistor or BJT model for temperature measurement.
For discrete transistors configured with the collector and base shorted together, the beta is generally
sufficiently high such that the percent change in beta variation is very small. For example, a 10%
variation in beta for two forced emitter currents with a transistor whose ideal beta is 50 would contribute
approximately 0.25°C error at 100°C. However for substrate transistors where the base-emitter junction
is used for temperature measurement and the collector is tied to the substrate, the proportional beta
variation will cause large error. For example, a 10% variation in beta for two forced emitter currents
with a transistor whose ideal beta is 0.5 would contribute approximately 8.25°C error at 100°C.
The External Diode 2 and External Diode 3 channels do not support Beta Compensation.
5.5 Resistance Error Correction (REC)
Parasitic resistance in series with the external diodes will limit the accuracy obtainable from
temperature measurement devices. The voltage developed across this resistance by the switching
diode currents cause the temperature measurement to read higher than the true temperature.
Contributors to series resistance are PCB trace resistance, on die (i.e. on the processor) metal
resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error
caused by series resistance is +0.7°C per ohm. The EMC1403 and EMC1404 automatically correct up
to 100 ohms of series resistance.
5.6 Programmable External Diode Ideality Factor
The EMC1403 and EMC1404 is designed for external diodes with an ideality factor of 1.008. Not all
external diodes, processor or discrete, will have this exact value. This variation of the ideality factor
introduces error in the temperature measurement which must be corrected for. This correction is
typically done using programmable offset registers. Since an ideality factor mismatch introduces an
error that is a function of temperature, this correction is only accurate within a small range of
temperatures. To provide maximum flexibility to the user, the EMC1403 and EMC1404 provides a 6bit register for each external diode where the ideality factor of the diode used is programmed to
eliminate errors across all temperatures.
APPLICATION NOTE: When monitoring a substrate transistor or CPU diode and beta compensation is enabled, the
Ideality Factor should not be adjusted. Beta Compensation automatically corrects for most
ideality errors.
5.7 Diode Faults
The EMC1403 and EMC1404 detect an open on the DP and DN pins, and a short across the DP and
DN pins. For each temperature measurement made, the device checks for a diode fault on the external
diode channel(s). When a diode fault is detected, the ALERT pin asserts (unless masked, see
Section 5.8) and the temperature data reads 00h in the MSB and LSB registers (note: the low limit will
not be checked). A diode fault is defined as one of the following: an open between DP and DN, a short
from V
If a short occurs across DP and DN or a short occurs from DP to GND, the low limit status bit is set
and the ALERT pin asserts (unless masked). This condition is indistinguishable from a temperature
measurement of 0.000degC (-64°C in extended range) resulting in temperature data of 00h in the MSB
and LSB registers.
If a short from DN to GND occurs (with a diode connected), temperature measurements will continue
as normal with no alerts.
The EMC1403 and EMC1404 contain multiple consecutive alert counters. One set of counters applies
to the
ALERT pin and the second set of counters applies to the THERM pin. Each temperature
measurement channel has a separate consecutive alert counter for each of the
pins. All counters are user programmable and determine the number of consecutive measurements
that a temperature channel(s) must be out-of-limit or reporting a diode fault before the corresponding
pin is asserted.
See Section 6.12 for more details on the consecutive alert function.
5.9 Digital Filter
To reduce the effect of noise and temperature spikes on the reported temperature, the External Diode
1 channel uses a programmable digital filter. This filter can be configured as Level 1, Level 2, or
Disabled. The typical filter performance is shown in
1°C Temperature Sensor with Beta Compensation
Data Sheet
ALERT and THERM
Figure 5.3 and Figure 5.4.
Figure 5.3 Temperature Filter Step Response
DS20005272A-page 22 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
Figure 5.4 Temperature Filter Impulse Response
5.10 Temperature Monitors
In general, thermal diode temperature measurements are based on the change in forward bias voltage
of a diode when operated at two different currents. This
as shown in the following equation:
Figure 5.5 shows a block diagram of the temperature measurement circuit. The negative terminal for
the remote temperature diode, DN, is internally biased with a forward diode voltage referenced to
ground.
VBE is proportional to absolute temperature
where:
k = Boltzmann’s constant
T = absolute temperature in Kelvin [1]
q = electron charge
Figure 5.5 Block Diagram of Temperature Monitoring Circuit
5.11 Temperature Measurement Results and Data
The temperature measurement results are stored in the internal and external temperature registers.
These are then compared with the values stored in the high and low limit registers. Both external and
internal temperature measurements are stored in 11-bit format with the eight (8) most significant bits
stored in a high byte register and the three (3) least significant bits stored in the three (3) MSB
positions of the low byte register. All other bits of the low byte register are set to zero.
The EMC1403 and EMC1404 have two selectable temperature ranges. The default range is from 0°C
to +127°C and the temperature is represented as binary number able to report a temperature from 0°C
to +127.875°C in 0.125°C steps.
The extended range is an extended temperature range from -64°C to +191°C. The data format is a
binary number offset by 64°C. The extended range is used to measure temperature diodes with a large
known offset (such as AMD processor diodes) where the diode temperature plus the offset would be
equivalent to a temperature higher than +127°C.
Table 5.3 shows the default and extended range formats.
Table 5.3 Temperature Data Format
TEMPERATURE (°C)DEFAULT RANGE 0°C TO 127°CEXTENDED RANGE -64°C TO 191°C
Diode Fault000 0000 0000000 0000 0000
-64000 0000 0000000 0000 0000
Note 5.2
-1000 0000 0000001 1111 1000
0000 0000 0000
Note 5.1
0.125000 0000 0001010 0000 0001
1000 0000 1000010 0000 1000
DS20005272A-page 24 2014 Microchip Technology Inc.
010 0000 0000
1°C Temperature Sensor with Beta Compensation
Data Sheet
Table 5.3 Temperature Data Format (continued)
TEMPERATURE (°C)DEFAULT RANGE 0°C TO 127°CEXTENDED RANGE -64°C TO 191°C
64010 0000 0000100 0000 0000
65010 0000 1000100 0000 1000
127011 1111 1000101 1111 1000
127.875011 1111 1111101 1111 1111
128011 1111 1111
Note 5.3
190011 1111 1111111 1111 0000
191011 1111 1111111 1111 1000
>= 191.875011 1111 1111111 1111 1111
Note 5.1In default mode, all temperatures < 0°C will be reported as 0°C.
Note 5.2In the extended range, all temperatures < -64°C will be reported as -64°C.
Note 5.3For the default range, all temperatures > +127.875°C will be reported as +127.875°C.
Note 5.4For the extended range, all temperatures > +191.875°C will be reported as +191.875°C.
110 0000 0000
Note 5.4
5.12 Anti-parallel Diode Connections
The EMC1404 supports reading two external diodes on the same set of pins (DP2, DN2). These
diodes are connected as shown in
diodes will be reverse biased by a VBE voltage (approximately 0.7V). Because of this reverse bias,
only discrete thermal diodes (such as a 2N3904) are recommended to be placed on these pins.
Figure 5.2. Due to the anti-parallel connection of these diodes, both
5.13 External Diode Connections
The EMC1403 can be configured to measure a CPU substrate transistor, a discrete 2N3904 thermal
diode, or an AMD processor diode. The diodes can be connected in a variety of ways as indicated in
Figure 5.6.
The EMC1404 can be configured to measure a CPU substrate transistor, a discrete 2N3904 thermal
diode, or an AMD processor diode on the External Diode 1 channel only. The External Diode 2 and
External Diode 3 channels are configured to measure a pair of discrete anti-parallel diodes (shared on
pins DP2 and DN2). The supported configurations for the external diode channels are shown in
Table 6.1 Register Set in Hexadecimal Order (continued)
Data Sheet
REGISTER
ADDRESSR/WREGISTER NAMEFUNCTION
37hRTHERM Limit StatusStatus bits for the THERM Limits00hPage 42
40hR/WFilter Control
FDhRProduct ID
FEhRMicrochip ID
FFhRRevision
Controls the digital filter setting for
the External Diode 1 channel
Stores a fixed value that identifies
each product
Stores a fixed value that
represents Microchip
Stores a fixed value that
represents the revision number
DEFAULT
VALUEPAGE
00hPage 42
Table 6.25Page 43
5DhPage 43
01h or 04hPage 44
6.1 Data Read Interlock
When any temperature channel high byte register is read, the corresponding low byte is copied into
an internal ‘shadow’ register. The user is free to read the low byte at any time and be guaranteed that
it will correspond to the previously read high byte. Regardless if the low byte is read or not, reading
from the same high byte register again will automatically refresh this stored low byte data.
6.2 Temperature Data Registers
Table 6.2 Temperature Data Registers
ADDRR/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
00hR
29hR
01hR
10hR
23hR
24hR
2AhR
2BhR
As shown in Table 6.2, all temperatures are stored as an 11-bit value with the high byte representing
the integer value and the low byte representing the fractional value left justified to occupy the MSBits.
Internal Diode
High Byte
Internal Diode
Low Byte
External Diode
1 High Byte
External Diode
1 Low Byte
External Diode
2 High Byte
External Diode
2 Low Byte
External Diode
3 High Byte
External Diode
3 Low Byte
128643216842100h
0.50.250.125-----00h
128643216842100h
0.50.250.125-----00h
128643216842100h
0.50.250.125-----00h
128643216842100h
0.50.250.125-----00h
DS20005272A-page 30 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
6.3 Status Register
Table 6.3 Status Register
ADDRR/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
02hRStatusBUSY--HIGHLOWFAULTTHERM-00h
The Status Register reports general error conditions. To identify specific channels, refer to
Section 6.10, Section 6.15, Section 6.16, and Section 6.17. The individual Status Register bits are
cleared when the appropriate High Limit, Low Limit, or THERM Limit register has been read or cleared.
Bit 7 - BUSY - This bit indicates that the ADC is currently converting. This bit does not cause either
the
ALERT or THERM pins to be asserted.
Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit.
See the High Limit Status Register for specific channel information (
will assert the ALERT pin.
Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low
limit. See the Low Limit Status Register for specific channel information (
bit will assert the ALERT pin.
Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode
channels. See the External Diode Fault Register for specific channel information (
set, this bit will assert the ALERT pin.
Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed
THERM limit. See the THERM Limit Status Register for specific channel information (
When set, this bit will assert the THERM pin.
Section 6.15). When set, this bit
Section 6.16). When set, this
Section 6.10). When
Section 6.17).
6.4 Configuration Register
Table 6.4 Configuration Register
ADDRR/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
03h
09h
R/WConfiguration
The Configuration Register controls the basic operation of the device. This register is fully accessible
at either address.
Bit 7 - MASK_ALL - Masks the ALERT pin from asserting.
‘0’ (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT
pin will be asserted.
‘1’ - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is
configured as a secondary
Bit 6 - RUN / STOP - Controls Active/Standby modes.
‘0’ (default) - The device is in Active mode and converting on all channels.
‘1’ -The device is in Standby mode and not converting.
MASK_
ALL
RUN/
STOP
ALERT/
COMP
RECD1RECD2RANGE
THERM pin. The Status Registers will be updated normally.
Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin.
‘0’ (default) - The ALERT pin acts as described in Section 5.3.
‘1’ - The ALERT pin acts in comparator mode as described in Section 5.3.2. In this mode the
MASK_ALL bit is ignored.
Bit 4 - RECD1 - Disables the Resistance Error Correction (REC) for External Diode 1.
‘0’ (default)- REC is enabled for External Diode 1.
‘1’ - REC is disabled for External Diode 1.
Bit 3 - RECD2 - Disables the Resistance Error Correction (REC) for External Diode 2 and External
Diode 3.
‘0’ (default) - REC is enabled for External Diode 2 and External Diode 3.
‘1’ - REC is disabled for External Diode 2 and External Diode 3.
Bit 2 - RANGE - Configures the measurement range and data format of the temperature channels.
‘0’ (default) - The temperature measurement range is 0°C to +127.875°C and the data format is
binary.
‘1’ -The temperature measurement range is -64°C to +191.875°C and the data format is offset
binary (see Table 5.3).
Bit 1 - DAVG_DIS - Disables the dynamic averaging feature on all temperature channels.
‘0’ (default) - The dynamic averaging feature is enabled. All temperature channels will be converted
with an averaging factor that is based on the conversion rate as shown in Table 5.1 and Table 5.2.
‘1’ - The dynamic averaging feature is disabled. All temperature channels will be converted with a
maximum averaging factor of 1x (equivalent to 11-bit conversion). For higher conversion rates, this
averaging factor will be reduced as shown in Table 5.1 and Table 5.2.
Bit 0 - APDD (EMC1404 only) - Disables the anti-parallel diode operation. Beta Compensation is
disabled on External Diode 2 and 3 regardless of APDD setting. In addition, External Diode 2 Beta
Configuration register will be ignored.
‘0’ (default) - Anti-parallel diode mode is enabled. Two external diodes will be measured on the
DP2 and DN2 pins.
‘1’ - Anti-parallel diode mode is disabled. Only one external diode will be measured on the DP2
and DN2 pins.
6.5 Conversion Rate Register
Table 6.5 Conversion Rate Register
ADDRR/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
04h
R/W
0Ah
Conversion
Rate
----CONV[3:0]
The Conversion Rate Register controls how often the temperature measurement channels are updated
and compared against the limits. This register is fully accessible at either address.
Bits 3-0 - CONV[3:0] - Determines the conversion rate as shown in Table 6.6.
DS20005272A-page 32 2014 Microchip Technology Inc.
The device contains both high and low limits for all temperature channels. If the measured temperature
exceeds the high limit, then the corresponding status bit is set and the
ALERT pin is asserted.
Likewise, if the measured temperature is less than or equal to the low limit, the corresponding status
bit is set and the
ALERT pin is asserted.
The data format for the limits must match the selected data format for the temperature so that if the
extended temperature range is used, the limits must be programmed in the extended data format.
The limit registers with multiple addresses are fully accessible at either address.
When the device is in standby mode, updating the limit registers will have no affect until the next
conversion cycle occurs. This can be initiated via a write to the One Shot Register or by clearing the
RUN / STOP bit in the Configuration Register (see
DS20005272A-page 34 2014 Microchip Technology Inc.
Section 6.4).
1°C Temperature Sensor with Beta Compensation
Data Sheet
6.7 Scratchpad Registers
Table 6.8 Scratchpad Register
ADDRR/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
11hR/WScratchpad7654321000h
12hR/WScratchpad7654321000h
The Scratchpad Registers are Read Write registers that are used for place holders to be software
compatible with legacy programs. Reading from the registers will return what is written to them.
6.8 One Shot Register
Table 6.9 One Shot Register
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
0FhWOne Shot
The One Shot Register is used to initiate a one shot command. Writing to the one shot register, when
the device is in standby mode and BUSY bit (in Status Register) is ‘0’, will immediately cause the ADC
to update all temperature measurements. Writing to the One Shot Register while the device is in active
mode will have no affect.
Writing to this register initiates a single conversion cycle. Data
is not stored and always reads 00h
00h
6.9 Therm Limit Registers
Table 6.10 Therm Limit Registers
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
19hR/W
1AhR/W
20hR/W
21hR/W
External
Diode 1
THERM Limit
External
Diode 2
THERM Limit
Internal Diode
THERM Limit
THERM
Hysteresis
1286432168421
1286432168421
1286432168421
1286432168421
55h
(85°C)
55h
(85°C)
55h
(85°C)
0Ah
(10°C)
30hR/W
The THERM Limit Registers are used to determine whether a critical thermal event has occurred. If
the measured temperature exceeds the THERM Limit, then the
setting must match the chosen data format of the temperature reading registers.
Unlike the ALERT pin, the THERM pin cannot be masked. Additionally, the THERM pin will be released
once the temperature drops below the corresponding threshold minus the THERM Hysteresis.
6.10 External Diode Fault Register
Table 6.11 External Diode Fault Register
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
1BhR-C
External
Diode Fault
----E3FLTE2FLTE1FLT-00h
The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the
Status Register to be set. This register is cleared when it is read.
Bit 3 - E3FLT - This bit is set if the External Diode 3 channel reported a diode fault.
Bit 2 - E2FLT - This bit is set if the External Diode 2 channel reported a diode fault.
Bit 1 - E1FLT - This bit is set if the External Diode 1 channel reported a diode fault.
6.11 Channel Mask Register
Table 6.12 Channel Mask Register
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
1FhR/W
Channel
Mask
----
The Channel Mask Register controls individual channel masking. When a channel is masked, the
ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error. The
channel mask does not mask the
THERM pin.
Bit 3 - E3MASK - Masks the ALERT pin from asserting when the External Diode 3 channel is out of
limit or reports a diode fault.
‘0’ (default) - The External Diode 3 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 3 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
Bit 2 - E2MASK - Masks the ALERT pin from asserting when the External Diode 2 channel is out of
limit or reports a diode fault.
‘0’ (default) - The External Diode 2 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 2 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
Bit 1 - E1MASK - Masks the ALERT pin from asserting when the External Diode 1 channel is out of
limit or reports a diode fault.
‘0’ (default) - The External Diode 1 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 1 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
E3
MASK
E2
MASK
E1
MASK
INT
MASK
00h
DS20005272A-page 36 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out
of limit.
‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit.
‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.
6.12 Consecutive ALERT Register
Table 6.13 Consecutive ALERT Register
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
22hR/W
The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must
be detected in consecutive measurements before the
the Consecutive ALERT Register controls the SMBus Timeout functionality.
An out-of-limit condition (i.e. HIGH, LOW, or FAULT) occurring on the same temperature channel in
consecutive measurements will increment the consecutive alert counter. The counters will also be reset
if no out-of-limit condition or diode fault condition occurs in a consecutive reading.
When the ALERT pin is configured as an interrupt, when the consecutive alert counter reaches its
programmed value, the following will occur: the STATUS bit(s) for that channel and the last error
condition(s) (i.e. E1HIGH, or E2LOW and/or E2FAULT) will be set to ‘1’, the
asserted, the consecutive alert counter will be cleared, and measurements will continue.
When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode
fault and low limit errors and only increment if the measured temperature exceeds the High Limit.
Additionally, once the consecutive alert counter reaches the programmed limit, the
asserted, but the counter will not be reset. It will remain set until the temperature drops below the High
Limit minus the THERM Hysteresis value.
For example, if the CALRT[2:0] bits are set for 4 consecutive alerts on an EMC1403 device, the high
limits are set at 70°C, and none of the channels are masked, then the
the following four measurements:
1. Internal Diode reads 71°C and both external diodes read 69°C. Consecutive alert counter for INT
2. Both Internal Diode and External Diode 1 read 71°C and External Diode 2 reads 68°C. Consecutive
Consecutive
ALERT
TIME
OUT
CTHRM[2:0]CALRT[2:0]-70h
ALERT or THERM pin is asserted. Additionally,
is incremented to 1.
alert counter for INT is incremented to 2 and for EXT1 is set to 1.
ALERT pin will be
ALERT pin will be
ALERT pin will be asserted after
3. The External Diode 1 reads 71°C and both the Internal Diode and External Diode 2 read 69°C.
Consecutive alert counter for INT and EXT2 are cleared and EXT1 is incremented to 2.
4. The Internal Diode reads 71°C and both external diodes read 71°C. Consecutive alert counter for
INT is set to 1, EXT2 is set to 1, and EXT1 is incremented to 3.
5. The Internal Diode reads 71°C and both the external diodes read 71°C. Consecutive alert counter
for INT is incremented to 2, EXT2 is set to 2, and EXT1 is incremented to 4. The appropriate status
bits are set for EXT1 and the
ALERT pin is asserted. EXT1 counter is reset to 0 and all other
counters hold the last value until the next temperature measurement.
Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled.
‘0’ (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely
without the device resetting its SMBus protocol.
‘1’ - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms,
Bits 6-4 - CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the
corresponding THERM Limit before the
THERM pin is asserted. All temperature channels use this
value to set the respective counters. The consecutive THERM counter is incremented whenever any
measurement exceed the corresponding THERM Limit.
If the temperature drops below the THERM limit, then the counter is reset. If a number of consecutive
measurements above the THERM limit occurs, then the
THERM pin is asserted low.
Once the THERM pin has been asserted, the consecutive therm counter will not reset until the
corresponding temperature drops below the THERM Limit minus the THERM Hysteresis value.
The bits are decoded as shown in Tab le 6.14. The default setting is 4 consecutive out of limit
conversions.
Bits 3-1 - CALRT[2:0] - Determine the number of consecutive measurements that must have an out of
limit condition or diode fault before the
to set the respective counters. The bits are decoded as shown in
ALERT pin is asserted. All temperature channels use this value
Table 6.14. The default setting is 1
consecutive out of limit conversion.
Table 6.14 Consecutive Alert / THERM Settings
210
000
MEASUREMENTS
1
(default for CALRT[2:0])
0012
0113
NUMBER OF CONSECUTIVE OUT OF LIMIT
111
(default for CTHRM[2:0])
4
6.13 Beta Configuration Registers
Table 6.15 Beta Configuration Registers
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
25hR/W
26hR/W
External
Diode 1 Beta
Configuration
External
Diode 2 Beta
Configuration
----ENABLE1BETA1[2:0]08h
08h for
----ENABLE2BETA2[2:0]
EMC1403
or 07h for
EMC1404
This register is used to set the Beta Compensation factor that is used for the external diode channels.
Bit 3 - ENABLEx - Enables the Beta Compensation factor autodetection function. This function shall
be disabled for External Diode 2.
‘0’ - The Beta Compensation Factor autodetection circuitry is disabled. The External Diode will
always use the Beta Compensation factor set by the BETAx[2:0] bits.
‘1’ (default) - The Beta Compensation factor autodetection circuitry is enabled. At the beginning of
every conversion, the optimal Beta Compensation factor setting will be determined and applied.
The BETAx[2:0] bits will be automatically updated to indicate the current setting.
DS20005272A-page 38 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
Bit 2-0 - BETAx[2:0] - These bits always reflect the current beta configuration settings. If autodetection
circuitry is enabled, then these bits will be updated automatically and writing to these bits will have no
effect. If the autodetection circuitry is disabled, then these bits will determine the beta configuration
setting that is used for their respective channels.
Care should be taken when setting the BETAx[2:0] bits when the autodetection circuitry is disabled. If
the Beta Compensation factor is set at a beta value that is higher than the transistor beta, then the
circuit may introduce measurement errors. When measuring a discrete thermal diode (such as
2N3904) or a CPU diode that functions like a discrete thermal diode (such as an AMD processor
diode), then the BETAx[2:0] bits should be set to ‘111b’.
Table 6.16 CPU Beta Values
BETAX[2:0]
HEXENABLEX
MINIMUM BETA21 0
0h00000.11
1h00010.18
2h00100.25
3h00110.33
4h01000.43
5h01011.00
6h01102.33
7h0111Disabled
8h - Fh1XXXAutodetection
6.14 External Diode Ideality Factor Registers
Table 6.17 Ideality Configuration Registers
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
External
27hR/W
Diode 1
Ideality
Factor
--IDEALITY1[5:0]12h
External
28hR/W
Diode 2
Ideality
--IDEALITY2[5:0]12h
Factor
External
31hR/W
Diode 3
Ideality
--IDEALITY3[5:0]12h
Factor
These registers store the ideality factors that are applied to the external diodes. Table 6.18 defines
each setting and the corresponding ideality factor. Beta Compensation and Resistance Error Correction
For CPU substrate transistors that require the BJT transistor model, the ideality factor behaves slightly
differently than for discrete diode-connected transistors. Refer to
APPLICATION NOTE: When measuring a 65nm Intel CPUs, the Ideality Setting should be the default 12h. When
measuring 45nm Intel CPUs, the Ideality Setting should be 15h.
6.15 High Limit Status Register
Table 6.20 High Limit Status Register
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
35hR-C
High Limit
Status
The High Limit Status Register contains the status bits that are set when a temperature channel high
limit is exceeded. If any of these bits are set, then the HIGH status bit in the Status Register is set.
Reading from the High Limit Status Register will clear all bits if. Reading from the register will also
clear the HIGH status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and
any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output
(see
Section 5.3.2).
Bit 3 - E3HIGH - This bit is set when the External Diode 3 channel exceeds its programmed high limit.
Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel exceeds its programmed high limit.
Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel exceeds its programmed high limit.
Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.
The Low Limit Status Register contains the status bits that are set when a temperature channel drops
below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.
----E3LOWE2LOWE1LOWILOW00h
Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear
the LOW status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and
any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output
(see
Section 5.3.2).
Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low
limit.
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low
limit.
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low
limit.
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
6.17 THERM Limit Status Register
Table 6.22 THERM Limit Status Register
1°C Temperature Sensor with Beta Compensation
Data Sheet
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
37hR-C
THERM
Limit
Status
The THERM Limit Status Register contains the status bits that are set when a temperature channel
THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register
is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the
temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status
bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all
individual channel THERM bits are cleared.
Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds its programmed THERM
Limit. When set, this bit will assert the
Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds its programmed THERM
Limit. When set, this bit will assert the
Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds its programmed THERM
limit. When set, this bit will assert the
Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds its programmed THERM limit.
When set, this bit will assert the
-- - -
THERM pin.
THERM pin.
THERM pin.
THERM pin.
E3
THERM
E2
THERM
E1
THERM
ITHERM00h
6.18 Filter Control Register
Table 6.23 Filter Configuration Register
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
40hR/WFilter Control------FILTER[1:0]00h
The Filter Configuration Register controls the digital filter on the External Diode 1 channel.
DS20005272A-page 42 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
Bits 1-0 - FILTER[1:0] - Control the level of digital filtering that is applied to the External Diode
temperature measurements as shown in
filter behavior.
Table 6.24 Filter Settings
FILTER[1:0]
00Disabled (default)
01Level 1
10Level 1
11Level 2
6.19 Product ID Register
Table 6.24. See Figure 5.3and Figure 5.4 for examples on the
AVERAGING10
Table 6.25 Product ID Register
ADDRR/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
FDhRProduct ID00100001
FDhRProduct ID00100101
The Product ID Register holds a unique value that identifies the device.
21h
EMC1403
25h
EMC1404
6.20 Microchip ID Register (FEh)
Table 6.26 Manufacturer ID Register
ADDR.R/WREGISTERB7B6B5B4B3B2B1B0DEFAULT
FEhRMCHP ID010111015Dh
The Manufacturer ID register contains an 8 bit word that identifies the Microchip as the manufacturer
of the EMC1403 and EMC1404.
Figure 8.4 Package Drawing and PCB Footprint for SOIC-14
DS20005272A-page 50 2014 Microchip Technology Inc.
1°C Temperature Sensor with Beta Compensation
Data Sheet
8.1 Package Markings
8.1.1EMC1404-X-AIZL (10-pin MSOP)
All devices will be marked on the first line of the top side with “1404”. On the second line, they will be
marked with the appropriate -X number (-1, -2, etc), the Functional Revision “B” and Country Code
(CC).
8.1.2EMC1403-X-AIZL (10-pin MSOP)
All devices will be marked on the first line of the top side with “1403”. On the second line, packages
will be marked with the appropriate -X number (-1, -2, etc), the Functional Revision “B” and Country
Code (CC).
8.1.3EMC1403-1-AIA and EMC1403-2-AIA (10-pin DFN)
The EMC1403-1-AIA will be marked on the first line of the top side with the code “31” followed by the
first two characters of the last 6 characters of the Lot Number. The EMC1403-2-AIA is marked with
the code “32” followed by the first two characters of the last 6 characters of the Lot Number. On the
second line, packages will be marked with the last 4 characters of the Lot Number.
For example: If the Lot Number is “2H123456A”, the first line on the EMC1403-1-AIA will read “3123”
and the second line will read “456A”.
8.1.4EMC1403-YZT
All devices will be marked on the first line of the top side with “EMC1403” followed by “-X” where X is
the appropriate -X number (-1, -2, etc). On the second line, packages will be marked with Functional
Revision “B”, date code and the last 7 characters of Lot Number.
REV AREV A replaces previous SMSC version Rev. 2.0 (08-10-12)
Data Sheet
Rev. 2.0 (08-10-12)Table 3.3, "SMBus Electrical
Specifications"
Section 6.21, "Revision
Register (FFh)"
Rev. 1.38 (02-28-12)Figure 2.2,
"EMC1403/EMC1404 Pin
Diagram, DFN-10"
Table 2.1, "EMC1403 and
EMC1404 Pin Description"
Rev. 1.37 (01-06-10)Section 8.1.4, "EMC1403-
YZT"
Section 8.1.3, "EMC1403-1-
AIA and EMC1403-2-AIA
(10-pin DFN)"
Rev. 1.36 (07-02-09)Table 2.1, "EMC1403 and
EMC1404 Pin Description"
Table 2.1, "EMC1403 and
EMC1404 Pin Description"
Added conditions for t
minimum of 0.3μs is required when receiving from
the master. Data hold time is 0μs min when
transmitting to the master.
Added row to indicate that revision ID can be 04h.
Revision ID may be 04h or 01h.
Added exposed pad and updated so it looks more
like a square.
Added last row for DFN bottom pad.
Recommendation is to connect it to ground.
Added to last sentence: “Revision “B”, date code
and the last 7 characters of” before “Lot Number”.
Corrected device code. Instead of being “32” for
both devices in the 10-pin DFN package, the code
is “31” for the EMC1403-1-AIA and “32” for the
EMC1403-2-AIA.
In pin description table, added to function column:
“requires pull-up resistor” for SMDATA and SMCLK
pins
Identified 5V tolerant pins. Added the following
application note below table: “For the 5V tolerant
pins that have a pull-up resistor (SMCLK,
SMDATA,
difference between VDD and the pull-up voltage
must never exceed 3.6V.”
THERM, and ALERT), the voltage
. Data hold time
HD:DAT
Table 3.1, "Absolute
Maximum Ratings"
Table 3.2, "Electrical
Specifications"
DS20005272A-page 52 2014 Microchip Technology Inc.
Updated voltage limits for 5V tolerant pins with
pull-up resistors.
Added the following note below table: “For the 5V
tolerant pins that have a pull-up resistor (SMCLK,
SMDATA,
voltage must not exceed 3.6V when the device is
unpowered.”
Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•Microchip is willing to work with the customer who is concerned about the integrity of their code.
•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
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Trademarks
The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32
logo, rfPIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and
other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MTP, SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM,
MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and ZScale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
A more complete list of registered trademarks and common law trademarks owned by Standard Microsystems Corporation (“SMSC”)
is available at: www.smsc.com. The absence of a trademark (name, logo, etc.) from the list does not constitute a waiver of any
intellectual property rights that SMSC has established in any of its trademarks.
All other trademarks mentioned herein are property of their respective companies.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
®
MCUs and dsPIC® DSCs, KEELOQ
®
code hopping
DS20005272A-page 54 2014 Microchip Technology Inc.
Worldwide Sales and Service
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
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support
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Atlanta
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Tel: 678-957-9614
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