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BM20SPKXYNBZ
User Manual
46 pgs3.4 Mb0

Microchip Technology BM20SPKXYNBZ User Manual

201
5 M
icrochip Technol
ogy I
nc . P
ag
e 1
P
reliminar
y
Ed
ition
F
eat ures :
Co
mplete, Fu
ll
y
C
ert
ifi
ed, Embedded
2.4 GH
z B
l
uetoot
h
® V
ers
ion4. 1
M
o
dule
B
l
uetoot
hCl
assic (
B
DR
/
E
DR)
B
l
uetoot
h SIG
C
ert
ifi
ed
Onbo
ard embedded
B
l
uetoot
h S
tac
k
Tran
sparent U
A R
Tmo
de
f
o
r seamless seria
l
dataover U
ARTi
n
terface
Easytoc
on
f
i
gure wit
h Wi
ndo
wsGU
I
o
r direct
b
y
M
C
U
Firmware canbe
f
iel
d upgradable
v
i
a U
A R
T
Co
mpact surface mount module:
29 x 15x
2. 5
mm
3
C
astellated surface mount pads
f
o
r eas
y
and reliable
h
o
st P
C
B
mount
i
n
g
E
nv
i
ronmenta
ll
y
f
riend
l
y
,
RoHS
compliant
Perfect
f
o
r PortableBatter
y
O
perated
D
e
v
i
ces
I
n
terna
l
B
atter
y
R
egulator
C
i
rcuitr
y
W
o
rldwide regulatorycert
ifi
cat
i
on
s
AudioaI
n/O
ut
B
M23
support digitalaud
ioI2S
f
o
rmat
.
B
M20
support ana
l
o
g aud
i
o o
utput
.
Op
e rat iona l:
O
perat
i
ngvo
l
tage:
3.0
V
t
o
4.2
V
T
emperature range:
®
20
Cto 7
0
°
C
Simpl
e, U
ARTi
n
terface
I
n
tegrated crystal,
i
n
terna
lvol
tage
regulator, and matc
hi
n
g circuitr
y
MultipleI
/
O
p
i
n
s
f
o
r contr
o
l
and status
RF/A
na log:
Frequency:
2.402
t
o
2.480 GH
z
R
ece
i
v
eSensit
ivi
ty:
®
9 1
dBm (2Mbps E
DR)
PowerOutput: class
2
/ +
4
dBm ma
x.
Conn
ect
ionDi
stance: >10m
(free space and
noin
terference
)
A
udioprocess or
S
upport 6
4 k
b/s
A
aLawo
r
µ
aL
aw P
C
M
f
o
rmat,or
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V
SD
(
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t
i
nuo
usVariable
Sl
o
peDelta
M
o
dulat
ion)
f
o
r
S
CO
channe
l
o
perat
ion.
No
i
se suppress
i
on
Ec
h
o
suppress
i
on
S
B
Cando
pt
i
on
a
l AA
C
decod
i
n
g
Packet
l
o
ss concealment
B
uild
ainfo
urlanguages (
Chin
ese/Englis
h
/
S
pa
n
ish
/
Frenc
h)voi
ce p rompts and20events
f
o
r e ac
h
on
e (
T
hi
sfunct
i
oncan
be set up
i
n “
IS20XXS
_
UI”t
oo
l.)
S
upport
SCMS
aT
A
udio Codec
20bitDA
Can
d16 bit
A D
Cco
dec
98
d
B
SNR DA
C
playbac
k
P
e riphe ra ls
B
uilt
ain L
ithi
um
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batterycharger (up t
o
350mA )
I
n
tegrate
3
V
,
1.8
V
c
on
f
i
gurable switc
hi
n
g regulator and
LDO
B
uilt
ain
A D
Cfo
r batterym
on
i
tor and
vo
l
tage s ense
.
A li
neainpo
rt
f
o
r externalaud
ioi
n
put
Two L
EDdr
i
v
ers
F
lexible HCI inte rface
High
speed
HCI
a
U
AR
T(Univ
ersa
l A
s
y
n
chr
ono
us
R
ece
i
verTran
smitter
) i
n
terface (up t
o
92 1600
bps
)
MA
C/Baseba nd/Highe r Laye r:
S
ecureAE
S128
encrypt
i
on
B
l
uetoothpr
o
f
il
es
a
H
FP
v
1.
6
a
HS
P
v
1. 1
a
A 2D
P
v
1.2
a
AVR
CPv
1. 5
a
S
PP
v
1.0
a
P
B
A
P
v
1.0
A
nte nna :
Pr
i
n
ted
A
ntenn
a
Complia nce :
B
l
uetoot
h SIG QDID
:
5
899
6
M
o
dule cert
ifi
ed
f
o
r the U
n
i
tedStates ( F
CC
)
and
Can
ada (
IC)
, EuropeanEc
ono
micArea (CE),
K
o
rea (
LT
A )
,Taiwan(
NCC
)
and Japan(
MIC)
201
5 M
icrochip Techn
ology I
nc . P
ag
P
rel
imi
nar
y
Ed
iti
on
FI
GURE 1:
G
e ne ra l Desc ription
:
S
t
ereo module is a f
ully
Òc
ertified
B
lu
etoo
t
h
® V
ersion 4 .1 (
BDR/EDR)
module
for designers who wan
t t
o add
B
lu
etoo
t
h
®
wireless audio and voice applicationsto
t
h
eir
prod
u
c
t
s.
ThisB
lu
etoo
t
hSI
G
c
ertified module
provides acomplete wireless so
lu
t
ion wi
t
h
B
lu
etoo
t
h
sta
c
k,
integrated antenna,and
worldwide radiocertifications in acompa
c
t
surface mountpa
c
k
age
, 2 9x
1
5
x2
.5mm3.
Th
is stereo module bui
l
t
Ò
in L i
Ò
I
on
c
h
arger
and
BM23
c
ontain a digitalaudio interface.
I
t
supports H
SP
,
HF
P,SPP
, A 2DP,
and
AVR
CP
profiles.Bo
t
h AA
C
and
SBC
c
odecs
are supported for
A 2D
P
. N ote
t
h
a
t t
h
e
c
u
stomer mus
t
c
onne
c
t t
h
eir own e
x
t
erna
l
analog
CODEC/DSP/
amplifier and
M
CU
for
audio o
u
t
p
u
t
.
A
pplications
:
B
lu
etoo
t
h
sound bar
B
lu
etoo
t
h
stereo speaker phone
201
5 M
icrochip Technol
ogy I
nc . P
ag
e 3
P
reliminar
y
Ed
ition
T
a
b le of Contents
1.0 D
E
V
I
CEO
V
E
RVIEW .................................................................................................................................. 4
2.0 A
PP
LICATIONINFO
RMATION............................................................................................................... 10
3.0
ELE
CTRICAL C
HA RA
CT
E
RISTICS ....................................................................................................... 18
4.0PRI
NT
E
D A
NTENN
A I
NFO
RMATION..................................................................................................... 23
5
.0 R
EFERENCE
CIRC
U
IT........................................................................................................................... 2
5
6
.0
C
E
RTIFICATIONI
NFO
RMATION..........................................................................................................2
7
7
.0 MOD
ULEOU
TLIN
E
AND R
EF
LO
WPR
O
F
I
L
E
...................................................................................... 29
8.0PACKA GING AND STORA GEI
NFO
RMATION....................................................................................34
A
PPE
N
DIX ........................................................................................................................................................ 3
7
T
O OU
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t
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A bbr
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L
i
s
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HFP:Hands
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f
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AVRCP:Audi
o
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Contro
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h
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f
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SP:Headset Pr
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SPP:SerialPort Pr
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il
e
201
5 M
icrochip Techn
ology I
nc . P
ag
P
rel
imi
nar
y
Ed
iti
on
1
.0 D
EV ICE OVE RV IEW
Th
e stereo m odule series in
c
lu
de
BM2
0
and
BM23.Th
e
c
h
ip integrates
B
lu
etoo
t
h
4. 1 radio
t
ransceiver
,PM
U
and
D
SP
. Figure 1Ò1and 1
Ò
2sh
ows
t
h
e application blo
c
k
diagram.
FI
GURE 1®1:
BM
20 T y
pica lApplication
Th
e following dep i
c
t
s an example of
BM2
0
module operate as an independentsystem orconne
c
t
ed
t
o an
M
CU
.
FI
GURE 1
®
2
:
BM
23 T y
pica lApplication
Th
e following dep i
c
t
s an example of
BM23
moduleconne
c
tedt
o an
MCU,ex
t
erna
l
D
SP/ CODEC
.
ġ
ġ
M
C U
EEPROM
I
C
I
S2020S 1
6
M H
z
C r
ysta l
I2C
U
A RT
BM
20 O
ption
M
icrophone
Aux_I
n
Aud
io
O
utpu
t
201
5 M
icrochip Technol
ogy I
nc . P
ag
P
reliminar
y
Ed
ition
1.1 INT ERFAC E DESC RIPT ION
B
M20pi
n
diagramis s
h
ownin
Figure
1a3.Th
e p
i
n
descript
i
on
s are s
h
ownin T
able
1a1
F
I
GU
R
E 1Ç3
:
B
M20P
I
N D
I
AGRA M
T
A
B
L
E 1®1
:
B
M20P
I
N DES
CRI
P
T
ION
P
i n N
o .
P
i n t
y pe
N
a me Desc riptio
n
1 I/O P0_0
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t ( Not
e
1
)
1
. S
l
i
de
Sw
i
t
c
h D
etector, ac
t
i
vel
o
w.
2
. U
A RT TX_ I
N
D
, ac
t
i
vel
o
w.
2 I
E
A
N
E
mbedded
RO
M/E
x
t
erna
lFl
a
shena
b
l
e
H: E
mbedded
; L
: E
x
t
erna
lFl
a
s
h
3
I P3_0
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
( Not
e
1
)
Line
í
i
nDetector(defa
ul
t
)
, ac
t
i
vel
o
w.
4
I P2_0
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
S
y
ste
m C
on
f
i
gura
t
i
on,
H:
Appli
ca
t
i
on
L
: B
aseband
(
I
BDK M
ode
)
5
I/O P1_
5
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t ( Not
e
1
)
1
.
N
F
C
detec
t
ionpi
n, a c
t
i
vel
o
w.
2.O
u
t
_ Ind_0
3
. S
l
i
de
Sw
i
t
c
h D
etector, ac
t
i
vel
o
w.
4.B
u
zz
er
S
i
gna
lOu
t
p
u
t
6
I/O P0_
4
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t.( Not
e
1
)
1
.
N
F
C
detec
t
ionpi
n, a c
t
i
vel
o
w.
2.O
u
t
_ Ind_0
7 O
S
PKR R
í
channelanaloghead
p
h
one o
u
t
p
u
t
8
O
AOHP
M H
ead
p
h
one commonmode o
u
t
p
u
t
/
sens
ein
p
u
t
.
201
5 M
icrochip Technol
ogy I
nc . P
ag
P
reliminar
y
Ed
ition
P
i n N
o .
P
i n t
y pe
N
a me Desc riptio
n
9
O
S
P
K
L Líchannelanaloghead
p
h
one o
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t
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u
t
10 P
VDDA
P
o
s
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v
epower
s
uppl
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/
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l
t
agefor
C
ODE
C
, no n eedto addpower
tot
h
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n
.
11 I
M
IC1_ P
M
ic1
m
ono d
i
ff
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t
i
alanalogpo
s
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v
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p
u
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12 I
M
IC1_
N
M
ic1
m
ono d
i
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t
i
alanalog nega
t
i
v
ein
p
u
t
1
3
P
M
IC_BIA
S
E
l
ectric
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h
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b
i
a
singvo
l
t
age
1
4
I A IR R
í
channelsingleíended analogin
p
u
t
s
1
5
I A I
L Líchannelsingleíended analogin
p
u
t
s
1
6
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S
y
ste
mRese
t
Pi
n,Lo
w
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t
1
7
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t
p
u
t
, no needto addpowerto
t
h
ispi
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.
1
8
I/O P0_ 1
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t ( Not
e
1
)
1
.
F
W
D
k
e
y
w
h
en cla
ss
2 R
F
(
defa
ul
t
)
, ac
t
i
vel
o
w.
2
.
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ss
1 T
X
C
ontrolsignalofe
x
t
erna
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s
w
i
t
ch, ac
t
i
v
e
h
i
g
h
.
1
9
P
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ower o
u
t
p
u
t
, no needto addpowerto
t
h
ispi
n
20 P ADA P_ I
N
5V
P
ower ada
p
t
orin
p
u
t
2 1 P
B
AT_ I
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3.3V~4.2
VLiíI
onbatter
y
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u
t
22
í
N
C
N
oConnec
t
i
on
2
3
P
G
N
D
G
roundPin
2
4
P
SYS
_ PWR
S
y
ste
mPower
O
u
t
p
u
t
B
AT
m
ode
: 3.3~4.2
V
Adap
t
ermode
: 4.0
V
2
5
P
BK
_OUT 1.8V
b
u
cko
u
t
p
u
t
, no needto addpowerto
t
h
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n
2
6
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MFB
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owerke
y
w
h
enin offm
ode
2
. U
A RT_ RX_ I
N
D
: M
C
U
u
s
etowake
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pBT
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e
1
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2
7
I
L
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E
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r
i
v
er
1
2
8
I
L
ED2
L
E
D D
r
i
v
er
2
2
9
I P2_
4
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
S
y
ste
m C
on
f
i
gura
t
i
on,
L
: B
oo
t
M
ode
w
i
t
h
P2_0
l
owco
m
b
i
na
t
i
on
3
0 I P0_2
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
( Not
e
1
)
P
lay
/
P
aus
eke
y
(
defa
ul
t
)
, ac
t
i
vel
o
w.
3
1 I/O P0_
3
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t ( Not
e
1
)
1.R
EV
k
e
y
(
defa
ul
t
)
, ac
t
i
vel
o
w.
2.B
u
zz
er
S
i
gna
lOu
t
p
u
t
3.O
u
t
_ Ind_1
4
.
Cla
ss
1 R
X
C
ontrolsignalofe
x
t
erna
lRF
T/R
s
w
i
t
ch, ac
t
i
v
e
h
i
g
h
.
3
2 O
HCI_T
X
D
HCI
í
U
A RT T
X
data
33
I
HCI_ R
X
D
HCI
í
U
A RT R
X
data
34
I P0_
5
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
( Not
e
1
)
V
olum
e down(defa
ul
t
)
, ac
t
i
vel
o
w.
35
I P2_
7
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
( Not
e
1
)
V
olum
e
u
p
k
e
y
(
defa
ul
t
)
, ac
t
i
vel
o
w.
201
5 M
icrochip Technol
ogy I
nc . P
ag
P
reliminar
y
Ed
ition
P
i n N
o .
P
i n t
y pe
N
a me Desc riptio
n
36
I P2_
4
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
S
y
ste
m C
on
f
i
gura
t
i
on,
L
: B
oo
t
M
ode
w
i
t
h
P2_0
l
owco
m
b
i
na
t
i
on
37
P
G
N
D
G
roundPin
38
í
N
C
N
oConnec
t
i
on
39
í
N
C
N
oConnec
t
i
on
4
0
í
N
C
N
oConnec
t
i
on
*
I
: signa
l inputpin
* O
: signalo
utput
pin
*I/O
: signa
l inp
ut
/
utput
pin
*
P
:po
w
erpin
N o
t
e 1: T heseb u
tt
onor f
u nc
t
i
o
ns can b e setup by “I
S20XXS
_
U
I
”
t
ool
.
201
5 M
icrochip Technol
ogy I
nc . P
ag
P
reliminar
y
Ed
ition
B
M23pi
n
diagramis s
h
ownin
Figure
1a4.Th
e p
i
n
descript
i
on
s are s
h
ownin T
able
1a2
F
I
GU
R
E 1Ç
4
:
B
M23P
I
N D
I
AGRA M
T
A
B
L
E 1®2
:
B
M23P
I
N DES
CRI
P
T
ION
P
i n N
o .
P
i n
T
y pe
N
a me Desc riptio
n
1 I/O P0_0
IO pi
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t ( Not
e
1
)
U
A RT TX_ I
N
D
2 I/O R
F
S
0
I
2
S
i
nterface
:DA
C L
e
f
t
/
Ri
g
h
t
Cloc
k
3
I/O T
F
S
0
I
2
S
i
nterface
:
A
D
C L
e
f
t
/
Ri
g
h
t
Cloc
k
4
I/O
S
L
K
0 I
2
S
i
nterface
: B
i
t
Cloc
k
5
I
D
R0 I
2
S
i
nterface
:DA
C
D
igi
t
alL
e
f
t
/
Ri
g
htD
ata
6
O
D
T0 I
2
S
i
nterface
:
A
DCD
igi
t
alL
e
f
t
/
Ri
g
htD
ata
7
I/O P0_
4
IO pi
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
8
I
E
A
N
E
mbedded
RO
M/E
x
t
erna
lFl
a
shena
b
l
e
H
i
g
h
:ROM
m
ode
;
L
o
w
: E
x
t
erna
lFl
a
shm
ode
9
I
M
IC1_ P
M
ic1
m
ono d
i
ff
eren
t
i
alanalogpo
s
iti
v
ein
p
u
t
10 I
M
IC1_
N
M
ic1
m
ono d
i
ff
eren
t
i
alanalog nega
t
i
v
ein
p
u
t
11 P
M
IC_BIA
S
P
ower o
u
t
p
u
t
,
micro
p
h
one
b
i
a
singvo
l
t
age
12 P
VDDA
P
ower o
u
t
p
u
t
, reservefor e
x
t
ernalca
p
t
o
f
i
ne
t
u
ne audiofre
quenc
y
1
3
I A IR
S
t
ereo analog
l
inein,R
í
channe
l
1
4
I A I
L
S
t
ereo analog
l
inei
n,
Líchanne
l
201
5 M
icrochip Technol
ogy I
nc . P
ag
P
reliminar
y
Ed
ition
P
i n N
o .
I
/
O
N
a me Descriptio
n
1
5
P
G
N
D
G
round
1
6
I RST_
N
S
y
ste
mRese
t
Pi
n, a c
t
i
v
e
w
h
en rising edge
.
1
7
íí
N
C
íí
1
8
íí
N
C
íí
1
9
P
VDDIO P
ower o
u
t
p
u
t
,
VDDIO pi
n, no needto addpowerto
t
h
ispi
n
20 I/O P1_
5
IO p i
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
2 1 I/O P0_ 1
IO p i
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
22 P ADA P_ I
N
5V
p
ower ada
p
t
orin
p
u
t
2
3
P
B
AT_ I
N
3.3~4.2
VLiíi
onbatter
y
inp
u
t
2
4
íí
N
C
íí
2
5
P
SYS
_ PWR
S
y
ste
mPower
O
u
t
p
u
t
B
AT
m
ode
: 3.3~4.2
V
Adap
t
ermode
: 4.0
V
2
6
P
BK
_OUT P
ower o
u
t
p
u
t
,
1v8
pi
n, no needto addpowerto
t
h
ispi
n
2
7
P
MFB
1.P
owerke
y
w
h
enin offm
ode
2
. U
A RT_ RX_ I
N
D
: M
C
U
u
s
etowake
u
pBT
2
8
P
L
ED1
L
E
D D
r
i
v
er1,4mAm
a
x
2
9
P
L
ED2
L
E
D D
r
i
v
er2,4mAm
a
x
3
0 I P2_
4
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
S
y
ste
m C
on
f
i
gura
t
i
on,
L
: B
oo
t
M
ode
w
i
t
h
P2_0
l
owco
m
b
i
na
t
i
on
3
1 I/O P0_2 IO pi
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
3
2 I/O P0_
3
IO p i
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
33
O
HCI_T
X
D
HCI
í
U
A RT T
X
data
34
I
HCI_ R
X
D
HCI
í
U
A RT R
X
data
35
I/O P0_
5
IO p i
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
36
I/O P2_
7
IO p i
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
37
I/O P2_0 IO pi
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
38
I/O P3_0 IO p i
n, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
39
I P2_0
IO
pi
n
, defa
ul
t
p
ull
í
h
i
g
h
inp
u
t
S
y
ste
m C
on
f
i
gura
t
i
on,
H:
Appli
ca
t
i
on
L
: B
aseband
(
I
BDK M
ode
)
4
0 P
G
N
D
G
round
.
4
1
íí
N
C
íí
4
2
íí
N
C
íí
43
íí
N
C
íí
*
I
: signa
l inputpin
* O
: signalo
utput
pin
*I/O
: signa
l inp
ut
/
utput
pin
*
P
:po
w
erpin
N o
t
e 1: T heseb u
tt
onor f
u nc
t
i
o
ns can b e setup by “I
S20XXS
_
U
I
”
t
ool
.
201
5 M
icrochip Techn
ology I
nc . P
ag
10
P
rel
imi
nar
y
Ed
iti
on
2
.0
A PPL
I
C
A T
IONINFOR
M
A T
IO
N
2 .1 O PERAT IO N WIT H EXT ERNA L M
C U
S
t
ereo module suppor
t
U
ART
c
ommand se
t t
o make an e
x
t
erna
l
M
CU
t
ocontrolmodule.
Here is
t
h
econne
c
t
ion interface between
BM
XX
and
M
CU
.
FI
GURE
2
m1:INTERFA
C
EBE
T
WEENMCUA
N
D
BMXXM
ODULE
M
CU
canc
ontrolmodule b
y
U
ART
interface and wakeup module b
y
P
W
R
pin.
S
t
ereo m odule
provide wakeup
M
CU
fun
c
t
ion b
y
c
onne
c
t t
o
P
0_0
pin of module.
“UART
C
ommandSe
t
”
do
c
u
mentprovide allfun
c
t
ion whi
c
h
module supportand
U
I
t
oolwi
ll
h
elp
you
t
o se
t
upyou
r system suppor
t
U
A RT
c
ommand.
For more detaildescription,please reference
“UAR T
_
C
ommandSe
t
_
v154”do
c
u
mentand
“
IS20XX
S_U
I
”
t
ool.
XX
ʼnńŊŠŕřŅ
ʼnńŊŠœřŅ
ŎŇŃ
őıŠı
ŖłœŕŠŕř
ŖłœŕŠœř
ŎńŖŠ
ŘłŌņŖő
ŃŕŠ
ŘłŌņŖő
UA RT i n
te r
fa
c
e
UA RT i n
te r
fa
c
e
201
5 M
icrochip Techn
ology I
nc . P
ag
11
P
rel
imi
nar
y
Ed
iti
on
Here are some suggestions of
U
ART
c
ontrolsigna
l
t
iming se
quence
:
FI
GURE
2m2
:
POWER
ON/O
FF
S
EQUENCE
201
5 M
icrochip Techn
ology I
nc . P
ag
12
P
rel
imi
nar
y
Ed
iti
on
FI
GU R
E 23 :
T
IMI
NGS
EQUENCE
OFR
XINDICATIONAFT
ER
POWER
O
N
FI
GU R
E 24 :
T
IMI
NGS
EQUENCE
OFPOWER
O
FF
201
5 M
icrochip Techn
ology I
nc . P
ag
e13
P
rel
imi
nar
y
Ed
iti
on
FI
GURE
2
m
5
:
T
IMI
NGS
EQUENCE
OFPOWER
O
N (NACK
)
FI
GURE
2
m6
: RESE
T T
IMI
NGS
EQUENCEIFM
ODULE
H
A
NGS
U
P
201
5 M
icrochip Technol
ogy I
nc . P
ag
e14
P
reliminar
y
Ed
ition
FI
GUR
E 2 ¥
7 : T
IMIN
G SEQUENC
E OF POW E
R DR
OP PROTE
C
T
ION
BAT
_ I
N +4V
ġ
RST_N f
romReset
I
C
ġ
I
f
B
T’
s
B
AT u
se adaptor translates voltage by LD
O, w
e recommen
d u
se “Reset
I
C”
to avoidpower
offs
uddenl
y
.
R
est
I
C
spec output p in must be “Open Drain
”
ˣ
del
ay time
ʀ
1
0
ms
R
ec omme n
d p
a r
t : T C M
809SVNB
7
1
3
or
G
6
91L263
T
7
3
Pow
er
2.9 V ~
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