Microchip Technology ATtiny1614, ATtiny1616, ATtiny1617 User Guide
ATtiny1614/1616/1617
tinyAVR® 1-series
Introduction
The ATtiny1614/1616/1617 are members of the tinyAVR® 1-series of microcontrollers, using the AVR® processor with
hardware multiplier, running at up to 20 MHz, with 16 KB Flash, 2 KB of SRAM, and 256 bytes of EEPROM in a 14-,
20- and 24-pin package. The tinyAVR® 1-series uses the latest technologies with a flexible, low-power architecture,
including Event System, accurate analog features, and Core Independent Peripherals (CIPs). Capacitive touch
interfaces with Driven Shield+ and Boost Mode technologies are supported with the integrated Peripheral Touch
Controller (PTC).
Attention: Automotive products are documented in separate data sheets.
Features
• CPU
– AVR® CPU
– Running at up to 20 MHz
– Single-cycle I/O access
– Two-level interrupt controller
– Two-cycle hardware multiplier
• Memories
– 16 KB In-system self-programmable Flash memory
– 256 bytes EEPROM
– 2 KB SRAM
– Write/erase endurance:
• Flash 10,000 cycles
• EEPROM 100,000 cycles
– Data retention:
• 40 years at 55°C
• System
– Power-on Reset (POR)
– Brown-out Detector (BOD)
– Clock options:
• 16/20 MHz low-power internal RC oscillator
• 32.768 kHz Ultra Low-Power (ULP) internal RC oscillator
• 32.768 kHz external crystal oscillator
• External clock input
– Single-pin Unified Program and Debug Interface (UPDI)
– Three sleep modes:
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• Idle with all peripherals running for immediate wake-up
• Standby
– Configurable operation of selected peripherals
• Power-Down with full data retention
• Peripherals
– One 16-bit Timer/Counter type A (TCA) with a dedicated period register and three compare channels
– Two 16-bit Timer/Counter type B (TCB) with input capture
– One 12-bit Timer/Counter type D (TCD) optimized for control applications
– One 16-bit Real-Time Counter (RTC) running from an external crystal, external clock, or internal RC
oscillator
– Watchdog Timer (WDT) with Window mode, with a separate on-chip oscillator
– One USART with fractional baud rate generator, auto-baud, and start-of-frame detection
– One master/slave Serial Peripheral Interface (SPI)
– One Two-Wire Interface (TWI) with dual address match
• Philips I2C compatible
• Standard mode (Sm, 100 kHz)
• Fast mode (Fm, 400 kHz)
• Fast mode plus (Fm+, 1 MHz)
– Three Analog Comparators (AC) with a low propagation delay
– Two 10-bit 115 ksps Analog-to-Digital Converters (ADCs)
– Three 8-bit Digital-to-Analog Converters (DACs) with one external channel
– Multiple voltage references (V
• 0.55V
• 1.1V
• 1.5V
• 2.5V
• 4.3V
– Event System (EVSYS) for CPU independent and predictable inter-peripheral signaling
– Configurable Custom Logic (CCL) with two programmable look-up tables
– Automated CRC memory scan
– Peripheral Touch Controller (PTC)
• Capacitive touch buttons, sliders, wheels and 2D surfaces
• Wake-up on touch
• Driven shield for improved moisture and noise handling performance
• Up to 14 self-capacitance channels
• Up to 49 mutual capacitance channels
– External interrupt on all general purpose pins
• I/O and Packages:
– Up to 22 programmable I/O lines
– 14-pin SOIC150
– 20-pin SOIC300
– 20-pin VQFN 3x3 mm
– 24-pin VQFN 4x4 mm
• Temperature Ranges:
– -40°C to 105°C
– -40°C to 125°C
• Speed Grades:
– 0-5 MHz @ 1.8V – 5.5V
– 0-10 MHz @ 2.7V – 5.5V
– 0-20 MHz @ 4.5V – 5.5V
REF
):
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ATtiny1614/1616/1617
Table of Contents
Introduction.....................................................................................................................................................1
Features......................................................................................................................................................... 1
1. Silicon Errata and Data Sheet Clarification Document..........................................................................10
2. tinyAVR® 1-series Overview..................................................................................................................11
2.1. Configuration Summary..............................................................................................................11
3. Block Diagram.......................................................................................................................................13
4. Pinout.................................................................................................................................................... 14
4.1. 14-Pin SOIC............................................................................................................................... 14
4.2. 20-Pin SOIC............................................................................................................................... 15
4.3. 20-Pin VQFN.............................................................................................................................. 16
4.4. 24-Pin VQFN.............................................................................................................................. 17
5. I/O Multiplexing and Considerations..................................................................................................... 18
5.1. Multiplexed Signals.................................................................................................................... 18
6. Memories.............................................................................................................................................. 19
6.1. Overview.................................................................................................................................... 19
6.2. Memory Map.............................................................................................................................. 20
6.3. In-System Reprogrammable Flash Program Memory................................................................20
6.4. SRAM Data Memory.................................................................................................................. 21
6.5. EEPROM Data Memory............................................................................................................. 21
6.6. User Row....................................................................................................................................21
6.7. Signature Bytes..........................................................................................................................21
6.8. I/O Memory.................................................................................................................................22
6.9. Memory Section Access from CPU and UPDI on Locked Device..............................................24
6.10. Configuration and User Fuses (FUSE).......................................................................................25
7. Peripherals and Architecture.................................................................................................................44
7.1. Peripheral Address Map.............................................................................................................44
7.2. Interrupt Vector Mapping............................................................................................................45
7.3. System Configuration (SYSCFG)...............................................................................................46
8. AVR® CPU............................................................................................................................................ 49
8.1. Features..................................................................................................................................... 49
8.2. Overview.................................................................................................................................... 49
8.3. Architecture................................................................................................................................ 49
8.4. Arithmetic Logic Unit (ALU)........................................................................................................ 51
8.5. Functional Description................................................................................................................51
8.6. Register Summary......................................................................................................................56
8.7. Register Description................................................................................................................... 56
9. NVMCTRL - Nonvolatile Memory Controller......................................................................................... 60
9.1. Features..................................................................................................................................... 60
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9.2. Overview.................................................................................................................................... 60
9.3. Functional Description................................................................................................................61
9.4. Register Summary......................................................................................................................66
9.5. Register Description................................................................................................................... 66
10. CLKCTRL - Clock Controller................................................................................................................. 74
10.1. Features.....................................................................................................................................74
10.2. Overview.................................................................................................................................... 74
10.3. Functional Description................................................................................................................76
10.4. Register Summary......................................................................................................................80
10.5. Register Description...................................................................................................................80
11. SLPCTRL - Sleep Controller................................................................................................................. 90
11.1. Features.....................................................................................................................................90
11.2. Overview.................................................................................................................................... 90
11.3. Functional Description................................................................................................................90
11.4. Register Summary......................................................................................................................93
11.5. Register Description...................................................................................................................93
12. RSTCTRL - Reset Controller................................................................................................................ 95
12.1. Features.....................................................................................................................................95
12.2. Overview.................................................................................................................................... 95
12.3. Functional Description................................................................................................................96
12.4. Register Summary....................................................................................................................100
12.5. Register Description.................................................................................................................100
13. CPUINT - CPU Interrupt Controller..................................................................................................... 103
13.1. Features...................................................................................................................................103
13.2. Overview.................................................................................................................................. 103
13.3. Functional Description..............................................................................................................104
13.4. Register Summary ...................................................................................................................109
13.5. Register Description.................................................................................................................109
14. EVSYS - Event System....................................................................................................................... 114
14.1. Features................................................................................................................................... 114
14.2. Overview...................................................................................................................................114
14.3. Functional Description..............................................................................................................116
14.4. Register Summary....................................................................................................................118
14.5. Register Description................................................................................................................. 118
15. PORTMUX - Port Multiplexer.............................................................................................................. 125
15.1. Overview.................................................................................................................................. 125
15.2. Register Summary....................................................................................................................126
15.3. Register Description.................................................................................................................126
16. PORT - I/O Pin Configuration..............................................................................................................131
16.1. Features...................................................................................................................................131
16.2. Overview.................................................................................................................................. 131
16.3. Functional Description..............................................................................................................133
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16.4. Register Summary - PORTx.....................................................................................................136
16.5. Register Description - PORTx.................................................................................................. 136
16.6. Register Summary - VPORTx.................................................................................................. 148
16.7. Register Description - VPORTx................................................................................................148
17. BOD - Brown-out Detector.................................................................................................................. 153
17.1. Features...................................................................................................................................153
17.2. Overview.................................................................................................................................. 153
17.3. Functional Description..............................................................................................................154
17.4. Register Summary....................................................................................................................156
17.5. Register Description.................................................................................................................156
18. VREF - Voltage Reference..................................................................................................................163
18.1. Features...................................................................................................................................163
18.2. Overview.................................................................................................................................. 163
18.3. Functional Description..............................................................................................................163
18.4. Register Summary ...................................................................................................................164
18.5. Register Description.................................................................................................................164
19. WDT - Watchdog Timer.......................................................................................................................169
19.1. Features...................................................................................................................................169
19.2. Overview.................................................................................................................................. 169
19.3. Functional Description..............................................................................................................170
19.4. Register Summary - WDT........................................................................................................173
19.5. Register Description.................................................................................................................173
20. TCA - 16-bit Timer/Counter Type A.....................................................................................................176
20.1. Features...................................................................................................................................176
20.2. Overview.................................................................................................................................. 176
20.3. Functional Description..............................................................................................................179
20.4. Register Summary - Normal Mode...........................................................................................188
20.5. Register Description - Normal Mode........................................................................................ 188
20.6. Register Summary - Split Mode............................................................................................... 207
20.7. Register Description - Split Mode.............................................................................................207
21. TCB - 16-bit Timer/Counter Type B.....................................................................................................223
21.1. Features...................................................................................................................................223
21.2. Overview.................................................................................................................................. 223
21.3. Functional Description..............................................................................................................225
21.4. Register Summary....................................................................................................................233
21.5. Register Description.................................................................................................................233
22. TCD - 12-Bit Timer/Counter Type D.................................................................................................... 244
22.1. Features...................................................................................................................................244
22.2. Overview.................................................................................................................................. 244
22.3. Functional Description..............................................................................................................246
22.4. Register Summary....................................................................................................................269
22.5. Register Description.................................................................................................................269
23. RTC - Real-Time Counter................................................................................................................... 294
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23.1. Features...................................................................................................................................294
23.2. Overview.................................................................................................................................. 294
23.3. Clocks.......................................................................................................................................295
23.4. RTC Functional Description..................................................................................................... 295
23.5. PIT Functional Description.......................................................................................................296
23.6. Events...................................................................................................................................... 297
23.7. Interrupts..................................................................................................................................298
23.8. Sleep Mode Operation............................................................................................................. 299
23.9. Synchronization........................................................................................................................299
23.10. Debug Operation......................................................................................................................299
23.11. Register Summary....................................................................................................................300
23.12. Register Description.................................................................................................................300
24. USART - Universal Synchronous and Asynchronous Receiver and Transmitter................................316
24.1. Features...................................................................................................................................316
24.2. Overview.................................................................................................................................. 316
24.3. Functional Description..............................................................................................................317
24.4. Register Summary....................................................................................................................332
24.5. Register Description.................................................................................................................332
25. SPI - Serial Peripheral Interface..........................................................................................................348
25.1. Features...................................................................................................................................348
25.2. Overview.................................................................................................................................. 348
25.3. Functional Description..............................................................................................................349
25.4. Register Summary....................................................................................................................356
25.5. Register Description.................................................................................................................356
26. TWI - Two-Wire Interface.................................................................................................................... 363
26.1. Features...................................................................................................................................363
26.2. Overview.................................................................................................................................. 363
26.3. Functional Description..............................................................................................................364
26.4. Register Summary....................................................................................................................375
26.5. Register Description.................................................................................................................375
27. CRCSCAN - Cyclic Redundancy Check Memory Scan...................................................................... 392
27.1. Features...................................................................................................................................392
27.2. Overview.................................................................................................................................. 392
27.3. Functional Description..............................................................................................................393
27.4. Register Summary - CRCSCAN...............................................................................................396
27.5. Register Description.................................................................................................................396
28. CCL - Configurable Custom Logic...................................................................................................... 400
28.1. Features...................................................................................................................................400
28.2. Overview.................................................................................................................................. 400
28.3. Functional Description..............................................................................................................402
28.4. Register Summary....................................................................................................................410
28.5. Register Description.................................................................................................................410
29. AC - Analog Comparator.....................................................................................................................418
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29.1. Features...................................................................................................................................418
29.2. Overview.................................................................................................................................. 418
29.3. Functional Description..............................................................................................................420
29.4. Register Summary....................................................................................................................422
29.5. Register Description.................................................................................................................422
30. ADC - Analog-to-Digital Converter...................................................................................................... 427
30.1. Features...................................................................................................................................427
30.2. Overview.................................................................................................................................. 427
30.3. Functional Description..............................................................................................................430
30.4. Register Summary - ADCn.......................................................................................................437
30.5. Register Description.................................................................................................................437
31. DAC - Digital-to-Analog Converter...................................................................................................... 455
31.1. Features...................................................................................................................................455
31.2. Overview.................................................................................................................................. 455
31.3. Functional Description..............................................................................................................456
31.4. Register Summary....................................................................................................................458
31.5. Register Description.................................................................................................................458
32. PTC - Peripheral Touch Controller...................................................................................................... 461
32.1. Overview.................................................................................................................................. 461
32.2. Features...................................................................................................................................461
32.3. Block Diagram..........................................................................................................................462
32.4. Signal Description.................................................................................................................... 462
32.5. System Dependencies............................................................................................................. 463
32.6. Functional Description..............................................................................................................464
33. UPDI - Unified Program and Debug Interface.....................................................................................465
33.1. Features...................................................................................................................................465
33.2. Overview.................................................................................................................................. 465
33.3. Functional Description..............................................................................................................467
33.4. Register Summary....................................................................................................................488
33.5. Register Description.................................................................................................................488
34. Instruction Set Summary.....................................................................................................................499
35. Conventions........................................................................................................................................ 500
35.1. Numerical Notation...................................................................................................................500
35.2. Memory Size and Type.............................................................................................................500
35.3. Frequency and Time.................................................................................................................500
35.4. Registers and Bits....................................................................................................................501
35.5. ADC Parameter Definitions......................................................................................................502
36. Electrical Characteristics.....................................................................................................................505
36.1. Disclaimer.................................................................................................................................505
36.2. Absolute Maximum Ratings .....................................................................................................505
36.3. General Operating Ratings ......................................................................................................506
36.4. Power Consumption ................................................................................................................507
36.5. Wake-Up Time..........................................................................................................................509
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36.6. Peripherals Power Consumption..............................................................................................509
36.7. BOD and POR Characteristics.................................................................................................510
36.8. External Reset Characteristics................................................................................................. 511
36.9. Oscillators and Clocks..............................................................................................................511
36.10. I/O Pin Characteristics............................................................................................................. 513
36.11. TCD..........................................................................................................................................514
36.12. USART..................................................................................................................................... 514
36.13. SPI........................................................................................................................................... 515
36.14. TWI...........................................................................................................................................516
36.15. VREF........................................................................................................................................519
36.16. ADC..........................................................................................................................................520
36.17. TEMPSENSE........................................................................................................................... 522
36.18. DAC..........................................................................................................................................523
36.19. AC............................................................................................................................................ 524
36.20. PTC.......................................................................................................................................... 524
36.21. UPDI Timing.............................................................................................................................525
36.22. Programming Time...................................................................................................................526
37. Typical Characteristics........................................................................................................................ 528
37.1. Power Consumption.................................................................................................................528
37.2. GPIO........................................................................................................................................ 535
37.3. VREF Characteristics...............................................................................................................543
37.4. BOD Characteristics.................................................................................................................545
37.5. ADC Characteristics.................................................................................................................548
37.6. TEMPSENSE Characteristics.................................................................................................. 558
37.7. AC Characteristics....................................................................................................................558
37.8. OSC20M Characteristics..........................................................................................................562
37.9. OSCULP32K Characteristics................................................................................................... 564
37.10. TWI SDA Hold Timing ............................................................................................................. 565
38. Ordering Information........................................................................................................................... 566
38.1. Product Information..................................................................................................................566
38.2. Product Identification System...................................................................................................566
39. Package Drawings.............................................................................................................................. 567
39.1. Online Package Drawings........................................................................................................567
39.2. 14-Pin SOIC.............................................................................................................................568
39.3. 20-Pin SOIC.............................................................................................................................572
39.4. 20-Pin VQFN............................................................................................................................576
39.5. 24-Pin VQFN............................................................................................................................580
39.6. Thermal Considerations...........................................................................................................583
40. Errata.................................................................................................................................................. 584
40.1. Errata - ATtiny1614/1616/1617................................................................................................ 584
41. Data Sheet Revision History............................................................................................................... 585
41.1. Rev. A - 05/2020.......................................................................................................................585
41.2. Appendix - Obsolete Revision History......................................................................................590
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ATtiny1614/1616/1617
The Microchip Website...............................................................................................................................595
Product Change Notification Service..........................................................................................................595
Customer Support...................................................................................................................................... 595
Product Identification System.....................................................................................................................596
Microchip Devices Code Protection Feature.............................................................................................. 596
Legal Notice............................................................................................................................................... 596
Trademarks................................................................................................................................................ 596
Quality Management System..................................................................................................................... 597
Worldwide Sales and Service.....................................................................................................................598
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ATtiny1614/1616/1617
Silicon Errata and Data Sheet Clarification ...
1. Silicon Errata and Data Sheet Clarification Document
Microchip aims to provide its customers with the best documentation possible to ensure a successful use of
Microchip products. Between data sheet updates, a Silicon errata and data sheet clarification document will contain
the most recent information for the data sheet. The ATtiny1614/1616/1617 Silicon Errata and Data Sheet Clarification
(www.microchip.com/DS80000886) is available at the device product page on https://www.microchip.com.
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2. tinyAVR® 1-series Overview
8
Pins
20 24
14
8 KB
Flash
16 KB
32 KB
4 KB
2 KB
Devices described in this data sheet
Devices described in other data sheets
ATtiny3216 ATtiny3217
ATtiny1614 ATtiny1616
ATtiny1617
ATtiny412
ATtiny212
ATtiny414 ATtiny416
ATtiny417
ATtiny214
ATtiny814 ATtiny816
ATtiny817
The following figure shows the tinyAVR 1-series devices, laying out pin count variants and memory sizes:
• Vertical migration upwards is possible without code modification, as these devices are pin-compatible and
provide the same or more features. Downward migration may require code modification due to fewer available
instances of some peripherals.
• Horizontal migration to the left reduces the pin count and, therefore, the available features
Figure 2-1. tinyAVR® 1-series Overview
ATtiny1614/1616/1617
tinyAVR® 1-series Overview
Devices with different Flash memory sizes typically also have different SRAM and EEPROM.
2.1 Configuration Summary
2.1.1 Peripheral Summary
Table 2-1. Peripheral Summary
Pins 14 20 24
SRAM 2 KB 2 KB 2 KB
Flash 16 KB 16 KB 16 KB
EEPROM 256B 256B 256B
Max. frequency (MHz) 20 20 20
16-bit Timer/Counter type A (TCA) 1 1 1
16-bit Timer/Counter type B (TCB) 2 2 2
12-bit Timer/Counter type D (TCD) 1 1 1
ATtiny1614
ATtiny1616
ATtiny1617
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...........continued
ATtiny1614/1616/1617
tinyAVR® 1-series Overview
ATtiny1614
Real-Time Counter (RTC) 1 1 1
USART 1 1 1
SPI 1 1 1
TWI (I2C) 1 1 1
ADC 2 2 2
ADC channels 10+4 12+8 12+12
DAC 3 3 3
AC 3 3 3
AC inputs 2p/1n+
3p/1n+
2p/2n (4p/3n)
Peripheral Touch Controller (PTC)
PTC number of self-capacitance channels 6 12 14
PTC number of mutual capacitance channels 9 36 49
Configurable Custom Logic 1 1 1
Window Watchdog 1 1 1
Event System channels 6 6 6
(1)
1 1 1
ATtiny1616
3p/2n+
4p/1n+
3p/2n(6p/3n)
ATtiny1617
4p/2n+
4p/2n+
4p/2n(8p/3n)
General purpose I/O 12 18 22
External interrupts 12 18 22
CRCSCAN 1 1 1
Note:
1. The PTC takes control over the ADC0 while the PTC is used.
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3. Block Diagram
Figure 3-1. tinyAVR® 1-series Block Diagram
UPDI / RESET
To
detectors
UPDI
CRC
OCD
CPU
ATtiny1614/1616/1617
Block Diagram
Analog peripherals
analog peripherals
®
Digital peripherals
analog peripherals
Core components
analog peripherals
Clocks/generators
AINP[3:0]
AINN[1:0]
OUT
OUT
AIN[11:0]
X[13:0]
Y[13:0]
REFA
AIN[11:0]
LUTn-IN[2:0]
LUTn-OUT
WO[5:0]
WO
WO[A,B,C,D]
RXD
TXD
XCK
XDIR
MISO
MOSI
SCK
SDA
SCL
Flash
EEPROM
NVMCTRL
Detectors/
References
RST
BOD
OSC20M
OSC32K
XOSC32K
EXTCLK
POR
VLM
PA[7:0]
PB[7:0]
PC[5:0]
CLKOUT
TOSC1
TOSC2
EXTCLK
EVOUT[n:0]
SRAM
AC [2:0]
[2:0]
DAC
ADC0 / PTC
ADC1
CCL
TCA0
TCB[1:0]
M M
S
E
V
E
N
T
R
O
U
T
I
N
G
N
E
T
W
O
R
K
S
D
A
T
A
B
U
S
BUS Matrix
M
PORTS
GPIOR
CPUINT
System
Management
RSTCTRL
CLKCTRL
SLPCTRL
S
S
I
N
/
O
U
T
D
A
T
A
B
U
S
Bandgap
Clock Generation
WDT
TCD0
RTC
USART0
SS
SPI0
EVSYS
TWI0
Note: The block diagram represents the largest device of the tinyAVR 1-series, both in terms of pin count and Flash
size. See sections 2.1 Configuration Summary and 5.1 Multiplexed Signals for an overview of the features of the
specific devices in this data sheet.
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4. Pinout
4.1 14-Pin SOIC
ATtiny1614/1616/1617
Pinout
PA4
PA5
PA6
PA7
TOSC2/PB3
TOSC1/PB2
Ground
GPIO VDD power domain
1
2
3
4
5
14VDD GND
13
12
11
10
6
7 8
PA3/EXTCLK
PA2
PA1
PA0/RESET/UPDI
9
PB0
PB1
Programming, Debug, ResetInput supply
Clock, crystal
Digital function only
Analog function
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4.2 20-Pin SOIC
ATtiny1614/1616/1617
Pinout
TOSC1
TOSC2
V
DD
PA4
PA5
PA6
PA7
PB5
PB4
PB3
/
/PB2
PB1
Input supply
Ground
GPIO V
DD po
1
2
3
4
5
6
7
8
9
10
wer domain
20
19
18
17
16
15
14
13
12
11
Programming, Debug, Reset
Clock, crystal
Digital function only
Analog function
GND
PA3/EXTCLK
PA2
PA1
PA0/RESET/UPDI
PC3
PC2
PC1
PC0
PB0
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4.3 20-Pin VQFN
ATtiny1614/1616/1617
Pinout
UPDI
PA2 PC0
EXTCLK /PA3
GND
V
DD
PA4
Note: It is recommended to
solder the large center pad to
ground for mechanical stability
Ground
GPIO VDD power domain
PA0/RESET/
PA1
20
PC3
19
18
1
2
3
4
5
6
7
8
PC1
16
179
15
14
13
12
11
PB0
PB1
PB2/
PB3/
TOSC2
TOSC1
10
6
PB4
PA5
PA
PB5 PC2
PA7
Programming, Debug, ResetInput supply
Clock, crystal
Digital function only
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Analog function
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4.4 24-Pin VQFN
ATtiny1614/1616/1617
Pinout
PA2
EXTCLK /PA3
GND
V
DD
PA4
PA5
Note: It is recommended to
solder the large center pad to
ground for mechanical stability
Ground
PA1
PA0/RESET/UPDI
PC5
PC4
23
22
24
21
1
2
3
4
5
6
7
8
9
10
PB7
PA7
PA6
PB6
Programming, Debug, ResetInput supply
Clock, crystal
PC2
PC3
20
19
18
17
16
15
14
13
12
11
PB5
PB4
PC1
PC0
PB0
PB1
PB2/
PB3/
TOSC2
TOSC1
GPIO VDD power domain
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Digital function only
Analog function
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ATtiny1614/1616/1617
I/O Multiplexing and Considerations
5. I/O Multiplexing and Considerations
5.1 Multiplexed Signals
Table 5-1. PORT Function Multiplexing
(1,2)
Pin Name
SOIC 20-Pin
VQFN 24-Pin
23 19 16 10 PA0 RESET/ UPDI AIN0 LUT0-IN0
24 20 17 11 PA1 AIN1 TxD
1 1 18 12 PA2 EVOUT0 AIN2 RxD
2 2 19 13 PA3 EXTCLK AIN3 XCK
3 3 20 14 GND
4 4 1 1 V
5 5 2 2 PA4 AIN4 AIN0 X0/Y0 XDIR
6 6 3 3 PA5 VREFA AIN5 AIN1 X1/Y1 OUT AINN0 WO5 TCB0 WO WOB
7 7 4 4 PA6 AIN6 AIN2 X2/Y2 AINN0 AINP1 AINP0 OUT
8 8 5 5 PA7 AIN7 AIN3 X3/Y3 AINP0 AINP0 AINN0 LUT1-OUT
9 PB7 AIN4 AINN1 AINP3
10 PB6 AIN5 AINP3 AINN1
11 9 6 PB5 CLKOUT AIN8 X12/Y12 AINP1 AINP2 WO2
12 10 7 PB4 AIN9 X13/Y13 AINN1 AINP3 WO1
13 11 8 6 PB3 TOSC1 OUT RxD WO0
14 12 9 7 PB2 TOSC2, EVOUT1 OUT TxD WO2
15 13 10 8 PB1 AIN10 X4/Y4 AINP2 XCK SDA WO1
16 14 11 9 PB0 AIN11 X5/Y5 AINP2 AINP1 XDIR SCL WO0
17 15 12 PC0 AIN6 X6/Y6 SCK
18 16 13 PC1 AIN7 X7/Y7 MISO
19 17 14 PC2 EVOUT2 AIN8 X8/Y8 MOSI
20 18 15 PC3 AIN9 X9/Y9 SS
21 PC4 AIN10 X10/Y10 WO4
22 PC5 AIN11 X11/Y11 WO5
SOIC 14-Pin
VQFN 20-Pin
DD
Other/Special ADC0 ADC1 PTC
(4)
AC0 AC1 AC2 DAC0 USART0 SPI0 TWI0 TCA0 TCBn TCD0 CCL
(3)
MOSI SDA
(3)
MISO SCL
(3)
SCK WO3 TCB1 WO
(3)
SS WO4 WOA LUT0-OUT
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
WO3
(3)
(3)
TCB0 WO
TCB1 WO
(3)
(3)
LUT0-IN1
LUT0-IN2
LUT0-OUT
WOC
WOD LUT1-OUT
LUT1-IN0
LUT1-IN1
LUT1-IN2
(3)
(3)
Note:
1. Pin names are of type Pxn, with x being the PORT instance (A, B) and n the pin number. The notation for
signals is PORTx_PINn. All pins can be used as event input.
2. All pins can be used for external interrupt, where pins Px2 and Px6 of each port have full asynchronous
detection.
3. Alternate pin positions. For selecting the alternate positions, refer to section 15. PORTMUX - Port Multiplexer.
4. Every PTC line can be configured as X- or Y-line.
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6. Memories
6.1 Overview
The main memories are SRAM data memory, EEPROM data memory, and Flash program memory. Also, the
peripheral registers are located in the I/O memory space.
Table 6-1. Physical Properties of Flash Memory
Property
Size 16 KB
Page size 64B
Number of pages 256
Start address 0x8000
Table 6-2. Physical Properties of SRAM
Property
ATtiny1614/1616/1617
Memories
Size 2 KB
Start address 0x3800
Table 6-3. Physical Properties of EEPROM
Property
Size 256B
Page size 32B
Number of pages 8
Start address 0x1400
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6.2 Memory Map
(Reserved)
(Reserved)
NVM I/O Registers and Data
64 I/O Registers
960 Ext. I/O Registers
0x0000 – 0x003F
0x0040 – 0x0FFF
Internal SRAM
2 KB
EEPROM 256 bytes
0x8000 -
BOOTEND
0x1000 – 0x13FF
0x3800 –
0x3FFF
0x1400 – 0x14FF
0xBFFF
Application
Code
App. Data
APPEND
Flash
16 KB
(Reserved)
Boot
0xFFFF
Figure 6-1. Memory Map
ATtiny1614/1616/1617
Memories
6.3 In-System Reprogrammable Flash Program Memory
The ATtiny1614/1616/1617 contains 16 KB on-chip in-system reprogrammable Flash memory for program storage.
Since all AVR instructions are 16 or 32-bit wide, the Flash is organized as 4K x 16. For write protection, the Flash
program memory space can be divided into three sections (see the illustration below): Bootloader section, Application
code section, and Application data section, with restricted access rights among them.
The Program Counter (PC) is 13-bit wide to address the whole program memory. The procedure for writing Flash
memory is described in detail in the documentation of the Nonvolatile Memory Controller (NVMCTRL) peripheral.
The entire Flash memory is mapped in the memory space and is accessible with normal LD/ST instructions as well as
the LPM instruction. For LD/ST instructions, the Flash is mapped from address 0x8000. For the LPM instruction, the
Flash start address is 0x0000.
The ATtiny1614/1616/1617 also has a CRC peripheral that is a master on the bus.
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Figure 6-2. Flash and the Three Sections
FLASHSTART: 0x8000
BOOTEND>0: 0x8000+BOOTEND*256
BO O T
APPEND>0: 0x8000+APPEND*256
AP PL IC A T IO N
CO DE
AP PL IC A T IO N
DA TA
FLASH
FLASHEND
ATtiny1614/1616/1617
Memories
6.4 SRAM Data Memory
The 2 KB SRAM is used for data storage and stack.
6.5 EEPROM Data Memory
The ATtiny1614/1616/1617 has 256 bytes of EEPROM data memory, see section 6.2 Memory Map. The EEPROM
memory supports single-byte read and write. The EEPROM is controlled by the Nonvolatile Memory Controller
(NVMCTRL).
6.6 User Row
In addition to the EEPROM, the ATtiny1614/1616/1617 has one extra page of EEPROM memory that can be used for
firmware settings; the User Row (USERROW). This memory supports single-byte read and write as the normal
EEPROM. The CPU can write and read this memory as normal EEPROM, and the UPDI can write and read it as a
normal EEPROM memory if the part is unlocked. The User Row can be written by the UPDI when the part is locked.
USERROW is not affected by a chip erase.
6.7 Signature Bytes
All tinyAVR® microcontrollers have a 3-byte signature code that identifies the device. The three bytes reside in a
separate address space. For the device, the signature bytes are given in the following table.
Note: When the device is locked, only the System Information Block (SIB) can be accessed.
Table 6-4. Device ID
Device Name Signature Bytes Address
ATtiny1614 0x1E 0x94 0x22
ATtiny1616 0x1E 0x94 0x21
0x00 0x01 0x02
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...........continued
Device Name Signature Bytes Address
ATtiny1617 0x1E 0x94 0x20
6.8 I/O Memory
All ATtiny1614/1616/1617 I/Os and peripherals are located in the I/O memory space. The I/O address range from
0x00 to 0x3F can be accessed in a single cycle using IN and OUT instructions. The extended I/O memory space from
0x0040 to 0x0FFF can be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the
32 general purpose working registers and the I/O memory space.
I/O registers within the address range 0x00-0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
Instruction Set section for more details.
For compatibility with future devices, reserved bits must be written to ‘0’, if accessed. Reserved I/O memory
addresses must never be written.
Some of the interrupt flags are cleared by writing a ‘1’ to them. On ATtiny1614/1616/1617 devices, the CBI and SBI
instructions will only operate on the specified bit and can be used on registers containing such interrupt flags. The
CBI and SBI instructions work with registers 0x00-0x1F only.
ATtiny1614/1616/1617
Memories
0x00 0x01 0x02
General Purpose I/O Registers
The ATtiny1614/1616/1617 devices provide four general purpose I/O registers. These registers can be used for
storing any information, and they are particularly useful for storing global variables and interrupt flags. General
purpose I/O registers, which reside in the address range 0x1C-0x1F, are directly bit-accessible using the SBI, CBI,
SBIS, and SBIC instructions.
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ATtiny1614/1616/1617
Memories
6.8.1 Register Summary
Offset Name Bit Pos. 7 6 5 4 3 2 1 0
0x00 GPIOR0 7:0 GPIOR[7:0]
0x01 GPIOR1 7:0 GPIOR[7:0]
0x02 GPIOR2 7:0 GPIOR[7:0]
0x03 GPIOR3 7:0 GPIOR[7:0]
6.8.2 Register Description
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ATtiny1614/1616/1617
Memories
6.8.2.1 General Purpose I/O Register n
Name: GPIORn
Offset: 0x00 + n*0x01 [n=0..3]
Reset: 0x00
Property: -
These are general purpose registers that can be used to store data, such as global variables and flags, in the bitaccessible I/O memory space.
Bit 7 6 5 4 3 2 1 0
Access
Reset 0 0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W
Bits 7:0 – GPIOR[7:0] General Purpose I/O Register Byte
6.9 Memory Section Access from CPU and UPDI on Locked Device
The device can be locked so that the memories cannot be read using the UPDI. The locking protects both the Flash
(all Boot, Application Code, and Application Date sections), SRAM, and the EEPROM including the FUSE data. This
prevents successful reading of application data or code using the debugger interface. Regular memory access from
within the application is still enabled.
The device is locked by writing a non-valid key to the LOCKBIT bit field in FUSE.LOCKBIT.
Table 6-5. Memory Access Unlocked (FUSE.LOCKBIT Valid Key)
GPIOR[7:0]
(1)
Memory Section CPU Access UPDI Access
Read Write Read Write
SRAM Yes Yes Yes Yes
Registers Yes Yes Yes Yes
Flash Yes Yes Yes Yes
EEPROM Yes Yes Yes Yes
USERROW Yes Yes Yes Yes
SIGROW Yes No Yes No
Other fuses Yes No Yes Yes
Table 6-6. Memory Access Locked (FUSE.LOCKBIT Invalid Key)
(1)
Memory Section CPU Access UPDI Access
Read Write Read Write
SRAM Yes Yes No No
Registers Yes Yes No No
Flash Yes Yes No No
EEPROM Yes Yes No No
USERROW Yes Yes No Yes
(2)
SIGROW Yes No No No
Other fuses Yes No No No
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Note:
1. Read operations marked No in the tables may appear to be successful, but the data are not valid. Hence, any
attempt of code validation through the UPDI will fail on these memory sections.
2. In the Locked mode, the USERROW can be written using the Fuse Write command, but the current
USERROW values cannot be read out.
Important: The only way to unlock a device is through a CHIPERASE. No application data are retained.
6.10 Configuration and User Fuses (FUSE)
Fuses are part of the nonvolatile memory and hold the device configuration. The fuses are available from the device
power-up. The fuses can be read by the CPU or the UPDI, but can only be programmed or cleared by the UPDI. The
configuration values stored in the fuses are written to their respective target registers at the end of the start-up
sequence.
The fuses for peripheral configuration (FUSE) are pre-programmed but can be altered by the user. Altered values in
the configuration fuse will be effective only after a Reset.
Note: When writing the fuses, all reserved bits must be written to ‘1’.
ATtiny1614/1616/1617
Memories
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Complete Datasheet
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ATtiny1614/1616/1617
Memories
6.10.1 Signature Row Summary
Offset Name Bit Pos. 7 6 5 4 3 2 1 0
0x00 DEVICEID0 7:0 DEVICEID[7:0]
0x01 DEVICEID1 7:0 DEVICEID[7:0]
0x02 DEVICEID2 7:0 DEVICEID[7:0]
0x03 SERNUM0 7:0 SERNUM[7:0]
0x04 SERNUM1 7:0 SERNUM[7:0]
0x05 SERNUM2 7:0 SERNUM[7:0]
0x06 SERNUM3 7:0 SERNUM[7:0]
0x07 SERNUM4 7:0 SERNUM[7:0]
0x08 SERNUM5 7:0 SERNUM[7:0]
0x09 SERNUM6 7:0 SERNUM[7:0]
0x0A SERNUM7 7:0 SERNUM[7:0]
0x0B SERNUM8 7:0 SERNUM[7:0]
0x0C SERNUM9 7:0 SERNUM[7:0]
0x0D
...
0x1F
0x20 TEMPSENSE0 7:0 TEMPSENSE[7:0]
0x21 TEMPSENSE1 7:0 TEMPSENSE[7:0]
0x22 OSC16ERR3V 7:0 OSC16ERR3V[7:0]
0x23 OSC16ERR5V 7:0 OSC16ERR5V[7:0]
0x24 OSC20ERR3V 7:0 OSC20ERR3V[7:0]
0x25 OSC20ERR5V 7:0 OSC20ERR5V[7:0]
Reserved
6.10.2 Signature Row Description
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ATtiny1614/1616/1617
Memories
6.10.2.1 Device ID n
Name: DEVICEIDn
Offset: 0x00 + n*0x01 [n=0..2]
Reset: [Device ID]
Property: -
Each device has a device ID identifying this device and its properties such as memory sizes, pin count, and die
revision. This can be used to identify a device and hence, the available features by software. The Device ID consists
of three bytes: SIGROW.DEVICEID[2:0].
Bit 7 6 5 4 3 2 1 0
Access
Reset x x x x x x x x
R R R R R R R R
Bits 7:0 – DEVICEID[7:0] Byte n of the Device ID
DEVICEID[7:0]
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ATtiny1614/1616/1617
Memories
6.10.2.2 Serial Number Byte n
Name: SERNUMn
Offset: 0x03 + n*0x01 [n=0..9]
Reset: [device serial number]
Property: -
Each device has an individual serial number, representing a unique ID. This can be used to identify a specific device
in the field. The serial number consists of ten bytes: SIGROW.SERNUM[9:0].
Bit 7 6 5 4 3 2 1 0
Access
Reset x x x x x x x x
R R R R R R R R
Bits 7:0 – SERNUM[7:0] Serial Number Byte n
SERNUM[7:0]
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ATtiny1614/1616/1617
Memories
6.10.2.3 Temperature Sensor Calibration n
Name: TEMPSENSEn
Offset: 0x20 + n*0x01 [n=0..1]
Reset: [Temperature sensor calibration value]
Property: -
The Temperature Sensor Calibration registers contain correction factors for temperature measurements from the onchip sensor. The ADC.SIGROW.TEMPSENSE0 is a correction factor for the gain/slope (unsigned), and
SIGROW.TEMPSENSE1 is a correction factor for the offset (signed).
Bit 7 6 5 4 3 2 1 0
Access
Reset x x x x x x x x
R R R R R R R R
Bits 7:0 – TEMPSENSE[7:0] Temperature Sensor Calibration Byte n
Refer to the ADC section for a description of how to use this register.
TEMPSENSE[7:0]
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ATtiny1614/1616/1617
Memories
6.10.2.4 OSC16 Error at 3V
Name: OSC16ERR3V
Offset: 0x22
Reset: [Oscillator frequency error value]
Property: -
Bit 7 6 5 4 3 2 1 0
Access
Reset x x x x x x x x
R R R R R R R R
Bits 7:0 – OSC16ERR3V[7:0] OSC16 Error at 3V
These registers contain the signed oscillator frequency error value relative to the nominal oscillator frequency when
running at an internal 16 MHz at 3V, as measured during production.
OSC16ERR3V[7:0]
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