MICROCHIP TCM809, TCM810 Technical data
TCM809/TCM810
3-Pin Microc ontroller Reset Monitors
Features
• Precision VDD Monitor for 2.5V, 3.0V, 3.3V, 5.0V
Nominal System Voltage Supplies
• 140 msec Minimum RESET Time-Out Period
• RESET Output to VDD = 1.0V (TCM809)
• Low Supply Current, 9 µA (typ.)
•VDD Transient Immunity
• Small 3-Pin SC-70 and SOT-23B Packages
• No External Components
• Push-Pull RESET Output
• Temperature Ranges:
- Industrial: SC-70 (E): -40°C to +85°C
- Extended: SOT-23, SC-70 (V): -40°C to +125°C
Applications
• Computers
• Embedded Systems
• Battery-powered Equipment
• Critical Microcontroller Power Supply Monitoring
• Automotive
Typical Application Circuit
V
DD
3
V
DD
TCM809
RESET
GND
1
Microcontroller
2
V
DD
PICmicro
RESET
INPUT
(Active-Low)
GND
®
General Description
The TCM809 and TCM810 are cost-effective system
supervisor circuits designed to monitor V
systems; providin g a reset s ignal to th e host proc essor,
when necessary. No external components are
required.
The RESET output is typically driven active within
65 µsec of V
old. RESET is maintained active for a minimum of
140 msec after VDD rises above the reset threshold.
The TCM810 has an act ive-high RESET outp ut, while
the TCM809 has an active-low RESET output. The
output of the TCM809/TCM810 is valid down to
= 1V. Both devices are available in 3-Pin SC-70
V
DD
and SOT-23B packages.
The TCM809/TCM810 are optimized to reject fast
transient glitches on the V
of 9 µA (typ., V
for battery-powered applications.
falling through the reset voltage thresh-
DD
line. A low supply current
= 3.3V) make these devices suitable
DD
DD
in digital
DD
Pin Configurations
SOT-23B/SC-70
1
GND
V
3
DD
TCM810
TCM809 RESET
TCM810 (RESET)
Note: 3-Pin SOT -23B is equiv ale nt to
JEDEC TO-236.
2
TCM809/
© 2005 Microchip Technology Inc. DS21661D-page 1
TCM809/TCM810
1.0 ELECTRICAL CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
Absolute Maximum Ratings†
operational listings of this specification is not implied.
Exposure to maximum rating conditions fo r ext ended pe riods
Supply Voltage (VDD to GND) ........................................................6.0V
, RESET ...................................................-0.3V to (VDD +0.3V)
RESET
Input Current, V
Output Current, RESET
dV/dt (V
DD
Operating Temperature Range ...................................-40°C to +125°C
Power Dissipation (T
3-Pin SOT-23B (derate 4 mW/°C above +70°C) ....................320 mW
3-Pin SC-70 (derate 2.17 mW/°C above +70°C)....................174 mW
Storage Temperature Range.......................................-65°C to +150°C
Maximum Junction Temperature, T
.......................................................................20 mA
DD
, RESET.................................................20 mA
)...........................................................................100V/µsec
= 70°C):
A
............................................150°C
J
may affect device reliability.
ELECTRICAL CHARACTERISTICS
VDD = Full Range, TA = Operating Temperature Range, unless otherwise noted. Typical values are at TA = +25°C,
= 5V for L/M/J, 3.3V for T/S, 3.0V for R and 2.5V for Z (Note 1).
V
DD
Parameter Sym Min Typ Max Units Test Conditions
V
Range 1.0 — 5.5 V TA = 0°C to +70°C
DD
1.2 — 5.5 T
Supply Current I
CC
—1230µATCM8xxL/M/J: VDD < 5.5V
—925 TCM8xxR/S/T/Z: V
Reset Threshold (Note 2) V
TH
4.56 4.63 4.70 V TCM8xxL: TA = +25°C
4.50 — 4.75 T
4.31 4.38 4.45 V TCM8xxM: T
4.25 — 4.50 V T
3.93 4.00 4.06 V TCM809J: T
3.89 — 4.10 V T
3.04 3.08 3.11 V TCM8xxT: T
3.00 — 3.15 V T
2.89 2.93 2.96 V TCM8xxS: T
2.85 — 3.00 V T
2.59 2.63 2.66 V TCM8xxR: T
2.55 — 2.70 V T
2.28 2.32 2.35 V TCM8xxZ: T
2.25 — 2.38 V T
Reset Threshold T empco — 30 — ppm/°C
to Reset Delay, — 65 — µsec VDD = VTH to (VTH – 100 mV) (Note 2)
V
DD
Reset Active Time Out
140 320 560 msec
Period
RESET
Output Voltage
Low (TCM809)
V
OL
——0.3VTCM809R/S/T/Z: VDD = VTH min, I
——0.4 TCM809L/M/J: V
——0.3 V
RESET
Output Voltage
High (TCM809)
RESET Output Voltage
Low (TCM810)
RESET Output Voltage
High (TCM810)
Note 1: Production testing done at T
2: RESET
output for TCM809, RESET output for TCM810.
V
0.8 V
OH
V
OL
DD
– 1.5 — — TCM809L/M/J: VDD > VTH max, I
V
DD
——0.3VTCM810R/S/T/Z:VDD = VTH max, I
——VTCM809R/S/T/Z: VDD > VTH max, I
——0.4 TCM810L/M: V
0.8 V
V
OH
DD
= +25°C, overtemperature limits ensured by QC screen.
A
——V1.8 < V
= – 40°C to +125°C
A
> 1.0V, I
DD
DD
= 50 µA
SINK
DD
< VTH min, I
< 3.6V
DD
= – 40°C to +125°C
A
= +25°C
A
= – 40°C to +125°C
A
= +25°C
A
= – 40°C to +125°C
A
= +25°C
A
= – 40°C to +125°C
A
= +25°C
A
= – 40°C to +125°C
A
= +25°C
A
= – 40°C to +125°C
A
= +25°C
A
= – 40°C to +125°C
A
= VTH min, I
DD
= VTH max, I
= 150 µA
SOURCE
SINK
SINK
SOURCE
SOURCE
SINK
= 3.2 mA
SINK
= 1.2 mA
= 3.2 mA
= 500 µA
= 800 µA
= 1.2 mA
DS21661D-page 2 © 2005 Microchip Technology Inc.
TCM809/TCM810
Supply Current ( µA)
2.0 TYPICAL PERFORMANCE CHARACTERISTICS
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
18
TCM8xx/R/S/T/ Z, N o Lo ad
16
14
12
10
8
6
4
2
0
-40 -20 0 20 40 60 80 100 120
Temperature ( ° C)
VDD = 5V
VDD = 3V
VDD = 1V
450
400
350
300
250
200
150
100
Power-up Reset Timeout (µsec)
50
0
-40 -20 0 20 40 60 80 100 120
Temperature ( °C )
FIGURE 2-1: Supply Current vs. Temperature.
16
TCM8xx/L/M/J, No Load
14
12
10
8
6
Supply Current ( µA)
4
2
0
-40-20 0 20406080100120
Temperature ( °C )
VDD = 5V
VDD = 3V
FIGURE 2-2: Supply Current vs. Temperature.
VDD = 1V
FIGURE 2-3: Power-up Reset Time Out vs. Temper atu re.
1.001
1
0.999
0.998
Normalized Reset Threshold
0.997
-40-200 20406080100120
Temperature (°C)
FIGURE 2-4: Normalized Reset Threshold vs. Temperature.
© 2005 Microchip Technology Inc. DS21661D-page 3
TCM809/TCM810
3.0 PIN DESCRIPTIONS
The descriptions of the pins are given in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
NAME FUNCTION
GND Ground
RESET (TCM809) RESET push-pull output
RESET (TCM810) RESET push-pull output
V
DD
3.1 Ground (GND)
Ground terminal.
3.2 RESET Output (TCM809)
The RESET push-pull output remains low while VDD is
below the res et voltage threshold, and for 240 msec
(140 msec min.) after VDD rises above reset thres hol d.
Supply voltage (+2.5V, +3.0V,
+3.3V, +5.0V).
3.3 RESET Output (TCM810)
The RESET push-pull output remains high while VDD is
below the reset voltage threshold, and for 240 msec
(140 msec min.) after VDD rises above reset thres hol d.
3.4 Supply Voltage (VDD)
VDD: +2.5V, +3.0V, +3.3V and +5.0V
DS21661D-page 4 © 2005 Microchip Technology Inc.
TCM809/TCM810
4.0 APPLICATIONS INFORMATION
4.1 VDD Transient Rejection
The TCM809/TCM8 10 prov ides accurate V
ing and reset timing during powe r-up, power-d own an d
brown-out/sag conditions. These devices also reject
negative-going transients (glitches) on the power
supply line. Figure 4-1 shows the maximum transient
duration vs. maximum negative excursion (overdrive)
for glitch rejection. Any combination of duration and
overdrive that lies under the curve will not generate a
reset signal.
V
DD
V
TH
Overdrive
Duration
400
TA = +25°C
320
240
monitor-
DD
Combinations above the curve are detected as a
brown-out or power-down condition. Transient
immunity can be improved by adding a capacitor in
close proximity to the V
pin of the TCM809/TCM810.
DD
4.2 RESET Signal Integrity During Power-Down
The TCM809 RESET output is valid to VDD = 1.0V.
Below this voltage the output becomes an "open circuit" and does not sink current. This means CMOS
logic inputs to the microcontroller will be floating at an
undetermined voltage. Most digital systems are
completely shut down well above this voltage.
However, in situations where RESET
tained valid to V
connected from RESET
= 0V, a pull-down resistor must be
DD
to ground to discharge stray
capacitance s and hold the out put low (Figure4-2). This
resistor value, though not critical, should be chosen
such that it does not appreciably load RESET
normal operation (100 kΩ will be suitable for most
applications). Similarly, a pull-up resistor to VDD is
required for the TCM810 to ensure a valid high RESET
for VDD below 1.0V.
V
DD
must be main-
under
160
80
TCM8XXZ/R/S/T
(SOT-23)
0
Maximum Transient Duration (µsec)
1
Reset Comparator Overdrive
130
120
110
100
90
80
70
60
to Reset Delay (µsec)
50
DD
40
V
30
1 10 100 1000
Reset Comparator Overdrive (mV)
TCM8XXL/M/J (SOT-23)
5
[V
TH
[VTH – VDD] (mv)
100
– VDD] (mv)
TCM8XXL/M/J (SC-70)
TCM8XXZ/R/S/T (SC-70)
1000
FIGURE 4-1: Maximum Transient Duration vs. Overdrive for Glitch Rejection at +25°C.
V
DD
TCM809
RESET
R
1
GND
100 kΩ
FIGURE 4-2: The addition of R1 at the
RESET
RESET
output of the TCM809 ensures that the
output is valid to V
DD
= 0V.
© 2005 Microchip Technology Inc. DS21661D-page 5
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