The TC9400/9401/9402 are low-cost Voltage-to-Frequency (V/F) converters, utilizing low-power CMOS
technology. The converters accept a variable analog
input signal and generate an output pulse train, whose
frequency is linearly proportional to the input voltage.
The devices can also be used as highly accurate
Frequency-to-Voltage (F/V) converters, accepting
virtually any input frequency waveform and providing a
linearly proportional voltage output.
A complete V/F or F/V system only requires the
addition of two capacitors, three resistors, and reference voltage.
† Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:PIN FUNCTION TABLE
Pin No.SymbolDescription
1I
2 ZERO ADJLow frequency adjustment input.
3I
4V
5V
6GNDAnalog ground.
7V
8PULSE FREQ
9OUTPUT
10FREQ/2 OUTThis open drain output is a square wave at one-half the frequency of the pulse output
11THRESHOLD
12AMPLIFIER OUT Output of the integrator amplifier.
13NCNo internal connection.
14V
BIAS
IN
SS
OUTReference capacitor connection.
REF
REF
OUT
COMMON
DETECTOR
DD
This pin sets bias current in the TC9400. Connect to VSS through a 100 kΩ resistor.
Input current connection for the V/F converter.
Negative power supply voltage connection, typically -5V.
Voltage reference input, typically -5V.
Frequency output. This open drain output will pulse LOW each time the Freq.
Threshold Detector limit is reached. The pulse rate is proportional to input voltage.
Source connection for the open drain output FETs.
(Pin 8). Output transitions of this pin occur on the rising edge of Pin 8.
Input to the Threshold Detector. This pin is the frequency input during F/V operation.
Positive power supply connection, typically +5V.
2.1Bias Current (I
BIAS
)
An external resistor, connected to VSS, sets the bias
point for the TC9400. Specifications for the TC9400 are
based on R
= 100 kΩ ±10%, unless otherwise
BIAS
noted.
Increasing the maximum frequency of the TC9400
beyond 100 kHz is limited by the pulse width of the
pulse output (typically 3 µs). Reducing R
BIAS
will
decrease the pulse width and increase the maximum
operating frequency, but linearity errors will also
increase. R
can be reduced to 20 kΩ, which will
BIAS
typically produce a maximum full scale frequency of
500 kHz.
2.2Zero Adjust
This pin is the non-inverting input of the operational
amplifier. The low frequency set point is determined by
adjusting the voltage at this pin.
2.3Input Current (IIN)
The inverting input of the operational amplifier and the
summing junction when connected in the V/F mode. An
input current of 10 μA is specified, but an over range
current up to 50 μA can be used without detrimental
effect to the circuit operation. I
junction of an operational amplifier. Voltage sources
cannot be attached directly, but must be buffered by
external resistors.
connects the summing
IN
2.4Voltage Capacitor (V
The charging current for C
is supplied through this
REF
REF
Out)
pin. When the op amp output reaches the threshold
level, this pin is internally connected to the reference
x C
voltage and a charge, equal to V
REF
, is removed
REF
from the integrator capacitor. After about 3μsec, this pin
is internally connected to the summing junction of the
op amp to discharge C
. Break-before-make switch-
REF
ing ensures that the reference voltage is not directly
applied to the summing junction.
2.5Voltage Reference (V
REF
)
A reference voltage from either a precision source, or
the V
supply is applied to this pin. Accuracy of the
SS
TC9400 is dependent on the voltage regulation and
temperature characteristics of the reference circuitry.
Since the TC9400 is a charge balancing V/F converter,
the reference current will be equal to the input current.
For this reason, the DC impedance of the reference
voltage source must be kept low enough to prevent
linearity errors. For linearity of 0.01%, a reference
impedance of 200Ω or less is recommended. A 0.1 µF
bypass capacitor should be connected from V
, set VIN = 10 mV and adjust the 50 kΩ offset for 10 Hz output.
2: To adjust F
MAX
, set VIN = 10V and adjust RIN or V
REF
for 10 kHz output.
3: To increase F
OUTMAX
to 100 kHz, change C
REF
to 2 pF and C
INT
to 75 pF.
4: For high performance applications, use high stability components for R
IN
, C
REF
. V
REF
(metal film
resistors and glass capacitors). Also, separate output ground (Pin 9) from input ground (Pin 6).
2.6Pulse Freq Out
This output is an open-drain N-channel FET, which
provides a pulse waveform whose frequency is proportional to the input voltage. This output requires a pullup resistor and interfaces directly with MOS, CMOS,
and TTL logic (see Figure 2-1).
2.7Output Common
The sources of both the FREQ/2 OUT and the PULSE
FREQ OUT are connected to this pin. An output level
swing from the drain voltage to ground, or to the V
SS
supply, may be obtained by connecting this pin to the
appropriate point.
2.8Freq/2 Out
This output is an open-drain N-channel FET, which
provides a square-wave one-half the frequency of the
pulse frequency output. The FREQ/2 OUT output will
change state on the rising edge of PULSE FREQ OUT.
This output requires a pull-up resistor and interfaces
directly with MOS, CMOS, and TTL logic.
2.9Threshold Detector Input
In the V/F mode, this input is connected to the AMPLIFIER OUT output (Pin 12) and triggers a 3 µs pulse
when the input voltage passes through its threshold. In
the F/V mode, the input frequency is applied to this
input.
The nominal threshold of the detector is half way
between the power supplies, or (V
+ VSS)/2 ±400
DD
mV. The TC9400’s charge balancing V/F technique is
not dependent on a precision comparator threshold,
because the threshold only sets the lower limit of the op
amp output. The op amp’s peak-to-peak output swing,
which determines the frequency, is only influenced by
external capacitors and by V
REF
.
2.10Amplifier Out
This pin is the output stage of the operational amplifier.
During V/F operation, a negative going ramp signal is
available at this pin. In the F/V mode, a voltage
proportional to the frequency input is generated.
The TC9400 V/F converter operates on the principal of
charge balancing. The operation of the TC9400 is
easily understood by referring to Figure 3-1. The input
voltage (V
resistor. This current is then converted to a charge on
the integrating capacitor and shows up as a linearly
decreasing voltage at the output of the op amp. The
lower limit of the output swing is set by the threshold
detector, which causes the reference voltage to be
applied to the reference capacitor for a time period long
enough to charge the capacitor to the reference voltage. This action reduces the charge on the integrating
capacitor by a fixed amount (q = C
the op amp output to step up a finite amount.
At the end of the charging period, C
This dissipates the charge stored on the reference
capacitor, so that when the output again crosses zero,
the system is ready to recycle. In this manner, the continued discharging of the integrating capacitor by the
input is balanced out by fixed charges from the refer-
) is converted to a current (IIN) by the input
IN
x V
REF
REF
), causing
REF
is shorted out.
ence voltage. As the input voltage is increased, the
number of reference pulses required to maintain
balance increases, which causes the output frequency
to also increase. Since each charge increment is fixed,
the increase in frequency with voltage is linear. In
addition, the accuracy of the output pulse width does
not directly affect the linearity of the V/F. The pulse
must simply be long enough for full charge transfer to
take place.
The TC9400 contains a “self-start” circuit to ensure the
V/F converter always operates properly when power is
first applied. In the event that, during power-on, the op
amp output is below the threshold and C
is already
REF
charged, a positive voltage step will not occur. The op
amp output will continue to decrease until it crosses the
-3.0V threshold of the “self-start” comparator. When
this happens, an internal resistor is connected to the op
amp input, which forces the output to go positive until
the TC9400 is in its normal Operating mode.
The TC9400 utilizes low-power CMOS processing for
low input bias and offset currents, with very low power
dissipation. The open drain N-channel output FETs
provide high voltage and high current sink capability.
The TC9400 output can be measured in the time
domain as well as the frequency domain. Some microcomputers, for example, have extensive timing capability, but limited counter capability. Also, the response
time of a time domain measurement is only the period
between two output pulses, while the frequency
measurement must accumulate pulses during the
entire counter time-base period.
Time measurements can be made from either the
TC9400’s PULSE FREQ OUT output, or from the
FREQ/2 OUT output. The FREQ/2 OUT output
changes state on the rising edge of PULSE FREQ
OUT, so FREQ/2 OUT is a symmetrical square wave at
one-half the pulse output frequency. Timing measurements can, therefore, be made between successive
PULSE FREQ OUT pulses, or while FREQ/2 OUT is
high (or low).