MICROCHIP TC9400, TC9401, TC9402 Technical data

TC9400/9401/9402
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
NC
AMPLIFIER OUT
THRESHOLD DETECTOR
FREQ/2 OUT
OUTPUT COMMON
PULSE FREQ OUT
I
BIAS
ZERO ADJ
I
IN
V
SS
V
REF
OUT
GND
V
REF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
TC9400 TC9401 TC9402
14-Pin Plastic DIP/CERDIP
14-Pin SOIC
TC9400 TC9401 TC9402
NC = No Internal Connection
V
DD
NC
AMPLIFIER OUT
THRESHOLD DETECTOR
FREQ/2 OUT
OUTPUT COMMON
PULSE FREQ OUT
I
BIAS
ZERO ADJ
I
IN
V
SS
V
REF
OUT
GND
V
REF
Voltage-to-Frequency / Frequency-to-Voltage Converters
Features:
VOLTAGE-TO-FREQUENCY
• Choice of Linearity:
- TC9401: 0.01%
- TC9400: 0.05%
- TC9402: 0.25%
• DC to 100 kHz (F/V) or 1 Hz to 100 kHz (V/F)
• Low Power Dissipation: 27 mW (Typ.)
- +8V to +15V or ±4V to ±7.5V
• Gain Temperature Stability: ±25 ppm/°C (Typ.)
• Programmable Scale Factor
FREQUENCY-TO-VOLTAGE
• Operation: DC to 100 kHz
• Choice of Linearity:
- TC9401: 0.02%
- TC9400: 0.05%
- TC9402: 0.25%
• Programmable Scale Factor
Applications:
• Microprocessor Data Acquisition
• 13-bit Analog-to-Digital Converters (ADC)
• Analog Data Transmission and Recording
• Phase Locked Loops
• Frequency Meters/Tachometer
• Motor Control
• FM Demodulation
General Description:
The TC9400/9401/9402 are low-cost Voltage-to-Fre­quency (V/F) converters, utilizing low-power CMOS technology. The converters accept a variable analog input signal and generate an output pulse train, whose frequency is linearly proportional to the input voltage.
The devices can also be used as highly accurate Frequency-to-Voltage (F/V) converters, accepting virtually any input frequency waveform and providing a linearly proportional voltage output.
A complete V/F or F/V system only requires the addition of two capacitors, three resistors, and refer­ence voltage.
Package Type
© 2007 Microchip Technology Inc. DS21483D-page 1
TC9400/9401/9402
I
IN
I
REF
TC9400
R
IN
Integrator Op Amp
Integrator Capacitor
Threshold Detector
One Shot
Pulse Output
Pulse/2 Output
÷2
Input
Voltage
Reference Capacitor
Reference Voltage
Functional Block Diagram
DS21483D-page 2 © 2007 Microchip Technology Inc.
TC9400/9401/9402

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †
VDD – VSS ......................................................................+18V
..................................................................................10 mA
I
IN
– V
V
OUTMAX
– VSS .....................................................................-1.5V
V
REF
Storage Temperature Range .........................-65°C to +150°C
Operating Temperature Range:
C Device ...................................................... 0°C to +70°C
E Device.................................................... -40°C to +85°C
Package Dissipation (T
8-Pin CerDIP........................................................800 mW
8-Pin Plastic DIP ..................................................730 mW
8-Pin SOIC...........................................................470 mW
Common.................................................23V
OUT
70°C):
A
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
TC940X ELECTRICAL SPECIFICATIONS
Electrical Characteristics: unless otherwise specified, VDD = +5V, VSS = -5V, V
10 kHz. T
= +25°C, unless temperature range is specified (-40°C to +85°C for E device, 0°C to +70°C for C device).
A
Parameter Min Typ Max Min Typ Max Min Typ Max Units Test Conditions
Voltage-to-Frequency
GND
= 0V, V
REF
= -5V, R
= 100 kΩ, Full Scale =
BIAS
Accuracy TC9400 TC9401 TC9402
Linearity 10 kHz 0.01 0.05 0.004 0.01 0.05 0.25 %
Linearity 100 kHz 0.1 0.25 0.04 0.08 0.25 0.5 %
Gain Temperature Drift (Note 1)
Gain Variance ±10 ±10 ±10 % of
Zero Offset
(Note 2)
Zero Temperature Drift (Note 1)
Note 1: Full temperature range; not tested.
2: I
= 0.
IN
3: Full temperature range, I 4: I
OUT
5: Threshold Detect = 5V, Amp Out = 0V, full temperature range. 6: 10 Hz to 100 kHz; not tested. 7: 5 µs minimum positive pulse width and 0.5 µs minimum negative pulse width. 8: t
= tF = 20 ns.
R
9: R
2kΩ, tested @ 10 kΩ.
L
10: Full temperature range, V
±25 ±40 ±25 ±40 ±50 ± 100 ppm/°C
±10 ±50 ±10 ±50 ±20 ±100 mV Correction at Zero
±25 ±50 ±25 ±50 ±50 ±100 µV/°C Variation in Zero Offset
= 10 mA.
= 10 µA.
OUT
= -0.1V.
IN
Full Scale
Full Scale
Full Scale
Nominal
Output Deviation from Straight Line Between Normalized Zero and Full Scale Input
Output Deviation from Straight Line Between Normalized Zero Read­ing and Full Scale Input
Variation in Gain A due to Temperature Change
Variation from Ideal Accuracy
Adjust for Zero Output when Input is Zero
Due to Temperature Change
© 2007 Microchip Technology Inc. DS21483D-page 3
TC9400/9401/9402
TC940X ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: unless otherwise specified, VDD = +5V, VSS = -5V, V
10 kHz. T
= +25°C, unless temperature range is specified (-40°C to +85°C for E device, 0°C to +70°C for C device).
A
Parameter Min Typ Max Min Typ Max Min Typ Max Units Test Conditions
Analog Input
I
Full Scale 10 10 10 µA Full Scale Analog Input
IN
I
Over Range 50 50 50 µA Over Range Current
IN
Response Time 2 2 2 Cycle Settling Time to 0.1%
Digital Section TC9400 TC9401 TC9402
@ IOL = 10mA 0.2 0.4 0.2 0.4 0.2 0.4 V Logic “0” Output
V
SAT
V
– V
OUTMAX
Common (Note 4)
OUT
Pulse Frequency
18 18 18 V Voltage Range Between
—3——3——3 — µs
Output Width
Frequency-to-Voltage
Supply Current
I
Quiescent
DD
(Note 5)
I
Quiescent
SS
(Note 5)
V
Supply 4 7.5 4 7.5 4 7.5 V Operating Range of
DD
Supply -4 -7.5 -4 -7.5 -4 -7.5 V Operating Range of
V
SS
Reference Voltage
V
– V
REF
SS
Accuracy
Non-Linearity
(Note 10)
Input Frequency Range
(Notes 7 and 8)
Note 1: Full temperature range; not tested.
2: I
= 0.
IN
3: Full temperature range, I 4: I
OUT
5: Threshold Detect = 5V, Amp Out = 0V, full temperature range. 6: 10 Hz to 100 kHz; not tested. 7: 5 µs minimum positive pulse width and 0.5 µs minimum negative pulse width. 8: t
= tF = 20 ns.
R
9: R
2kΩ, tested @ 10 kΩ.
L
10: Full temperature range, V
1.5 6 1.5 6 3 10 mA Current Required from
-1.5 -6 -1.5 -6 -3 -10 mA Current Required from
-2.5 -2.5 -2.5 V Range of Voltage
0.02 0.05 0.01 0.02 0.05 0.25 %
10 100k 10 100k 10 100k Hz Frequency Range for
= 10 mA.
= 10 µA.
OUT
= -0.1V.
IN
GND
= 0V, V
= -5V, R
REF
Full Scale
= 100 kΩ, Full Scale =
BIAS
Current to achieve Specified Accuracy
Full Scale
Voltage (Note 3)
Output and Common
Positive Supply during Operation
Negative Supply during Operation
Positive Supply
Negative Supply
Reference Input
Deviation from ideal Transfer Function as a Percentage Full Scale Voltage
Specified Non-Linearity
DS21483D-page 4 © 2007 Microchip Technology Inc.
TC9400/9401/9402
TC940X ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: unless otherwise specified, VDD = +5V, VSS = -5V, V
10 kHz. T
= +25°C, unless temperature range is specified (-40°C to +85°C for E device, 0°C to +70°C for C device).
A
Parameter Min Typ Max Min Typ Max Min Typ Max Units Test Conditions
Frequency Input
Positive Excursion 0.4 V
0.4 V
DD
0.4 V
DD
Negative Excursion -0.4 -2 -0.4 -2 -0.4 -2 V Voltage Required to
Minimum Positive
—5——5——5 — μs Time between
Pulse Width
(Note 8)
Minimum Negative
0.5 0.5 0.5 μs Time Between
Pulse Width
(Note 8)
Input Impedance 10 10 10 MΩ
Analog Outputs TC9400 TC9401 TC9402
Output Voltage
(Note 9)
—V
DD
– 1 V
– 1 V
DD
Output Loading 2 2 2 kΩ Resistive Loading at
Supply Current TC9400 TC9401 TC9402
I
Quiescent
DD
(Note 10)
I
Quiescent
SS
(Note 10)
V
Supply 4 7.5 4 7.5 4 7.5 V Operating Range of
DD
Supply -4 -7.5 -4 -7.5 -4 -7.5 V Operating Range of
V
SS
1.5 6 1.5 6 3 10 mA Current Required from
-1.5 -6 -1.5 -6 -3 -10 mA Current Required from
Reference Voltage
V
REF
– V
SS
-2.5 -2.5 -2.5 V Range of Voltage
Note 1: Full temperature range; not tested.
2: I
= 0.
IN
3: Full temperature range, I 4: I
= 10 µA.
OUT
OUT
= 10 mA.
5: Threshold Detect = 5V, Amp Out = 0V, full temperature range. 6: 10 Hz to 100 kHz; not tested. 7: 5 µs minimum positive pulse width and 0.5 µs minimum negative pulse width. 8: t
= tF = 20 ns.
R
9: R
2kΩ, tested @ 10 kΩ.
L
10: Full temperature range, V
= -0.1V.
IN
GND
= 0V, V
DD
REF
= -5V, R
= 100 kΩ, Full Scale =
BIAS
V Voltage Required to
Turn Threshold Detector On
Turn Threshold Detector Off
Threshold Crossings
Threshold Crossings
– 1 V Voltage Range of Op
DD
Amp Output for Specified Non-Linearity
Output of Op Amp
Positive Supply During Operation
Negative Supply During Operation
Positive Supply
Negative Supply
Reference Input
© 2007 Microchip Technology Inc. DS21483D-page 5
TC9400/9401/9402

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin No. Symbol Description
1I
2 ZERO ADJ Low frequency adjustment input.
3I
4V
5V
6 GND Analog ground.
7V
8 PULSE FREQ
9OUTPUT
10 FREQ/2 OUT This open drain output is a square wave at one-half the frequency of the pulse output
11 THRESHOLD
12 AMPLIFIER OUT Output of the integrator amplifier.
13 NC No internal connection.
14 V
BIAS
IN
SS
OUT Reference capacitor connection.
REF
REF
OUT
COMMON
DETECTOR
DD
This pin sets bias current in the TC9400. Connect to VSS through a 100 kΩ resistor.
Input current connection for the V/F converter.
Negative power supply voltage connection, typically -5V.
Voltage reference input, typically -5V.
Frequency output. This open drain output will pulse LOW each time the Freq. Threshold Detector limit is reached. The pulse rate is proportional to input voltage.
Source connection for the open drain output FETs.
(Pin 8). Output transitions of this pin occur on the rising edge of Pin 8.
Input to the Threshold Detector. This pin is the frequency input during F/V operation.
Positive power supply connection, typically +5V.
2.1 Bias Current (I
BIAS
)
An external resistor, connected to VSS, sets the bias point for the TC9400. Specifications for the TC9400 are based on R
= 100 kΩ ±10%, unless otherwise
BIAS
noted.
Increasing the maximum frequency of the TC9400 beyond 100 kHz is limited by the pulse width of the pulse output (typically 3 µs). Reducing R
BIAS
will decrease the pulse width and increase the maximum operating frequency, but linearity errors will also increase. R
can be reduced to 20 kΩ, which will
BIAS
typically produce a maximum full scale frequency of 500 kHz.
2.2 Zero Adjust
This pin is the non-inverting input of the operational amplifier. The low frequency set point is determined by adjusting the voltage at this pin.
2.3 Input Current (IIN)
The inverting input of the operational amplifier and the summing junction when connected in the V/F mode. An input current of 10 μA is specified, but an over range current up to 50 μA can be used without detrimental effect to the circuit operation. I junction of an operational amplifier. Voltage sources cannot be attached directly, but must be buffered by external resistors.
connects the summing
IN
2.4 Voltage Capacitor (V
The charging current for C
is supplied through this
REF
REF
Out)
pin. When the op amp output reaches the threshold level, this pin is internally connected to the reference
x C
voltage and a charge, equal to V
REF
, is removed
REF
from the integrator capacitor. After about 3μsec, this pin is internally connected to the summing junction of the op amp to discharge C
. Break-before-make switch-
REF
ing ensures that the reference voltage is not directly applied to the summing junction.
2.5 Voltage Reference (V
REF
)
A reference voltage from either a precision source, or the V
supply is applied to this pin. Accuracy of the
SS
TC9400 is dependent on the voltage regulation and temperature characteristics of the reference circuitry.
Since the TC9400 is a charge balancing V/F converter, the reference current will be equal to the input current. For this reason, the DC impedance of the reference voltage source must be kept low enough to prevent linearity errors. For linearity of 0.01%, a reference impedance of 200Ω or less is recommended. A 0.1 µF bypass capacitor should be connected from V
REF
ground.
to
DS21483D-page 6 © 2007 Microchip Technology Inc.
TC9400/9401/9402
3ms Typ.
1/f
F
OUT
F
OUT
/2
Amp Out
V
REF
0V
C
REF
C
INT
Note 1: To adjust F
MIN
, set VIN = 10 mV and adjust the 50 kΩ offset for 10 Hz output.
2: To adjust F
MAX
, set VIN = 10V and adjust RIN or V
REF
for 10 kHz output.
3: To increase F
OUTMAX
to 100 kHz, change C
REF
to 2 pF and C
INT
to 75 pF.
4: For high performance applications, use high stability components for R
IN
, C
REF
. V
REF
(metal film
resistors and glass capacitors). Also, separate output ground (Pin 9) from input ground (Pin 6).
2.6 Pulse Freq Out
This output is an open-drain N-channel FET, which provides a pulse waveform whose frequency is propor­tional to the input voltage. This output requires a pull­up resistor and interfaces directly with MOS, CMOS, and TTL logic (see Figure 2-1).
2.7 Output Common
The sources of both the FREQ/2 OUT and the PULSE FREQ OUT are connected to this pin. An output level swing from the drain voltage to ground, or to the V
SS
supply, may be obtained by connecting this pin to the appropriate point.
2.8 Freq/2 Out
This output is an open-drain N-channel FET, which provides a square-wave one-half the frequency of the pulse frequency output. The FREQ/2 OUT output will change state on the rising edge of PULSE FREQ OUT. This output requires a pull-up resistor and interfaces directly with MOS, CMOS, and TTL logic.
2.9 Threshold Detector Input
In the V/F mode, this input is connected to the AMPLI­FIER OUT output (Pin 12) and triggers a 3 µs pulse when the input voltage passes through its threshold. In the F/V mode, the input frequency is applied to this input.
The nominal threshold of the detector is half way between the power supplies, or (V
+ VSS)/2 ±400
DD
mV. The TC9400’s charge balancing V/F technique is not dependent on a precision comparator threshold, because the threshold only sets the lower limit of the op amp output. The op amp’s peak-to-peak output swing, which determines the frequency, is only influenced by external capacitors and by V
REF
.
2.10 Amplifier Out
This pin is the output stage of the operational amplifier. During V/F operation, a negative going ramp signal is available at this pin. In the F/V mode, a voltage proportional to the frequency input is generated.
FIGURE 2-1: Output Waveforms.
© 2007 Microchip Technology Inc. DS21483D-page 7
TC9400/9401/9402
+
+5V
+
5V
14
V
DD
+
5V
R
L
10 kΩ
R
L
10 kΩ
8
10
9
F
OUT
F
OUT
/2
11
3ms
Delay
Self-
Star t
12
5
20 kΩ
60 pF
Op Amp
C
INT
820 pF
C
REF
180 pF
12 pF
R
IN
1MΩ
V
IN
+5V
-5V
50 kΩ
510 kΩ
10 kΩ
3
1
Offset Adjust
I
IN
Zero Adjust
0V –10V
I
BIAS
V
SS
4
-5V
2
Output
Common
V
REF
OUT
R
BIAS
100 kΩ
AMP OUT
TC9400 TC9401 TC9402
GND
6
Threshold
Detector
Threshold Detect
Reference Voltage
(Typically -5V)
÷2
V
REF
7
-3V
INPUT

3.0 DETAILED DESCRIPTION

3.1 Voltage-to-Frequency (V/F) Circuit
Description
The TC9400 V/F converter operates on the principal of charge balancing. The operation of the TC9400 is easily understood by referring to Figure 3-1. The input voltage (V resistor. This current is then converted to a charge on the integrating capacitor and shows up as a linearly decreasing voltage at the output of the op amp. The lower limit of the output swing is set by the threshold detector, which causes the reference voltage to be applied to the reference capacitor for a time period long enough to charge the capacitor to the reference volt­age. This action reduces the charge on the integrating capacitor by a fixed amount (q = C the op amp output to step up a finite amount.
At the end of the charging period, C This dissipates the charge stored on the reference capacitor, so that when the output again crosses zero, the system is ready to recycle. In this manner, the con­tinued discharging of the integrating capacitor by the input is balanced out by fixed charges from the refer-
) is converted to a current (IIN) by the input
IN
x V
REF
REF
), causing
REF
is shorted out.
ence voltage. As the input voltage is increased, the number of reference pulses required to maintain balance increases, which causes the output frequency to also increase. Since each charge increment is fixed, the increase in frequency with voltage is linear. In addition, the accuracy of the output pulse width does not directly affect the linearity of the V/F. The pulse must simply be long enough for full charge transfer to take place.
The TC9400 contains a “self-start” circuit to ensure the V/F converter always operates properly when power is first applied. In the event that, during power-on, the op amp output is below the threshold and C
is already
REF
charged, a positive voltage step will not occur. The op amp output will continue to decrease until it crosses the
-3.0V threshold of the “self-start” comparator. When this happens, an internal resistor is connected to the op amp input, which forces the output to go positive until the TC9400 is in its normal Operating mode.
The TC9400 utilizes low-power CMOS processing for low input bias and offset currents, with very low power dissipation. The open drain N-channel output FETs provide high voltage and high current sink capability.
FIGURE 3-1: 10 Hz to 10 kHz V/F Converter.
DS21483D-page 8 © 2007 Microchip Technology Inc.
3.2 Voltage-to-Time Measurements
The TC9400 output can be measured in the time domain as well as the frequency domain. Some micro­computers, for example, have extensive timing capabil­ity, but limited counter capability. Also, the response time of a time domain measurement is only the period between two output pulses, while the frequency measurement must accumulate pulses during the entire counter time-base period.
Time measurements can be made from either the TC9400’s PULSE FREQ OUT output, or from the FREQ/2 OUT output. The FREQ/2 OUT output changes state on the rising edge of PULSE FREQ OUT, so FREQ/2 OUT is a symmetrical square wave at one-half the pulse output frequency. Timing measure­ments can, therefore, be made between successive PULSE FREQ OUT pulses, or while FREQ/2 OUT is high (or low).
TC9400/9401/9402
© 2007 Microchip Technology Inc. DS21483D-page 9
Loading...
+ 19 hidden pages