MICROCHIP TC7136, TC7136A Technical data

TC7136/TC7136A

Low Power 3-1/2 Digit Analog-to-Digital Converter

Features

• Fast Over Range Recovery, EnsuredFirst Reading
Accuracy

• Low Temperature Drift Internal Reference

- TC7136: 70ppm/°C (Typ.)

- TC7136A: 35ppm/°C (Typ.)

• Zero Reading with Zero Input

• Low Noise: 15µV

• High Resolution: 0.05%

• Low Input Leakage Current:1pA (Typ.)/10pA (Max.)

• PrecisionNull Detectors with True Polarity at Zero

• High-ImpedanceDifferential Input

• Convenient 9V Battery Operation with Low Power
Dissipation: 500µW (Typ.)/900µW(Max.)

P-P

Applications

• Thermometry

• Bridge Readouts: Strain Gauges, Load Cells,
Null Detectors

• Digital Meters: Voltage/Current/Ohms/Power, pH

• Digital Scales, Process Monitors

• PortableInstrumentation

Device Selection Table

Part Number Package

TC7136CPI 40-PinPDIP 0°Cto+70°C

TC7136CKW 44-Pin PQFP 0°Cto+70°C

TC7136CLW 44-Pin PLCC 0°Cto+70°C

TC7136A CPI 40-PinPDIP 0°Cto+70°C

TC7136A CKW 44-Pin PQFP 0°Cto+70°C

TC7136A CLW 44-PinP LCC 0°Cto+70°C

Temperature

Range

General Description

The TC7136 and TC7136A are low power, 3-1/2 digit
with liquid crystal display (LCD) drivers and analog-to­digital converters. These devices incorporate an "inte­grator output zero" phase, which enables over range
recovery. The performance of existing TC7126,
TC7126A and ICL7126 based systems may be
upgraded with minor changes to external, passive
components.

The TC7136A has an improved i nternal zener refer­ence voltage circuit which maintains the analog com­mon temperature drift to 35ppm/°C (typical) and
75ppm/°C (maximum). This represents an improve­ment of two to four times over similar 3-1/2 digit con­verters. The costly, space consuming external
reference source may be removed.

The TC7136 and TC7136A limit linearity error to less
than1 count on200mV or 2V full scaleranges.Theroll­over error (the difference in readings for equal magni­tude, but opposite polarity input signals) is below ±1
count. High-impedance differential inputs offer 1pA
leakage currents and a 10
differential reference input allows ratiometric measure­ments for ohms or bridge transducer measurements.
The 15µV
reading. The auto-zero cycle enables a zero display
readout for a 0V input.

noise performance ensures a "rock solid"

P-P

12

Ω input impedance. The



2002 Microchip TechnologyInc. DS21461B-page 1

TC7136/TC7136A

Package Type

1

A

B1C1D1V+

6543 1442

F

7

1

G

8

1

E

9

1

D

10

2

C

11

2

12

NC

B

13

2

A

2

F

2

E

2

D

3

18 19 20 21 23 24

3

3

B

F

44-Pin PLCC

TC7136CLW

TC7136ACLW

22

4

3

E

AB

POL

40-Pin PDIP

OSC1

OSC242OSC341TEST40REF HI

NC

43

25 26 27 28

3A3C3

G

BP

NC

2

G

39

REF LO

C

38

C

37

ANALOG

36

COMMON

35

IN HI

34

NC

33

IN LO

3214

AZ

3115

BUFF

3016

INT

2917

V-

REF

REF

44-Pin PQFP

+

-

REF

REF LO

C

REF

ANALOG

COMMON

C

IN HI

IN LO

TC7136CKW

TC7136ACKW

16

2B2A2F2E2

2

C

D

BUFF35INT34V-

37AZ36

19 20 21 22

33

NC

32

G

2

C

31

3

30

A

3

29

G

3

BP

28

POL

27

26

AB

4

E

25

3

F

24

3

23

B

3

3

D

REF HI

44 43 42 41 39 3840

1

NC

2

+

-

NC

TEST

OSC3

NC

OSC2

OSC1

V+

D

C

B

3

4

5

6

7

8

9

1

10

1

11

1

12 13 14 15 17 18

1F1G1E1

A

40-Pin PDIP

1's

10's

100's

1000's

(MINUS SIGN)

V+

D

C

B

A

F

G

E

D

C

B

A

F

E

D

B

F

E

AB

POL

1

2

1

3

1

4

1

5

1

6

1

7

1

8

1

9

2

10

2

11

2

12

2

13

2

14

2

15

3

16

3

17

3

18

3

19

4

20

Normal Pin

Configuration

TC7136CPL

TC7136ACPL

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

OSC1

OSC2

OSC3

TEST

+

V

REF

V

-

REF

+

C

REF

C

-

REF

ANALOG
COMMON

+

V

IN

-

V

IN

C

AZ

V

BUFF

V

INT

V-

G

2

C

3

100's

A

3

G

3

BP
(Backplane)

NC = No Internal Connection

OSC1

OSC2

OSC3

TEST

V

REF

V

REF

C

REF

C

REF

ANALOG

COMMON

V

IN

V

IN

C

AZ

V

BUFF

V

INT

V-

G

C

100's

A

G

BP

(Backplane)

1

2

3

4

+

5

-

6

+

7

-

TC7136RCPL

8

TC7136ARCPL

9

+

10

-

11

12

13

14

15

16

2

17

3

18

3

19

3

20

Reverse Pin

Configuration

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

V+

D

1

C

1

B

1

A

1's

1

F

1

G

1

E

1

D

2

C

2

B

2

10's

A

2

F

2

E

2

D

3

B

3

100's

F

3

E

3

AB

1000's

4

POL
(Minus Sign)

DS21461B-page 2



2002 Microchip TechnologyInc.

Typical Application

TC7136/TC7136A

0.1µF

+

Analog

Input

–

1MΩ

0.01µF

180kΩ

0.15µF

0.47
µF

34

C

+

REF

31

+

V

IN

TC7136

30

32

28

29

27

TC7136A

-

V

IN

ANALOG
COMMON

V

BUFF

C

AZ

V

INT

39 38 40

R

OSC

560kΩ

33

C

REF

C

50pF

-

OSC

22-25

V

REF

V

OSC1OSC3OSC2

9-19

POL

REF

BP

V+

+

V-

Segment
Drive

20

21

1

36

35

­26

LCD

Minus Sign

240kΩ

To Analog Common (Pin 32)

Backplane

10kΩ

1 Conversion/Sec

+

9V



2002 Microchip TechnologyInc. DS21461B-page 3

TC7136/TC7136A

T

Functional Block Diagram

V+

0.5mA

LCD

Output

Segment

2mA

BP

37

6.2V

Control Logic

4

÷

OSC

F

TES

V-

26

500Ω

= 1V

TH

V

Internal Digital Ground

OSC3OSC1

39

OSC2

OSC

R

OSC

C

V+

1

21

INT

C

200

÷

Decode

7-Segment

Decode

7-Segment

LCD Segment Drivers

Decode

7-Segment

Section

To Digital

INT

V

27333634

+

Tens Units

Data Latch

Hundreds

To Switch

Thousands

–

Clock

Typical Segment Input

Internal Digital Ground

AZ

C

V

INT

R

BUFF

V

-

REF

TC7136/A

C

-

REF

REF

C

+V

REF

V

+

REF

C

Integrator

29

1

28

35

–

–

ZI &

ZI & AZ

10

AZ

Comparator

+

AZ

REF

LOW

TEMPCO

V

ZI

+

µA

31

+

V

–

+

V+ – 2.8V

26

DE

(+)

(–)

DE

INT

IN

DE (–)

DE (+)

32

ANALOG

COMMON

AZ & DE (±)

-

IN

V

40 38

V-

INT

DS21461B-page 4



2002 Microchip TechnologyInc.

TC7136/TC7136A

1.0 ELECTRICAL
CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage (V+ to V-).......................................15V

*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.

Analog Input Voltage(Either Input) (Note 1)... V+ to V-

Reference Input Voltage (Either Input)............ V+ to V-

Clock Input .................................................TEST to V+

Package Power Dissipation (T

≤ 70°C) (Note 2):

A

Plastic DIP ...................................................1.23W

Plastic Quad Flat Package ..........................1.00W

PLCC ...........................................................1.23W

Operating Temperature Range:

C Devices..........................................0°C to +70°C

I Devices ........................................-25°C to +85°C

StorageTemperature Range..............-65°C to +150°C

TC7136 AND TC7136A ELEC TRICAL SPECIFICATIONS

Electrical Characteristics: VS=9V,f

Symbol Parameter Min Typ Max Unit Test Conditions
Input

Zero Input Reading -000.0 ±000.0 +000.0 Digital

Zero Reading Drift — 0.2 1 µV/°C V
Ratiometric Reading 999 999/1000 1000 Digital

NL Non-Linearity Error — 1 ±0.2 Count Full Scale = 20mV or 2V Max.

E

R

e

N

I

L

CMRR Common Mode Rejection Ratio — 50 — µV/V V
TC

Note 1: Input voltages may exceed supply voltages when input current is limited to 100µA.

Rollover Error -1 -1 ±0.2 1 Count VIN-=VIN+ ≈ 200mV
Noise — 15 — µV
Input Leakage Current — 1 10 pA VIN=0V

Scale Factor T emperature

SF

Coefficient

2: Dissipationrating assumes deviceis mountedwithallleadssoldered to PC board.
3: Refer to "DifferentialInput" discussion.
4: Backplane drive is in phase with segment drive for "OFF" segment and 180° out-of-phase for "ON" segment. Frequency

is 20 times conversion rate. Average DC component is less than 50mV.

5: See "Typical Application".
6: A 48kHz oscillator increases current by 20µA (typical). Common currentnot included.

=16kHz,andTA= +25°C, unlessotherwise noted.

CLK

Reading

Reading

P-PVIN

—1 5ppm/°CV

= 0V, Full Scale = 200mV

V

IN

=0V,0°C≤ TA≤ +70°C

IN

V

IN=VREF,VREF

Deviation from best Straight Line

= 0V, Full Scale = 200mV

=±1V,VIN=0V,FullScale=200mV

CM

=199mV,0°C≤ TA≤ +70°C

IN

Ext. Ref. Temp. Coeff. = 0ppm/°C

= 100mV



2002 Microchip TechnologyInc. DS21461B-page 5

TC7136/TC7136A

TC7136 AND TC7136A ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: VS=9V,f

Symbol Parameter Min Typ Max Unit Test Conditions
Analog Common

V

CTC

Analog Common Temperature
Coefficient

TC7136A — 35 75 ppm/°C 0°C ≤ T
TC7136 — 70 150 ppm/°C "C" Commercial Temp. Range Devices
TC7136A — 35 100 ppm/°C -25°C ≤ T
TC7136 — 70 150 ppm/°C "I" Industrial Temp. Range Devices

V

C

Analog Common Voltage 2.7 3.05 3.35 V 250kΩ Between Common and V+

LCD Drive

V

SD

V

BD

LCD Segment Drive Voltage 4 5 6 V
LCD Backplane Drive Voltage 4 5 6 V

Power Supply

I

S

Power Supply Current — 70 100 µAVIN=0V,V+toV-=9V(Note 6)

Note 1: Input voltages may exceed supply voltages when input current is limited to 100µA.

2: Dissipationrating assumes deviceis mountedwithallleadssoldered to PC board.
3: Refer to "DifferentialInput" discussion.
4: Backplane drive is in phase with segment drive for "OFF" segment and 180° out-of-phase for "ON" segment. Frequency

is 20 times conversion rate. Average DC component is less than 50mV.

5: See "Typical Application".
6: A 48kHz oscillator increases current by 20µA (typical). Common currentnot included.

=16kHz,andTA= +25°C, unlessotherwise noted.

CLK

P-P
P-P

250kΩ betweenCommonandV+

≤ +70°C

A

≤ +85°C

A

V+ to V- = 9V
V+ to V- = 9V

DS21461B-page 6



2002 Microchip TechnologyInc.

2.0 PIN DESCRIPTIONS

ThedescriptionsofthepinsarelistedinTable2-1.

TABLE 2-1: PIN DE SCRIPTION

Pin Number

(40-Pin PDIP)

Normal

1 (40) V+ Positive supply voltage.
2(39)D
3(38)C
4(37)B
5(36)A
6(35)F
7(34)G
8(33)E

9(32)D
10 (31) C
11 (30) B
12 (29) A
13 (28) F
14 (27) E
15 (26) D
16 (25) B
17 (24) F
18 (23) E
19 (22) AB
20 (21) POL Activates the negative polarity display.
21 (20) BP Backplane drive output.
22 (19) G
23 (18) A
24 (17) C
25 (16) G
26 (15) V- Negative power supply voltage.
27 (14) V

28 (13) V

29 (12) C

30 (11) V
31 (10) V
32 (9) ANALOG

33 (8) C

(Reverse) Symbol Description

Activates the D sectionof the units display.

1

Activates the C sectionof the units display.

1

Activates the B sectionof the units display.

1

Activates the A sectionof the units display.

1

Activates the F section of the units display.

1

Activates the G section of the units display.

1

Activates the E sectionof the units display.

1

Activates the D section of the tensdisplay.

2

Activates the C section of the tensdisplay.

2

Activates the B section of thetensdisplay.

2

Activates the A section of thetensdisplay.

2

Activates the F sectionof the tens display.

2

Activates the E section of thetensdisplay.

2

Activates the D section of the hundreds display.

3

Activates the B section of the hundreds display.

3

Activates the F section of the hundreds display.

3

Activates the E section of the hundreds display.

3

Activates both halves of the 1 in the thousands display.

4

Activates the G section of the hundreds display.

3

Activates the A section of the hundreds display.

3

Activates the C section of the hundreds display.

3

Activates the G section of the tens display.

2

INT

The integrating capacitor should be selected to give the maximum voltage swing
thatensures componenttolerance buildup willnotallowtheintegrator outputto sat­urate. When analog common is used as a reference and the conversion rate is 3
readings per second, a 0.047µF capacitor may be used. The capacitor must have a
low dielectric constant to prevent rollover errors. See Section 6.3, Integrating
Capacitor for additional details.

BUFF

AZ

Integration resistor connection. Use a 180kΩ fora 20mV full scale range and a

1.8MΩ for 2V full scale range.
The size of the auto-zero capacitor influences the system noise. Use a 0.47µF

capacitor for a 200mV full scale and a 0.1µF capacitor for a 2V full scale.
See Section 6.1, Auto-Zero Capacitor for more details.

- Thelow input signal is connected to this pin.

IN

+ The high input signal is connected to this pin.

IN

This pin is primarilyused to set the Analog Common mode voltagefor battery

COMMON

operation, or in systems where the input signal is referenced to the power supply.
See Section 7.3, Analog Common for more details. It also acts as a reference
voltage source.

-SeePin34.

REF

TC7136/TC7136A



2002 Microchip TechnologyInc. DS21461B-page 7

TC7136/TC7136A

TABLE 2-1: PIN DE SCR IPTION (CONTINU ED)

Pin Number

(40-Pin PDIP)

Normal

34 (7) C

35 (6) V

36 (4) TEST Lamp test.WhenpulledHIGH(toV+),all segments will be turned ON and the

37 (3) OSC3 See Pin 40.
38 (2) OSC2 See Pin 40.
39 (1) OSC1 Pins 40, 39 and 38 make up the oscillator section. For a 48kHz clock

(Reverse) Symbol Description

+A0.1µF capacitor is used in most applications. If a large Commonmodevoltage

(5) V

REF

REF

REF

exists (for example, the V
used, a 1µF capacitor is recommended, which will hold the rollover error to

0.5 count.

-SeePin36.

+ The analog input required to generate a full scale output (1999 counts). Place

100mV between Pins 35 and 36 for 199.9mV full scale.Place1V between Pins 35
and 36 for 2V fullscale.See Section6.6, Reference Voltage.

display shouldread-1888. Itmayalsobeused as a negativesupply forexternally
generated decimalpoints. See Section 7.4, Test for additional information.

(3 readingspersecond), connectPin 40 to the junction of a 180kΩ resistorand a
50pF capacitor. The 180kΩ resistor is tied to Pin 39 and the 50pF capacitor is tied
to Pin 38.

- pin is not at analog common) and a 200mV scale is

IN

DS21461B-page 8



2002 Microchip TechnologyInc.

TC7136/TC7136A

p

y

3.0 DETAILED DESCRIPTION

(All Pin Designations Refer to 40-Pin PDIP.)

3.1 Dual Slope Conversion Principles

The TC7136/A is a dual slope, integrating analog-to­digital converter. An understanding of the dual slope
conversion technique will aid in following detailed
TC7136/A operational theory.

The conventional dual slope converter measurement
cycle has two distinct phases (see Figure 3-1).

1. Input signal integration

2. Reference voltage integration (de-integration)
The input signal being converted is integrated for a

fixed time period (t
pulses.An opposite polarity constant referencevoltage
is then integrated until the integrator output voltage
returns to zero. The reference integration time is
directly proportional to the input signal (t

In a simple dual slope converter, a complete conver­sion requires the integrator output to "ramp up" and
"ramp down."

A simple mathematical equation relates the input
signal, reference voltage, and integration time:

EQUATION 3-1:

1

-------- -

∫

RC

Where:

V

= Reference voltage

R

t

= Signal integration time (fixed)

SI

t

= Reference voltage integration time

RI

For a constant VIN:

EQUATION 3-2:

), measured by counting clock

SI

t

SI

VINt() t

0

VRt

------------=

RI

RC

d

(variable)

t

RI

V

IN

--------

V

=

R

t

SI

).

RI

FIGURE 3-1: BAS IC DUAL SLOPE

CONVERTER

C

INT

Analog Input

Signal

REF

Voltage

Output

Integrator

Fixed

Signal

Integrate

Time

Integrator

–

+

Switch
Driver

Polarity Control

Display

Variable
Reference
Integrate
Time

Phase
Control

V

≈ V

IN

REF

VIN ≈ 1/2 V

Comparator

–

+

Control

Logic

REF

Clock

Counter

FIGURE 3-2: NORMAL MODE

REJECTION OF DUAL
SLOPE CONVERTER

30

20

10

Normal Mode Rejection (dB)

0

0.1/t 1/t 10/t
In

The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are inte­grated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation convert­ers in high noise environments. Interfering signals with
frequency components at multiples of the averaging
period will be attenuated. Integrating ADCs commonly
operate with the signal integration period set to a
multiple of the 50Hz/60Hz power line period.

t = Measured Period

ut Frequenc



2002 Microchip TechnologyInc. DS21461B-page 9

TC7136/TC7136A

4.0 ANALOG SECTION

In addition to the basic integrate and de-integrate dual
slope cycles discussed above, the TC7136 and
TC7136A designs incorporate an "integrator output
zero cycle" and an "auto-zero cycle." These additional
cycles ensure the integrator starts at 0V (even after a
severe over range conversion) and that all offset volt­age errors (buffer amplifier, integrator and comparator)
are removed from the conversion. A t rue digital zero
reading is assured without any external adjustments.

A complete conversion consistsof four di stinct phases:

1. Integrator output zero phase

2. Auto-zero phase

3. Signal integrate phase

4. Reference de-integrate phase

4.1 Integrator Output Ze ro Phase

This phase ensures the integrator output is at 0V
before the system zero phase is entered. This ensures
that true system offset voltages will be compensated
for,even after an over range conversion. The count for
this phase is a function of the number of counts
required by t he de-integrate phase. The count lasts
from 11 to 140 counts for non over range conversions
and f rom 31 to 640 counts for over range conversions.

The differential input voltage must be within the device
Common mode range when the converter and mea­sured system share the same power supply common
(ground). If the converter and measured system do not
share the same power supply common, V

- should be

IN

tied to analog common.
Polarity is determined at the end of signal integrate

phase. The sign bit is a true polarity indication, in that
signals less than 1LSB are correctly determined. This
allows precision null detection, limited only by device
noise and auto-zero residual offsets.

4.4 Reference Integrate Phase

The third phase is reference integrate or de-integrate.
V

- is internally connected to analog common and

IN

V

+ is connectedacross the previously charged refer-

IN

ence capacitor. Circuitry within the chip ensures that
the capacitor will be connected with the correct polarity
to cause the integrator output to return to zero. The
time required for the output to return to zero i s propor­tional to the input signal and is between 0 and 2000
internal clock periods. The digital reading displayedis:

EQUATION 4-2:

V

1000

----------------=
V

IN

REF

4.2 Auto-Zero Phase

During the auto-zero phase, the differentialinputsignal
is disconnected from the circuit by opening internal
analog gates. The internalnodes are shorted to analog
common (ground) to establish a zero input condition.
Additional analog gates close a feedback loop around
the integrator and comparator. This loop permits com­parator offset voltage error compensation. The voltage
levelestablishedonC

compensatesfordeviceoffset

AZ

voltages. The auto-zero phase residual is typically
10µVto15µV.

The auto-zero duration is from 910 to 2900 counts for
non over range conversions and from 300 to 910
counts for over range conversions.

4.3 Signal Integration Phase

The auto-zero loop is entered and t he internal differen­tial inputs connect to V
input signal is integrated for a fixed time period. The
TC7136/A signal integration period is 1000 clock peri­ods or counts. The externally set clock frequency is
divided by four before clocking the internal counters.
The i ntegration t ime period is:

EQUATION 4-1:

tSI= x 1000

Where F

OSC

+ and VIN-. The differential

IN

4

F

OSC

= external clock frequency.

FIGURE 4-1: CONVERSION TIM ING

DURING NORMAL
OPERATION

INT

DENT

AZ

1000

1-2000

ZI

4000

11-140

910-2900

FIGURE 4-2: CONVERSION TIM ING

DURING OVER RANGE
OPERATION

INT

DEINT

ZI

AZ

1000

2001-2090

31-640

300-910

4000

DS21461B-page 10



2002 Microchip TechnologyInc.

TC7136/TC7136A

5.0 DIGITAL SECTION

The TC7136/A contains all the segment drivers neces­sary to di rectly drive a 3-1/2 digit LCD. An LCD back­plane driver is included. The backplane frequency is
the external clock frequency divided by 800. For three
conversions per second, the backplane frequency is
60Hz with a 5V nominal amplitude. When a segment
driver is in phase with the backplane signal, the seg­ment is OFF. An out-of-phase segment drive signal
causes the segmentto be ON, or visible.This AC drive
configuration results in negligible DC voltage across
each LCD segment, ensuring long LCD l ife. The polar­ity segment driver is ON f or negative analog inputs. If
V

+andVIN- are reversed, this indicator would

IN

reverse.
On the TC7136/A, when the TEST pin is pulled to V+,

all segments are turned ON. The display reads -1888.
During this mode, the LCD segments have a constant
DC voltage impressed.

Note: Do not leave the display in this mode for

more than several minutes. LCDs may be
destroyed if operated with DC levels for
extended periods.

The display font and segment drive assignment are
shown in Fi gure 5-1.

FIGURE 5-1: DISPLAY FONT AND

SEGMENT ASSIGNMENT

Display Font

1000's 100's 10's 1's

5.1 System Timing

The oscillatorfrequencyi s dividedby4 priorto clocking
the internal decade counters. The four-phase mea­surement cycle takes a total of 4000 counts, or 16,000
clock pulses. The 4000 count cycle is independent of
input signal magnitude.

Each phase of the measurement cycle has the
following length:

1. Auto-zero phase: 3000 to 2900 counts
(1200 to 11,600clock pulses)

2. Signal integrate: 1000 counts
(4000 clock pulses)

This time period is fixed.The integration period is:

EQUATION 5-1:

Where:

t

= 4000

SI

F

is the externally set clock frequency.

OSC

3. Reference integrate: 0 to 2000 counts

4. Zero integrator: 11to 640 counts

The TC7136 is a drop-in replacement for the TC7126
and ICL7126. The TC7136A offers a greatly improved
internal reference temperature coefficient. Minor com­ponent value changes are required to upgrade existing
designs and improve the noise performance.

1





F





OSC

6.0 COMPONENT VALUE

SELECTION

6.1 Auto-Zero Capacitor (CAZ)

The CAZcapacitorsize has some influence on system
noise. A 0. 47µF capacitor is recommended for 200mV
full scale applications, where 1LSB is 100µV. A 0.1µF
capacitor is adequate for 2V full scale applications. A
Mylar type dielectric capacitor is adequate.

6.2 Reference Voltage Capacitor

)

(C

REF

The reference voltage, used to ramp the integratorout­put voltage back to zero during the reference integrate
phase, is stored on C
able when V
Common mode voltage exists (V
mon) and the application requires a 200mV full scale,
increaseC
than 0.5 count. A Mylar type dielectric capacitor is
adequate.

- is tied to analog common. If a large

REF

to 1µF.Rollovererrorwillbeheldtoless

REF

6.3 Integrating Capacitor (C

C

should be selected to maximize i ntegrator output

INT

voltage swing without causing output saturation. Ana­log common will normally supply the differentialvoltage
referenceinthis case, a ±2Vfull scale integratoroutput
swing is satisfactory. For 3 readings per second
(F

= 48kHz), a 0.047µF value is suggested. For

OSC

one reading per second, 0.15µF is recommended. If a
different oscillator frequency is used, C
changed in inverse proportion to maintain the nominal
±2V integrator swing.

.A0.1µF capacitor is accept-

REF

- ≠ analog com-

REF

)

INT

INT

must b e



2002 Microchip TechnologyInc. DS21461B-page 11

TC7136/TC7136A

An exact expression for C

INT

is:

EQUATION 6-1:

INT

V

FS







R







INT

)

INT

INT

is 180kΩ.A

INT

(4000)

C

=

INT

F



OSC

V

1



Where:

=Clock frequency at Pin 38

F

OSC

V

=Full scale input voltage

FS

=Integrating resistor

R

INT

V

=Desired full scaleintegrator output swing

INT

C

must have low dielectric absorption to minimize

INT

rollover error. A polypropylene capacitor is
recommended.

6.4 Integrating Resistor (R

The input buffer amplifier and integrator are designed
with Class A outputstages.Theoutput stage idling cur­rent is 6µA. The integrator and buffer can supply 1µA
drive currents wi th negligible linearity errors. R
chosen to remain in the output stage linear drive
region, but not so large that PC board leakage currents
induce errors. For a 200mV full scale, R
2V f ull scale requires 1.8MΩ (see Table 6-1).

TABLE 6-1:

Component

Value

C

AZ

R

INT

C

INT

Note: F

R

OSC

Nominal Full Scale Voltage

200mV 2V

0.47µF0.1µF
180kΩ 1.8MΩ

0.047µF 0.047µF

= 48kHz (3 reading per sec).

=180kΩ, C

OSC

OSC

=50pF.

6.5 Oscillator Components

C

should be 50pF. R

OSC

is selected from the

OSC

equation:

EQUATION 6-2:

OSC

0.45

=

RC

F

Note that F

is ÷ 4 to generate the TC7136A's inter-

OSC

nal clock. The backplane drive signal is derived by
dividing F

OSC

by 800.

To achieve maximum rejection of 60Hz noise pickup,
the s ignal integrate period should be a multiple of
60Hz. Oscillator frequencies of 240kHz, 120kHz,
80kHz, 60kHz, 40kHz, etc. should be selected. For
50Hz rejection, oscillator frequencies of 200kHz,
100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suit­able. Note that 40kHz (2.5 readings per second) will
reject both 50Hz and 60Hz.

6.6 Reference Voltage Selection

is

A full scale reading (2000 counts) requires the input
signal be twice the reference voltage.

Required Full Scale Voltage* V

REF

200mV 100mV

2V 1V

Note: *V

REF

=2V

REF.

In some applications, a scale factor other than unity
may exist between a transducer output voltage and the
required di gital reading. Assume, for example, a pres­sure transduceroutputfor2000 lb/in

2

is 400mV. Rather
than dividing the input voltage by two, the reference
voltageshouldbe set to 200mV. This permits the trans­ducer input to be used directly. The differential refer­ence can also be used when a digital zero reading is
required,whenV

isnotequaltozero.Thisis common

IN

in temperature m easuring instrumentation. A compen­sating offset voltage can be applied between analog
common and V
between V

-. The transducer output i s connected

IN

+ and analog common.

IN

DS21461B-page 12



2002 Microchip TechnologyInc.

TC7136/TC7136A

7.0 DEVICE PIN FUNCTIONAL
DESCRIPTION

7.1 Differential Signal Inputs

+(Pin31),VIN-(Pin30)

V

IN

The TC7136/A is designed with true differential inputs

V+ – 1V to V- + 1V. Common mode voltages are
removed from the systemwhen the TC7136A operates
from a battery or floating power source (isolated from
measured system), Common mode voltage removed
in batteryoperationwi th V

= analog commonand VIN-

IN

is connected to analog common (V
Figure 7-1).

and accepts input signals within the input stage Com­mon mode voltage range (V

). The typical range i s

CM

FIGURE 7-1: COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH

V

= ANALOG COMM ON

IN

V+

V-

Powe r

Source

V+

V-

GND

Measured

System

GND

V

BUF

V+

V-

ANALOG
COMMON

CAZV

TC7136

TC7136A

V

-

REF

REF

INT

+V

Segment

Drive

+

9V

BPPOL

OSC1

OSC3

OSC2

V-V+

LCD

COM

)(see

In systems where Common mode voltages exist, the
86dB Common mode rejection ratio minimizes error.
Common mode voltages do, however, affect the inte­grator output level. A worst case condition exists if a
large positive V

existsin conjunctionwith a full scale

CM

negative differential signal. The negative signal drives
the integrator output positive along with V

CM

(see
Figure 7-2.) For such applications, the integrator out­put swing can be reduced below the recommended 2V
full scale swing. The integrator output will swing within

0.3V of V+ or V- without increased linearity error.

FIGURE 7-2: COMMON MODE

VOLTAGE REDUCES
AVAILABLEI NTEG RATOR
SWING

Input Buffer

+

V

IN

–

V

CM

+

–

V

Where:

(V

R

I

t

I

=

I

[

C

I

tI = Integration time

= Integration capacitor

C

I

RI = Integration resistor

COM

C

–

+

VCM = V

≠ VIN)

I

Integrator

IN

[

=

4000
F

OSC

V

I

7.2 Differential Reference
V

+(Pin36),V

REF

-(Pin35)

REF

The reference voltage can be generated anywhere
within the V+ to V- power supply range.

To prevent rollover type errors being induced by large
Common mode voltages, C

should be large com-

REF

pared to stray node capacitance. The TC7136/A offers
a significantly improved analog common temperature
coefficient. This potential provides a very stable volt­age, suitable for use as a voltage reference. The
temperature coefficient of analog common is typically
35ppm/°C.

7.3 AnalogCommon(Pin32)

The analog common pin is set at a voltage potential
approximately 3V below V+. The potential is between

2.7V and 3.35V below V+. Analog common is tied inter-

nally to an N-channel FET, capable of sinking 100µA.
ThisFET will hold the common line at 3V belowV+ if an
external load attempts to pull the common line toward
V+. Analog common source current is limited to 1µA.
Analog common is, therefore, easily pulled to a more
negative voltage (i.e., below V+ – 3V).



2002 Microchip TechnologyInc. DS21461B-page 13

TC7136/TC7136A

The TC7136/A connects the internal VIN+ and VIN­inputs to analog common during the auto-zero phase.
Duringthereferenceintegratephase,V
to analogcommon.IfV

-isnotexternallyconnectedto

IN

-isconnected

IN

analog common, a Common mode voltage exists, but
is rejected by the converter's 86dB Common mode
rejection ratio. In battery operation, analog common
and V
mode voltage concerns. In systems where V

- are usually connected, removing Common

IN

- is con-

IN

nected to the power supply ground or to a given
voltage, analog common should be connected to V

IN

The analog common pin serves to set the analog sec­tion reference, or common point. The TC7136A is spe­cifically designed to operate from a battery, or in any
measurementsystemwhere i nput signals are not refer­enced (float), with respect to the TC7136A power
source.The analog commonpotentialof V+ – 3V gives
a 7V end of battery life voltage. The common potential
has a 0.001%/% voltage coefficient.

With sufficiently high total supply voltage
(V+ – V- > 7V), analog common is a very stable poten­tial with excellent temperature stability (typically
35ppm/°C for TC7136A. This potential can be used to
generatetheTC7136A'sreferencevoltage.An external
voltage reference will be unnecessary in most cases,
because of the 35ppm/°C temperature coefficient. See
Section 7.5, TC7136A Internal Voltage Reference
discussion.

7.4 TEST (Pin 37)

The TEST pin potential is 5V less t han V+. TEST may
be used as the negative power supply connection for
external CMOS logic. The TEST pin is tied to the inter­nally generated negative logic supply through a 500Ω
resistor. The TEST pin load should not be more than
1mA. See Section 8.0, Typical Applications for addi­tional information on using TEST as a negative digital
logic supply.

If TEST is pulled high (to V+), all segments plus the
minus sign wi ll be activated. DO NOT OPERATE IN
THIS MODE FOR MORE THAN SEVERAL MINUTES.
With TEST = V+, the LCD segments are impressed with
a DC voltage which will destroy the LCD.

FIGURE 7-3: ANALOG CO M MO N

TEMPERATURE
COEFFICIENT

200

180

160

140

-.

120

100

80

Coefficient (ppm/°C)

60

Analog Common Temperature

40

20

Maximum

Typical

0

Maximum

Typical

TC7136TC7136A

No Maximum

Specified

Typical

ICL7136

FIGURE 7-4: TC7136A INTERNAL

VOLTAGE REFERENCE
CONNECTION

9V

+

V

REF

V

REF

ANALOG

= 1/2 V

V+

1

+

-

REF

240kΩ

36

V

REF

35

32

10kΩ

26

V-

Set V

TC7136

TC7136A

COMMON

REF

7.5 TC7136A Internal Voltage
Reference

The TC7136 analog common voltagetemperature sta­bility has been significantly improved (Figure 7-3). The
"A" version of the i ndustry standard TC7136 device
allows users to upgrade old systems and design new
systems without external voltage references. External
R and C values do not need to be changed; however,
noise performance will be improved by increasing C
(see Section 6.1, Auto-Zero Capacitor). Figure7-4
shows analog common supplying the necessary
voltage reference for the TC7136/A.

DS21461B-page 14

AZ



2002 Microchip TechnologyInc.

TC7136/TC7136A

8.0 TYPICAL APPLICATIONS

8.1 Liquid Crystal Display Sources

Several manufacturers supply standard LCDs to inter­face with the TC7136A 3-1/2 digit analog-to-digital
converter.

Manufac. Address/Phone

Crystaloid
Electronics

AND 720 Palomar Ave.

VGI, Inc. 1800 Vernon St. Ste.2,

Hamlin, Inc. 612 E. Lake St.

Note: ContactLCDmanufacturer for fullproduct listing/

5282 Hudson Dr.
Hudson, OH 44236
216-655-2429

Sunnyvale, CA 94086
408-523-8200

Roseville,
CA 95678
916-783-7878

Lake Mills,
WI 53551
414-648-236100

specifications.

8.2 Decimal Point and Annunciator
Drive

The TEST pin is connected to the internally generated
digitallogicsupplyground through a 500Ω resistor. The
TEST pin may be used as the negative supplyforexter­nal CMOS gate segment drivers. LCD annunciators for
decimal points, low battery indication, or function indi­cation may be added without adding an additional sup­ply. No more than 1mA shouldbe suppliedbythe TEST
pin; its potential is approximately 5V below V+.

8.3 Ratiometric Resistance
Measurements

Representative

Part Numbers*

C5335,H5535,
T5135, SX440

FE 0201, 0501
FE 0203, 0701
FE 2201

I1048, I1126

3902, 3933, 3903

The unknown resistance is put in series with a known
standard and a current passed through the pair. The
voltagedeveloped across the unknownis appliedtothe
inputand the voltage across the known r esistor applied
to the reference input. If the unknown equals the stan­dard, the display will read 1000. The displayed reading
can be determined from the following expression:

EQUATION 8-1:

R

Displayed(Reading) =

UNKNOWN

R

STANDARD

x 1000

The display will over range for:

R

UNKNOWN

≥ 2xR

STANDARD

FIGURE 8-1: DECIMAL POINT AND

ANNUNCIATOR DRIVES

Simple Inverter for Fixed Decimal Point

or Display Annunciator

V+

V+

TC7136

TC7136A

21

BP

37

TEST

Multiple Decimal Point or

Annunciator Driver

V+

BP

TC7136

TC7136A

Decimal

Point

Select

4049

GND

V+

To LCD
Decimal Point

To LCD Backplane

To LCD
Decimal Point

The TC7136A's true differential input and differential
reference make ratiometric readings possible. In ratio­metric operation, an unknown resistance is measured

TEST

4030

GND

with respect to a known standard resistance. No
accurately defined referencevoltage is needed.



2002 Microchip TechnologyInc. DS21461B-page 15

TC7136/TC7136A

FIGURE 8-2: LOW PARTS COUNT

RATIOMETRIC
RESISTANCE
MEASUREMENT

V+

V

+

REF

-

R

STANDARD

R

UNKNOWN

V

REF

V

+

IN

TC7136

TC7136A

-

V

IN

ANALOG
COMMON

LCD

FIGURE 8-3: TEMPERATURE SENSOR

+

9V

160kΩ 300kΩ 300kΩ

R

1N4148
Sensor

50kΩ

R

2

50kΩ

1

V+ V-

-

V

IN

+

V

IN

TC7136

TC7136A

+

V

REF

FIGURE 8-4: POSITIVETEMPERATURE

COEFFICIENT RESISTOR
TEMPERATURE SENSOR

9V

+

5.6kΩ 160kΩ

V+ V -

0.7%/°C
PTC

1N4148

R

3

R

20kΩ

R

20kΩ

1

2

-

V

IN

+

V

IN

TC7136

TC7136A

+

V

REF

V

-

REF

COMMON

V

-

REF

COMMON

DS21461B-page 16



2002 Microchip TechnologyInc.

9.0 PACKAGING INFORMATION

9.1 Package Marking Information

Package marking data not available at this time.

9.2 Taping Form

Component Taping Orientation for 44-Pin PQFP Devices

User Direction of Feed

TC7136/TC7136A

PIN 1

W

P

Standard Reel Component Orientation
for TR Suffix Device

Carrier Tape, Number of Components Per Reel and Reel Size

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

44-Pin PQFP 24 mm 16 mm 500 13 in

Note: Drawing does not represent total number of pins.

Component Taping Orientation for 44-Pin PLCC Devices

User Direction of Feed

PIN 1

W

P

Standard Reel Component Orientation
for TR Suffix Device

Carrier Tape, Number of Components Per Reel and Reel Size

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

44-Pin PLCC 32 mm 24 mm 500 13 in

Note: Drawing does not represent total number of pins.



2002 Microchip TechnologyInc. DS21461B-page 17

TC7136/TC7136A

9.3 Package Dimensions

40-Pin PDIP (Wide)

.200 (5.08)
.140 (3.56)

.150 (3.81)
.115 (2.92)

.110 (2.79)
.090 (2.29)

2.065 (52.45)

2.027 (51.49)

.070 (1.78)
.045 (1.14)

.022 (0.56)
.015 (0.38)

PIN 1

.555 (14.10)
.530 (13.46)

.040 (1.02)
.020 (0.51)

.015 (0.38)
.008 (0.20)

.610 (15.49)
.590 (14.99)

3° MIN.

.700 (17.78)
.610 (15.50)

Dimensions: inches (mm)

44-Pin PLCC

.695 (17.65)
.685 (17.40)

.656 (16.66)
.650 (16.51)

.656 (16.66)
.650 (16.51)

.695 (17.65)
.685 (17.40)

PIN 1

.050 (1.27) TYP.

.021 (0.53)
.013 (0.33)

.630 (16.00)
.591 (15.00)

.032 (0.81)
.026 (0.66)

.020 (0.51) MIN.

.120 (3.05)
.090 (2.29)

.180 (4.57)
.165 (4.19)

Dimensions: inches (mm)

DS21461B-page 18



2002 Microchip TechnologyInc.

9.3 Package Dimensions (Continued)

(

TC7136/TC7136A

44-Pin PQFP

PIN 1

.018 (0.45)
.012 (0.30)

.031 (0.80) TYP.

.398 (10.10)

.390 (9.90)

.557 (14.15)
.537 (13.65)

.398 (10.10)

.390 (9.90)

.557 (14.15)
.537 (13.65)

.009 (0.23)
.005 (0.13)

.096

7° MAX.

.041 (1.03)
.026 (0.65)

.010 (0.25) TYP.

.083 (2.10)
.075 (1.90)

2.45) MAX.

Dimensions: inches (mm)



2002 Microchip TechnologyInc. DS21461B-page 19

TC7136/TC7136A

SALES AND SUPPORT

Data Sheets

Products supportedby a preliminaryData Sheet may have an errata sheet describingminor operational differences and recom­mendedworkarounds.To determine if an erratasheetexists for a particular device,please contact one of the following:

1. Y our local Microchip sales office

2. The MicrochipCorporate Literature Center U.S. FAX: [phone]

3. The Microchip Worldwide Site (www.microchip.com)
Pleasespecify which device, revision of silicon and Data Sheet (includeLiterature#) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to r eceive the most current information on our products.

DS21461B-page 20



2002 Microchip TechnologyInc.

TC7136/TC7136A

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information,or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com­ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con­veyed, implicitly or otherwise, under any intellectual property
rights.

Trademarks

The Microchip name and logo, the Microchip logo, FilterLab,
K

EELOQ,microID,MPLAB,PIC,PICmicro,PICMASTER,

PICSTART, PRO MATE, SEEVA L and The Embedded Control
SolutionsCompany areregiste red trademarksof MicrochipTech­nologyIncorp or ated in the U.S.A. and other countries .

dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPA SM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Enduranceare trademarkso f MicrochipTechnology
Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip TechnologyIncorporated in t he U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.

Printed on recycled paper.

Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its

®

PICmicro
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systemsisISO 9001certified.



2002 Microchip TechnologyInc. DS21461B-page 21

8-bit MCUs, KEELOQ®code hopping

WORLDWIDE SALES AND SERVICE

AMERICAS

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Taiwan

Microchip Technology Taiwan
11F-3, No. 207
Tung HuaNorth Road
Taipei, 105, Taiwan
Tel: [phone] Fax: [phone]

EUROPE

Denmark

Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: [phone] Fax: [phone]

France

Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: [phone] Fax: [phone]

Germany

Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: [phone] Fax: [phone]

Italy

Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: [phone] Fax: [phone]

United Kingdom

Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG415TU
Tel: [phone] Fax: [phone]

03/01/02

DS21461B-page 22

*DS21461B*

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2002 Microchip Technology Inc.