MICROCHIP TC7129 Technical data
查询TC7129CJL713供应商
4-1/2 Digit Analog-to-Digital Converters with
TC7129
On-Chip LCD Drivers
Features:
• Count Resolution: ±19,999
• Resolution on 200mV Scale: 10 μV
• True Differential Input and Reference
• Low Power Consumption: 500 μA at 9V
• Direct LCD Driver for 4-1/2 D ig it s , Dec im al Po ints,
Low Battery Indicator, and Continuity Indicator
• Overrange and Underrange Outputs
• Range Select Input: 10:1
• High Common Mode Rejection Ratio: 110 dB
• External Phase Compensation Not Required
Applications:
• Full-Featured Multimeters
• Digital Measu rem en t Dev ic es
Device Selection Table
Package
Code
TC7129CPL Normal 40-Pin PDIP 0°C to +70°C
TC7129CKW Formed 44-Pin PQFP 0°C to +70°C
TC7129CLW – 44-Pin PLCC 0°C to +70°C
Pin
Layout
Package
Temperature
Range
General Description:
The TC7129 is a 4-1/2 di git Analog-to-Dig ital Con verter
(ADC) that directly drives a multiplexed Liquid Crystal
Display (LCD). Fabricated in high-performance, lowpower CMOS, the TC7129 ADC is designed specifically for high-resolution, battery-powered digital multimeter applications. The traditional dual-slope method
of A/D conversion has been enhanced with a successive integration technique to produce readings accurate to better than 0.005% of full-scale and resolution
down to 10 μV per count.
The TC7129 includes f eatures impor tant to multimeter
applications. It detects and ind icat es l ow bat ter y con dition. A continuity outp ut drives an annunciator on the
display and can be used with an external driver to sound
an audible alarm. Overrange and underrange o utputs,
along with a range-ch ange input, provi de the ability to
create auto-ranging instruments. For snapshot readings, the TC7129 includes a latch-and-hold input to
freeze the present reading. This combination of features
makes the TC7129 the ideal choice for full-featured
multimeter and digital measurement applications.
Typical Application
Low Battery
20
+
9V
*
N
ote
:
RC network between pins 26 and 28 is not required.
© 2006 Microchip Technology Inc. DS21459D-page 1
0.1 µF
10 kΩ
27262524232221
*
13141516171819
28
150 kΩ
1011
12
TC7129
29
+
1 µF
–
9
323130
0.1
µF
V
Continuity
8
33
100 kΩ
+
IN
V+
5 pF
1234567
120 kHz
3534
36
20
kΩ
39
40
3837
330 kΩ
10 pF
0.1 µF
V+
TC7129
Package Types
ANNUNICATOR
B2, C2, LO BATT
Display
Output
Lines
B
, C1, CONT
1
A
F1, E1, DP
A
F2, E2, DP
B3, C
A
F3, E3, DP
B4, C
A4, G4, D
F4, E4, DP
, G1, D
1
, G2, D
2
MINUS
3
,
, G3, D
3
4
DP4/OR
OSC1
OSC3
BC
,
BP
BP
BP
V
DISP
40-Pin PDIP
1
2
3
4
5
1
6
1
7
8
2
9
2
10
11
3
12
3
13
5
14
4
15
4
16
3
17
2
18
1
19
20
TC7129CPL
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
OSC2
DP
1
DP
2
RANGE
DGND
REF LO
REF HI
IN HI
IN LO
BUFF
-
C
REF
+
C
REF
COMMON
CONTINUITY
INT OUT
INT IN
V+
V-
LATCH/HOLD
DP3/UR
, E1, DP
F
1
B2, C2, BATT
, G2, D
A
2
F2, E2, DP
B3, C
MINUS
3
,
A
, G3, D
3
F3, E3, DP
B4, C
A4, G4, D
F4, E4, DP
44-Pin QFP 44-Pin PLCC
1
, D
, CONT
1
1
, G
, C
1
1
ANNUNCIATOR
OSC3
A
44 43 42 41 39 3840
1
1
B
OSC1NCOSC2
2
3
2
4
2
5
NC
6
7
3
8
3
BC
9
4
5
,
10
4
11
4
12 13 14 15 17 18
BP3BP
1
2
BP
TC7129CKW
16
/OR
4
DISP
V
DP
NC
/UR
3
DP
1DP2
DP
RANGE
37 36 35 34
19 20 21 22
V-
V+
DGND
33
32
31
30
29
28
27
26
25
24
23
INT IN
REF LO
REF HI
IN HI
IN LO
BUFF
NC
C
-
REF
C
+
REF
COMMON
CONTINUITY
INT OUT
F1, E1, DP
B2, C2, BATT
, G2, D
A
2
F2, E2, DP
B3, C
3
,
A
, G3, D
3
F3, E3, DP
B4, C
A4, G4, D
F4, E4, DP
MINUS
NC
BC
4
,
LATCH/HOLD
1
, D
, CONT
1
1
, G
, C
1
1
A
B
6543 1442
7
1
8
9
2
10
2
11
12
13
3
3
5
4
4
18 19 20 21 23 24
3BP2
BP
ANNUNCIATOR
OSC3
OSC1NCOSC2
TC7129CLW
22
1
/OR
BP
DISP
4
V
DP
NC
/UR
3
DP
DP1DP2RANGE
43 42 41 40
25 26 27 28
V-
V+
LATCH/HOLD
DGND
39
38
37
36
35
34
33
3214
3115
3016
2917
INT IN
REF LO
REF HI
IN HI
IN LO
BUFF
NC
-
C
REF
C
+
REF
COMMON
CONTINUITY
INT OUT
DS21459D-page 2 © 2006 Microchip Technology Inc.
TC7129
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage (V+ to V-).......................................15V
*Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Reference Voltage (REF HI or REF LO)........ V+ to V–
Input Voltage (IN HI or IN LO) (Note 1).......... V+ to V–
.......................................... V+ to (DGND – 0.3V)
V
DISP
Digital Input (Pins 1, 2, 19, 20,
21, 22, 27, 37, 39, 40).......................... DGND to V+
Analog Input (Pins 25, 29, 30) ....................... V+ to V–
Package Power Dissipation (T
≤ 70°C)
A
Plastic DIP .....................................................1.23W
PLCC .............................................................1.23W
Plastic QFP....................................................1.00W
Operating Temperature Range ...............0°C to +70°C
Storage Temperature Range..............-65°C to +150°C
TC7129 ELECTRICAL SPECIFICATIONS
Electrica l Characteristics: V+ to V– = 9V, V
Pin numbers refer to 40-pin DIP.
Symbol Parameter Min Typ Max Unit Test Conditions
= 1V, TA = +25°C, f
REF
= 120 kHz, unless otherwise indicated.
CLK
Input
Zero Input Reading –0000 0000 +0000 Counts V
Zero Reading Drift — ±0.5 — μV/°C V
Ratiometric Reading 9996 — 10000 Counts VIN = V
= 0V, 200 mV scale
IN
= 0V, 0°C < TA < +70°C
IN
= 1000 mV,
REF
Range = 2V
Range Change Accuracy 0.9999 1.0000 1.0001 Ratio V
= 1V on High Range,
IN
= 0.1V on Low Range
V
IN
RE Rollover Error — 1 2 Counts VIN– = VIN+ = 199 mV
NL Linearity Error — 1 — Counts 200mV Scale
CMRR Common Mode Rejection Ratio — 110 — dB V
= 1V, VIN = 0V,
CM
200 mV scale
CMVR Common Mode Voltage Range — (V-) +
—VV
IN
= 0V
1.5
— (V+) – 1 — V 200mV scale
e
N
Noise (Peak-to-Peak Value not
Exceeded 95% of Time)
I
IN
Input Leakage Current — 1 1 0 pA VIN = 0V, pins 32, 33
Scale Factor Temperature
Coefficient
— 14—μV
P-PVIN
— 2 7 ppm/°C V
= 0V
200 mV scale
= 199 mV,
IN
0°C < T
External V
< +70°C
A
REF
= 0 ppm/°C
Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400 μA. Currents above
this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA.
Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.
© 2006 Microchip Technology Inc. DS21459D- page 3
TC7129
TC7129 ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrica l Characteristics: V+ to V– = 9V, V
Pin numbers refer to 40-pin DIP.
Symbol Parameter Min Typ Max Unit Test Conditions
Power
V
COM
Common Voltage 2.8 3.2 3.5 V V+ to pin 28
Common Sink Current — 0.6 — mA ΔCommon = +0.1V
Common Source Current — 10 — μA ΔCommon = -0.1V
DGND Digital Ground Voltage 4.5 5.3 5.8 V V+ to pin 36, V+ to V– = 9V
Sink Current — 1.2 — mA ΔDGND = +0.5V
Supply Voltage Range 6 9 12 V V+ to V–
I
S
Supply Current Excluding
Common Current
f
CLK
Clock Frequency — 120 360 kHz
Resistance — 50 — kΩ V
V
DISP
Low Battery Flag Activation
Voltage
Digital
Continuity Comparator Threshold
Voltages
Pull-down C urrent — 2 10 μA Pins 37, 38, 39
“Weak Output” Current
Sink/Source
Pin 22 Source Current — 40 — μA
Pin 22 Sink Current — 3 — μA
Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400 μA. Currents above
this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA.
Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.
= 1V, TA = +25°C, f
REF
= 120 kHz, unless otherwise indicated.
CLK
— 0.8 1.3 mA V+ to V– = 9V
to V+
DISP
6.3 7.2 7.7 V V+ to V–
100 200 — mV V
— 200 400 mV V
pin 27 = High
OUT
pin 27 = Low
OUT
— 3/3—μA Pins 20, 21 sink/sourc e
— 3/9—μA Pin 27 sink/source
DS21459D-page 4 © 2006 Microchip Technology Inc.
TC7129
2.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin No.
40-Pin PDIP
1 40 2 OSC1 Input to first clock inverter.
2 41 3 OSC3 Output of second clock inverter.
3 42 4 ANNUNCIATOR Backplane square wave output for driving annunciators.
443 5B
544 6A
617F
728B
839A
9410F
10 5 11 B
11 7 13 A
12 8 14 F
13 9 15 B
14 10 16 A
15 11 17 F
16 12 18 BP
17 13 19 BP
18 14 20 BP
19 15 21 V
20 16 22 DP
21 18 24 DP
22 19 25 LATCH
23 20 26 V– Negative power supply terminal.
24 21 27 V+ Positive power supply terminal and positive rail for display
25 22 28 INT IN Input to integrator amplifier.
26 23 29 INT OUT Output of integrator amplifier.
27 24 30 CONTINUITY Input: When low, continuity flag on the display is off. When high,
28 25 31 COMMON Sets common mode voltage of 3.2V below V+ for DE, 10X, etc.
29 26 32 C
30 27 33 C
31 29 35 BUFFER Output of buffer amplifier.
32 30 36 IN LO Negative input voltage terminal.
33 31 37 IN HI Positive input voltage terminal.
34 32 38 REF HI Positive reference voltage.
35 33 39 REF LO Negative reference voltage
Pin No.
44-Pin PQFP
Pin No.
44-Pin PLCC
Symbol Function
, C1, CONT Output to display segments.
1
, G1, D
1
, E1, DP
1
, C2,
2
Output to display segments.
1
Output to display segments.
1
Output to display segments.
LO BATT
, G2, D
2
, E2, DP
2
, C3, MINUS Output to display segments.
3
, G3, D
3
, E3, DP
3
, C4, BC
4
, D4, G
4
, E4, DP
4
3
2
1
DISP
/OR Input: When high, turns on most significant decimal point.
4
/UR Input: Second-most significant decimal point on when high.
3
Output to display segments.
2
Output to display segments.
2
Output to display segments.
3
Output to display segments.
3
Output to display segments.
5
Output to display segments.
4
Output to display segments.
4
Backplane #3 output to display.
Backplane #2 output to display.
Backplane #1 output to display.
Negative rail for display drivers.
Output: Pulled high when result count exceeds ±19,999.
Output: Pulled high when result count is less than ±1000.
/HOLD Input: When floating, ADC operates in Free Run mode. When
pulled high, the last displayed reading is held. When pulled low,
the result counter contents are shown incrementing during the
de-integrate phase of cycle.
Output: Negative going edge occurs when the data latches are
updated. Can be used for converter status signal.
drivers.
continuity flag is on.
Output: High when voltage between inputs i s less than +200 mV .
Low when voltage between inputs is more than +200 mV.
Can be used as pre-regulator for external reference.
+ Positive side of external reference capacitor.
REF
– Negative side of external reference capacitor.
REF
© 2006 Microchip Technology Inc. DS21459D- page 5
TC7129
TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)
Pin No.
40-Pin PDIP
36 34 40 DGND Internal ground reference for digital section. See Section 4.2.1
37 35 41 RANGE 3 μA pull-down for 200 mV scale. Pulled high externally for 2V
38 36 42 DP
39 37 43 DP
40 38 44 OSC2 Output of first clock inverter. Input of second clock inverter.
— 6,17, 28, 39 12, 23, 34, 1 NC No connection.
Pin No.
44-Pin PQFP
Pin No.
44-Pin PLCC
Symbol Function
“±5V Power Supply”.
scale.
2
1
Internal 3 μA pull-down. When high, decimal point 2 will be on.
Internal 3 μA pull-down. When high, decimal point 1 will be on.
DS21459D-page 6 © 2006 Microchip Technology Inc.
TC7129
3.0 DETAILED DESCRIPTION
(All pin designations refer to 40-pin PDIP.)
The TC7129 is designed to be the heart of a high-
resolution analog measurement instrument. The only
additional components required are a few passive
elements: a voltage reference, a LCD and a power
source. Most component values are not critical;
substitutes can be chosen based on the information
given below.
The basic circuit for a digital multimeter application is
shown in Figure 3-1. See Section 4.0 “Typical Appli-
cations”, for variations. Typical values for each
component are shown. The sections below give
component selection criteria.
3.1 Oscillator (X
The primary criterion for selecting the crystal oscillator
is to choose a frequency tha t achieves maxim um rejection of line frequency noise. To do this, the integration
phase should last an integral number of line cycles.
The integration phase of the TC7129 is 10,000 clock
cycles on the 200 mV range and 1000 clock cycles on
the 2V range. One cl ock c yc le is eq ua l to tw o os cil la t or
cycles. For 60 Hz rejection, the oscillator frequency
should be chosen so that the period of one line cycle
equals the integration time for the 2V range.
, CO1, CO2, RO)
OSC
The resistor and cap acitor values are not crit ica l; those
shown work for most applications. In some situations,
the capacitor values may have to be adjusted to
compensate for parasitic capacitance in the circuit. The
capacitors can be low-cost ceramic devices.
Some applications can use a simple RC network
instead of a crystal oscillator. The RC oscillator has
more potential for jitter, especially in the least
significant digit. See Section 4.5 “RC Oscillator”.
3.2 Integrating Resistor (R
The integrating resistor sets the charging current for
the integrating capacitor. Choo se a v alu e that provides
a current between 5μA and 20 μA at 2V, the maxim um
full-scale input. The typical value chosen gives a
charging current of 13.3 μA:
INT
)
EQUATION 3-1:
I
CHARGE
Too high a value for R
noise pickup and increases errors due to leakage
current. Too low a value degrades the linearity of the
integration, leading to inaccurate readings.
2V
=
INT
13.3 µA
150 kΩ
increases the sensitivity to
EQUATION 3-1:
1/60 second = 16.7 msec =
1000 clock cycles *2 OSC cycles/clock cycle
OSC Frequency
This equation gi ves an osc illa tor f requenc y of 120kHz.
A similar calculation gives an optimum frequency of
100 kHz for 50 H z rejection.
© 2006 Microchip Technology Inc. DS21459D- page 7
TC7129
Low Battery Continuity
V+
20
DP
4
/OR
DP
3
/UR
V
DISP
LATCH/
HOLD
V–
V+
+
INT IN
9V
13141516171819
Display Drive Outputs
CONTINUITY
COMMON
INT OUT
27262524232221
28
C
INT
0.1 µF
150 kΩ
10 kΩ
R
BIAS
12
TC7129
C
C
REF
REF
+
–
29
C
+
REF
1 µF
R
INT
9
1011
BUFF
IN LO
323130
– +
0.1
µF
C
V
IN HI
33
IF
IN
8
REF HI
R
IF
100 kΩ
REF LO
DGND
3534
36
R
REF
20
kΩ
ANNUNC
RANGE
DP
2
3837
D
REF
OSC3
DP
1
39
1234567
OSC1
OSC2
40
C
RF
0.1 µF
5 pF
120
kHz
330 kΩ
R
O
10 pF
V+
C
O1
Crystal
C
O2
Figure 3-1: Standard Circuit.
3.3 Integrating Capacitor (C
The charge stored in the integrating capacitor during
the integrate phase is directly proportional to the input
voltage. The primary selection criterion for C
choose a value that gives the highest voltage swing
while remaining within the high-linearity portion of the
integrator output ran ge. An integrat or swing of 2V i s the
recommended value. The capacitor value can be
calculated using the following equation:
INT
)
is to
INT
EQUATION 3-1:
x I
t
INT
V
SWING
INT
Where t
C
=
INT
is the integration time.
INT
Using the values derived above (assuming 60 Hz
operation), the equation becomes:
EQUATION 3-2:
C
16.7 msec x 13.3 μA
= = 0.1 μA
INT
2V
The capacitor should have low dielectric absorption to
ensure good integration linearity. Polypropylene and
Teflon® capacitors are usually suitable. A good
measurement of the dielectric absorption is to connect
the reference capacitor across the inputs by
connecting:
Pin-to-Pin:
20 → 33 (C
30 → 32 (C
+ to IN HI)
REF
– to IN LO)
REF
A reading between 10,000 and 9998 is acceptable;
anything lower indicates unacceptably high dielectric
absorption.
3.4 Reference Capacitor (C
REF
)
The reference capacitor stores the reference voltage
during several phases of the measurement cycle. Low
leakage is the primary selection criterion for this component. The value must be high enough to offset the
effect of stray cap acit anc e at the c ap acito r terminals . A
value of at least 1 μF is recommended.
DS21459D-page 8 © 2006 Microchip Technology Inc.
3.5 Voltage Reference
(D
, R
REF
REF
, R
The reference potentiometer (R
BIAS
, CRF)
) provides an
REF
adjustment for adjusting the reference voltage; any
value above 20 kΩ is adequate. The bias resistor
) limits the current through D
(R
BIAS
150 μA. The reference filter capacitor (C
RC filter with R
to help eliminate noise.
BIAS
to less than
REF
) forms an
RF
3.6 Input Filter (RIF, CIF)
For added stability, an RC input noise filter is usually
included in the circuit. The input filter resistor value
should not exceed 100 kΩ. A typical RC time constant
value is 16.7 msec to help reject line frequency noise.
The input filter capacitor should have low leakage for a
high-impedance input.
+5V
0.1 µF
0.1 µF
0.1 µF
36
DGND
TC7129
24
V+
REF HI
REF LO
COMMON
IN HI
IN LO
V–
23
TC7129
34
35
28
33
V
32
IN
+
–
3.7 Battery
The typical circuit uses a 9V battery as a power so urce.
However , a ny v alue b etwee n 6V a nd 12V can b e use d.
For operation from batteries with voltages lower than
6V and for operation from power supplies, see
Section 4.2 “Powering the TC7129”.
4.0 TYPICAL APPLICATIONS
4.1 TC7129 as a Replacement Part
The TC7129 is a direct pin-f or-pi n rep lac ement part for
the ICL7129. Note , howev er, that the ICL7129 require s
a capacitor an d resistor between pins 26 and 28 for
phase compensation. Since the TC7129 uses internal
phase compensat ion, these p art s are not requir ed and,
in fact, must be removed from the circuit for stable
operation.
4.2 Powering the TC7129
While the most common power source for the TC7129
is a 9V battery, there are other possibilities. Some of
the more common ones are explained below.
4.2.1 ±5V Power Supply
Measurements are made with respect to power supply
ground. DGND (pin 36) is set intern ally to about 5V less
than V+ (pin 24); it is not i ntende d to be a pow er su pply
input and must not be tied directly to power supply
ground. It can be used as a refe rence for externa l logic,
as explaine d i n Section 4.3 “Connecting to External
Logic”, (see Figure 4-1).
-5V
Figure 4-1: Powering the TC7129 From
a ±5V Pow er Supply.
4.2.2 Low Voltage Battery Source
A battery with voltage between 3.8V and 6V can be
used to power the TC7129 when used with a voltage
doubler circuit, as shown in Figure 4-2. The voltage
doubler uses the TC7660 DC-to-DC voltage converter
and two external capacitors.
24
+
3.8V
to
6V
8
TC7660
3
2
4
5
36
+
10 µF
+
V+
REF HI
DGND
REF LO
COMMON
TC7129
V–
10 µF
IN HI
IN LO
23
34
35
28
33
32
+
V
IN
–
Figure 4-2: Powering the TC7129 From
a Low-Voltage Battery.
© 2006 Microchip Technology Inc. DS21459D- page 9
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