• Latch-Up Protected: Will Withstand >1.5A
Reverse Output Current
• Logic Input Will Withstand Negative Swing Up To
5V
• ESD Protected: 4 kV
• Matched Rise and Fall Times:
- 25 ns (2500 pF load)
• High Peak Output Current: 6A
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• High Capacitive Load Drive Capability: 10,000pF
• Short Delay Time: 55 ns (typ.)
• CMOS/TTL Compatible Input
• Low Supply Current With Logic ‘1’ Input:
-450µA (typ.)
• Low Output Impedance: 2.5Ω
• Output Voltage Swing to Within 25 mV of Ground
or V
DD
• Space-Saving 8-Pin SOIC and 8-Pin 6x5 DFN
Packages
Applications
General Description
The TC4420/TC4429 are 6A (peak), single-output
MOSFET drivers. The TC4429 is an inverting driver
(pin-compatible with the TC429), while the TC4420 is a
non-inverting driver. These drivers are fabricated in
CMOS for lower power and more efficient operation
versus bipolar drivers.
Both devices have TTL/CMOS compatible inpu ts that
can be driven as high a s V
without upset or damage to th e device. T his elimi nates
the need for external level-shifting circuitry and its
associated cost and size. The output swing is rail-to-rail,
ensuring better dri ve voltage margin, espe cially during
power-up/power-down sequencing. Propagational
delay time is only 55 ns (typ.) and the output rise and fall
times are only 25 ns (typ.) into 2500 pF across the
usable power supply range.
Unlike other drivers, the TC4420/TC4429 are virtually
latch-up proof. They replace three or more discrete
components, saving PCB area, parts and improving
overall system reliability.
+ 0.3V or as low as –5V
DD
• Switch-Mode Power Supp lie s
• Motor Controls
• Pulse Transformer Driver
• Class D Switching Amplifiers
Package Types
8-Pin CERDIP/
(1)
TC4420 TC4429
PDIP/SOIC
V
1
V
1
DD
TC4420
2
INPUT
TC4429
3
NC
4
GND
Note 1: Duplicate pins must both be connected for proper operation.
2: Exposed pad of the DFN package is electrically isolated.
† Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Input Voltage..................................– 5V to VDD + 0.3V
Input Current (VIN > VDD)...................................50 mA
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V ≤ V
ParametersSymMinTypMaxUnitsConditions
Temperature Ranges
Specified Temperature Range (C)T
Specified Temperature Range (I)T
Specified Temperature Range (E)T
Specified Temperature Range (V)T
Maximum Junction TemperatureT
Storage Temperature RangeT
Note:The graphs and ta bles provided followi ng thi s n ote are a statistical s umm ar y based on a limite d n um ber of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
120
100
C = 10,000 pF
80
60
Time (nsec)
40
20
0
579111315
Supply Voltage (V)
L
C = 4700 pF
L
C = 2200 pF
L
FIGURE 2-1:Rise Time vs. Supply
Voltage.
100
80
60
V = 5V
1000
DD
V = 12V
DD
Capcitive Load (pF)
V = 18V
DD
10,000
40
Time (nsec)
20
10
100
80
C = 10,000 pF
60
40
Time (nsec)
20
0
57 9111315
Supply Voltage (V)
L
C = 4700 pF
L
C = 2200 pF
L
FIGURE 2-4:Fall Time vs. Supply
Voltage.
100
80
60
40
V = 5V
DD
V = 12V
Time (nsec)
20
10
1000
DD
Capacitive Load (pF)
V = 18V
DD
10,00
FIGURE 2-2:Rise Time vs. Capacitive
Load.
50
C = 2200 pF
L
V = 18V
DD
40
t
D2
30
20
Delay Time (nsec)
10
0
t
D1
–60–202060100
TA (°C)
140
FIGURE 2-3:Propagation Delay Time vs.
Temperature.
FIGURE 2-5:Fall Time vs. Capacitive
Load.
84
V = 15V
DD
70
56
42
28
Supply Current (mA)
14
0
01001000
500 kHz
200 kHz
Capacitive Load (pF)
20 kHz
10,000
FIGURE 2-6:Supply Current vs.
Capacitive Load.
2004 Microchip Technology Inc.DS21419C-page 5
TC4420/TC4429
5
Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
50
C = 2200 pF
L
V = 18V
DD
40
30
20
Time (nsec)
10
0
t
FALL
t
RISE
–60–202060100
TA (°C)
140
FIGURE 2-7:Rise and Fall Times vs.
Temperature.
65
60
55
t
50
45
Delay Time (nsec)
40
35
4 6 81012141618
D2
t
D1
Supply Voltage (V)
5
100 mA
10 mA
5913
7111
50 mA
Supply Voltage (V)
OUT
R ( )Ω
4
3
2
FIGURE 2-10:High-State Output
Resistance vs Supply Voltage.
200
Load = 2200 pF
160
120
Input 2.4V
Input 3V
80
Delay Time (nsec)
40
0
Input 5V
Input 8V and 10V
56711 13
8 9 101214
V (V)
DD
15
FIGURE 2-8:Propagation Delay Time vs.
Supply Voltage.
1000
C = 2200 pF
L
100
10
Supply Current (mA)
0
01001000
Frequency (kHz)
18V
10V
5V
10,000
FIGURE 2-9:Supply Current vs.
Frequency.
FIGURE 2-11:Effect of Input Amplitude on
Propagation Delay.
2.5
2
OUT
R ( )Ω
1.5
1
5913
71115
Supply Voltage (V)
100 mA
50 mA
10 mA
FIGURE 2-12:Low-State Output
Resistance vs. Supply Voltage.
DS21419C-page 6 2004 Microchip Technology Inc.
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