MICROCHIP TC1320 Technical data

TC1320
T
8-Bit Digital-to-Analog Converter with Two-Wire Interface
Features
• 8-bit Digital-to-Analog Converter
•±2LSBINL
• ±0.8 LSB DNL
• 2.7-5.5V Single Supply Operation
• Low Power: 350µA Operation, 0.5µA Shutdown
• 8-Pin SOIC and 8-Pin MSOP Packages
2
CTMSerial Interface
Applications
• Programmable VoltageSources
• Digital Controlled Amplifiers/Attenuators
• Process Monitoring and Control
Device Selection Table
Part
Number
TC1320EOA 8-Pin SOIC (N arrow) -40°C to +85°C TC1320EUA 8-Pin MSOP -40°C to +85°C
Package
Temperature
Range
General Description
TheTC1320isa seriallyaccessible8-bitvoltage output digital-to-analog converter (DAC). The DAC produces an output voltage that ranges from ground to an exter­nallysuppliedreferencevoltage.Itoperates from a sin­gle power supply that can range from 2.7V to 5.5V, making it ideal for a wide range of applications. Built into the part is a Power-on Reset function that ensures that the device starts at a known condition.
Communicationwith the TC1320 is accomplishedviaa simple 2-wire SMBus/I theTC1320 actingas a slave only device. The host can enablethe SHDN bit in the CONFIG register to activate the Low Power Standby mode.
2
C™ compatible serial port with
Package Type
8-Pin MSOP and
8-Pin SOIC (Narrow)
V
1
REF
27
SDA
SCL
GND
TC1320
36
45
V
8
DAC-OUT
NC
V
DD
OUT
Typical Application
V
IN
V
DD
(8)
TC1320
V
V
REF
2002 Microchip TechnologyInc. DS21386B-page 1
(1)
Serial Port
(3)
SCLK
Microcontroller
DAC
(2)
(2)
SDAT
OUT
(5)
+
V
ADJUS
TC1320
T
Functional Block Diagram
V
DD
Configuration Register
TC1320
SDA
SCL
Serial Port
Interface
Data Register
Control
DAC
V
REF
GND
DAC-OU
V
OUT
DS21386B-page 2
2002 Microchip TechnologyInc.
TC1320
1.0 ELECTRICAL CHARACTERISTICS
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of t he device at these or any other conditions above those indicated in the
Absolute Maximum Ratings*
Supply Voltage (VDD).............................................+6V
Voltage on any Pin..(GND – 0.3V) to (V
DD
+0.3V)
operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affectdevice reliability.
Current on any Pin............................................ ±50mA
Package Thermal Resistance(θ Operating Temperature (T StorageTemperature (T
A
STG
)............ 330°C C/W
JA
)........................ See Below
)..............-65°C to +150°C
TC1320 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VDD= 2.7V to 5.5V, -40°CTA≤ +85°C,V
Symbol Parameter Min Typ Max Unit Test Conditions
Power Supply
V
DD
I
DD
I
DD-STANDBY
Supply Voltage 2.7 350 500 µA Operating Current 0.35 0.5 mA VDD=5.5V,V
Standby SupplyCurrent 0.1 1 µAVDD=3.3V
Static Performance - Analog Section
Resolution 8 Bits
INL Integral Non-Linearity at FS, T
= +25°C ±2 LSB (Note 2)
A
FSE Full Scale Error ±3 %FS DNL Differential Non-Linearity, T V
OS
TCV
OS
Offset Error at V
OUT
Offset Error Tempco at V
= +25°C ±0.8 LSB All Codes (Note 2)
A
—±0.3 ±8 mV(Note 2)
OUT
—10 —µv/°C PSRR Power Supply Rejection Ratio 80 dB V V I
REF
V R I
OUT
I
SC
REF
SW OUT
Voltage Reference Range 0 VDD–1.2 V Reference Input Leakage Current ±1.0 µA Voltage Swing 0 V Output Resistance @ V
OUT
—5 — R
Output Current(Source or Sink) 2 mA Output Short-Circuit Current
V
=5.5V
DD
Dynamic Performance
SR VoltageOutputSlewRate 0.8 V/µs t
SETTLE
t
WU
Output Voltage Full Scale Settling Time 10 µsec Wake-up Time 20 µs Digital Feed Through and Crosstalk 5 nV-s SDA = V
Serial Port Interface
V
IH
V
IL
V
OL
C
IN
I
LEAK
Note 1: SDA and SCL must be connected to V
LogicInputHigh 2.4 V Logic Input Low 0.6 — SDA OutputLow
Input Capacitance SDA, SCL 5 0.4 pF I/O Leakage ±1.0 µA
or GND.
2: Measured at V
50mV referredto GND to avoid output buffer clipping.
OUT
DD
= 1.2V unless otherwise noted.
REF
REF
30 20
— —
50 50
0.4
0.6
mAmASource
DD
Serial Port Inactive (Note 1)
REF
Serial Port Inactive (Note 1)
at DC
DD
VV
(VDD–1.2V)
REF
()
OUT
Sink
,SCL=100kHz
DD
V
VVIOL= 3mA (Sinking Curre nt)
I
=6mA
OL
=1.2V
2002 Microchip TechnologyInc. DS21386B-page 3
TC1320
TC1320 ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: VDD= 2.7V to 5.5V, -40°CTA≤ +85°C,V
Symbol Parameter Min Typ Max Unit Test Conditions
Serial Port AC Timing
f
SMB
t
IDLE
t
H(START)
t
SU(START)
t
SU(STOP)
t
H-DATA
t
SU-DATA
t
LOW
t
HIGH
t
F
t
R
t
POR
Note 1: SDA and SCL must be connected to V
SMBus Clock Frequency 10 100 kHz BusFreeTimePriortoNewTransition 4.7 µsec START Condition Hold Time 4.0 µsec START Condition Setup Time 4.7 µsec 90%SCLto10%SDA
STOP Condition Setup Time 4.0 µsec Data In Hold Time 100 nsec Data In Setup Time 100 nsec Low Clock Period 4.7 µsec 10% to 10% High Clock Period 4 µsec 90% to 90% SMBus Fall Time 300 nsec 90% to 10% SMBus Rise Time 1000 nsec 10% to 90% Power-on Reset Delay 500 µsec VDD ≥ V
or GND.
2: Measured at V
50mV referredto GND to avoid output buffer clipping.
OUT
DD
= 1.2V unless otherwise noted.
REF
(forRepeated START Condition)
(Rising Edge)
POR
DS21386B-page 4
2002 Microchip TechnologyInc.
2.0 PIN DESCRIPTIONS
ThedescriptionsofthepinsarelistedinTable2-1.
TABLE 2-1: PIN F UNCTION TABLE
Pin Number Symbol T ype Description
1V 2 SDA Bi-Directional Bi-directional. Serial data is transferred on the SMBus in both directions
3 SCL Input Input. SMBus serial clock. Clocks data into and out of the TC1320. 4 GND Power Ground. 5V
6 NC None No connection. 7 DAC-OUT Output Output. Unbuffered DAC output voltage. This voltage is a function of the
8V
REF
OUT
DD
Input Input. Voltage Reference Input can range from 0V to 1.2V below VDD.
usingthispin.
Output Output. Buffered DAC output voltage. This voltage is a function of the
reference voltageandthe contents of the DATA register.
reference voltageandthe contents of the DATA register. This outputis unbuffered and care must be taken that the pin is connectedonlyto a high-impedancenode.
Power Positive power supply input. See electrical specifications.
TC1320
2002 Microchip TechnologyInc. DS21386B-page 5
TC1320
y
3.0 DETAILED DESCRIPTION
The TC1320 is a monolithic 8-bit digital-to-analog con­verter, that is designed to operate from a single supply that can range from 2.7V to 5.5V. The DAC consists of a data register (DATA), a configuration register (CONF), and a current output amplifier. The TC1320 uses an external reference, which also determines the maximum output voltage.
The TC1320 uses a currentsteeringDAC, based on an array of matched current sources. This current,alonga precision resistor, converts the contents of the Data Register and V by:
3.1 Reference Input
The r eference pin, V inputand because of this,theload regulationof the ref­erencesourceneedsonlytobeabletotolerate leakage levels of current (less than 1µA). V age r ange from 0 to (V typically 10pF.
into an output voltage, V
REF
V
OUT=VREF
(DATA/256)
, is a buffered high-impedance
REF
– 1. 2V). Input capacitance is
DD
accepts a volt-
REF
OUT
given
3.2 O utput Amplifier
The TC1320 DAC output is buffered with an internal unitygainrail-to-rail input/outputamplifier,withatypical slew rate of 0.8V/µsec. Maximum full scale t ransition settling time is 10µsec to within ±1/2LSB when loaded with 1kin parallel with 100pF.
3.3 Standby Mode
The TC1320 allows the host to put it into a Low Power (I
=0.5µA, typical) Standby mode. In this mode, the
DD
D/A conversion is halted. The SMBus port operates normally. Standby mode is enabled by setting the SHDN bit in the CONFIG register. The table below summarizes this operation.
TABLE 3-1: STANDBY MODE OPERATION
SHDN Bit Operating Mode
0Normal 1 Standby
3.4 SMBus Slave Address
The TC1320 is internally programmedto have a default SMBus address value of 1001 000b. Seven other addresses are available by custom order (contact fac­tory).SeeFigure 3-1 for locating addressbitsinSMBus protocol.
FIGURE 3-1: SMBus PROT OCOLS
Write 1-Byte Format
S
Read 1-Byte Format
Address R/W
S
Slave Address
Receive 1-Byte Format
S
S = START Condition P = STOP Condition Shaded = Slave Transmission
Address R/W
0
Slave Address Command Byte: selects
ACK
7-Bits
Address R/W ACK
7-Bits 1
0
8-Bits
Command Byte: selects which register you are reading from.
Data NACK P
8-Bits
Data Byte: reads data from the register commanded by the last Read Byte or Write
te transmission.
B
ACK
which register you are writing to.
ACKCommand
Command
8-Bits7-Bits
Address R/W ACK
S
7-Bits
Slave Address: repeated due to change in data flow direction.
ACK
Data
8-Bits
Data Byte: data goes into the register set by the command byte.
1
8-Bits
Data Byte: reads from the register set by the command byte.
Data
ACK P
NACK
P
DS21386B-page 6
2002 Microchip TechnologyInc.
TC1320
4.0 SERIAL PORT OPERATION
The Serial Clock input (SCL) and bi-directional data port (SDA) form a 2-wire bi-directional serial port for programming and interrogating the TC1320. The followingconventionsare used i n this bus ar chitecture:
TABLE 4-1: TC1320 SERIAL BUS
CONVENTIONS
Term Explanation
Transmitter The device sendingdatatothe bus. Receiver The devicereceiving data from the bus. Master The device which controls the bus: initiating
transfers (START), generating the clock, and
terminating transfers (STOP). Slave The device addressed by the master. START A unique condition signaling the beginning of
a transfer indicated by SDA falling
(High - Low) while SCL is high. STOP A uniquecondition signaling the end of a
ACK A Receiver Acknowledges the receipt of each
Busy Communication is not possible becausethe
Not Busy Whenthe bus is IDLE, bothSDAandSCLwill
DataValid The stateof SDA must remain stableduring
All transfers take place under control of a host, usually a CPU or microcontroller, acting as the Master, which provides the clock signal f or all transfers. The TC1320 always operates as a Slave. The serialprotocol is illus­tratedinFigure 3-1. All datatransfershavetwophases; all bytes are transferred MSB first. Accesses are initi­ated by a START condition (START), followed by a device address byte and one or more data bytes. The device address byte includes a Read/Write bit. Each access must be terminated by a STOP Con­dition (STOP). A convention called Acknowledge (ACK)confirmsreceiptof eachbyte.NotethatSDAcan change only during periods when SCL is LOW (SDA changes while SCL is HIGH is reservedforSTART and STOP Conditions).
transfer indicatedby SDA rising (Low - High)
while SCL is high.
byte withthisunique condition.TheReceiver
drives SDA low during SCL high of the ACK
clockpulse. The Master provides the clock
pulse for the ACK cycle.
busisinuse.
remain high.
theHighperiodofSCLinorderforadatabit
to be considered valid. SDA only changes
state while SCL is lowduringnormal data
transfers. (See START and STOP conditions.)
selection
4.1 START Condition (START)
The TC1320 continuously monitors the SDA and SCL lines for a STARTcondition (a HIGH to LOW transition of SDA while SCL is HIGH), and will not respond until this condition is met.
4.2 Address Byte
Immediately following the START Condition, the host must transmit the address byte to the TC1320. The 7-bit SMBus address for the TC1320 is 1001000.The 7-bit address transmitted in the serial bit stream must match for the TC1320to respond with an Acknowledge (indicating the TC1320 is on the bus and ready to accept data). The eighth bit in the Address Byte is a Read/Write
bit. This bit is a 1 for a read operation, or 0 for a write operation. During the first phase of any transfer, this bit will be set = 0 to indicate t hat the command byte is being written.
4.3 Acknowledge (ACK)
Acknowledge (ACK) provides a positive handshake between the host and the TC1320. The host releases SDA aftertransmittingeight bits, then generatesaninth clockcycletoallowtheTC1320topulltheSDAline LOW to Acknowledge that it successfully received the previous eight bits of data or address.
4.4 Data Byte
After a successful ACK of the address byte, the host must transmit the data byte to be written, or clock out the data to be read. (See the appropriate timing dia­grams.) ACK will be generatedafter a successful wr ite of a data byte into the TC1320.
4.5 STOP Condition (STOP)
Communications must be terminated by a STOP con­dition (a LOW to HIGH transition of SDA while SCL i s HIGH). The STOP Condition must be communicated by the transmitter to the TC1320. Refer to Figure 4-1, Timing Diagrams for serial bus timing.
2002 Microchip TechnologyInc. DS21386B-page 7
TC1320
FIGURE 4-1: TIMING DIAGRAMS
SMBus Write Timing Diagram
I
LOW
B
I
HIGH
CDEFG H
A
SCL
SDA
IJ
K
t
SU(START)tH(START)
A = START Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave
t
SU-DATA
E = Slave Pulls SDA Line Low F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Master H = LSB of Data Clocked into Master
SMBUS Read Timing Diagram
I
LOW
t
H(START)
B
I
HIGH
CDEFG HIJ
t
SU-DATA
F = Acknowledge Bit Clocked into Master G = MSB of Data Clocked into Slave H = LSB of Data Clocked into Slave I = Slave Pulls SDA Line Low
A
SCL
SDA
t
SU(START)
A = START Condition B = MSB of Address Clocked into Slave C = LSB of Address Clocked into Slave D = R/W Bit Clocked into Slave E = Slave Pulls SDA Line Low
4.6 Register Set and Programmer’s Model
TABLE 4-2: TC1320 COMMAND SET
(SMBus READ_BYTE AND WRITE_BYTE)
Command Byte Description
Command Code Function
RWD 00h Read/Write
RWCR 01h Read/Write
(CONFIG)
Data (DATA) Configuration
t
SU(STOP)tIDLE
I = Acknowledge Clock Pulse J = STOP Condition K = New START Condition
M
t
)
IDLE
t
H-DATA
J = Acknowledge Clocked into Master K = Acknowledge Clock Pulse L = STOP Condition, Data Executed by Slave M = New START Condition
KL
t
SU(STOP
TABLE 4-3: CONFIGURATION REGISTER
(CONFIG), 8-BIT, READ/WRITE
Configuration Register (CONFIG)
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
Reserved SHDN
Bit POR Function Type Operation
D[0] 0 Standby Switch Read/
D[7]-D[1] 0 Reserved;
Always returns Zero when Read
1 = Standby 0=Normal
Write
N/A N/A
DS21386B-page 8
2002 Microchip TechnologyInc.
TC1320
TABLE 4-4:
DATA REGISTER (DATA), 8-BIT, READ/WRITE
Data Register (DATA)
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
MSBXXXXXXLSB
The DAC output voltage is a function of referencevolt­ageandthebinaryvalueofthecontentsoftheDatareg­ister. The transfer function is given by the expression:
EQUATION 4-1:
DATA
V
OUT
=
V
REF
x
---------------- ­256
4.7 Register Set Summary
The TC1320’s register set is summarized in Table4-5 below.All registers are 8-bits wide.
TABLE 4-5: TC1320 REGISTER S E T
SUMMARY
Name Description POR State Read Write
Data Data Register 0000 0000b XX
Config CONFIG Register 0000 0000b XX
2002 Microchip TechnologyInc. DS21386B-page 9
TC1320
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
Package marking data not available at this time.
5.2 Taping Forms
Component Taping Orientation for 8-Pin MSOP Devices
PIN 1
User Direction of Feed
W
P
Standard Reel Component Orientation for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size
8-Pin MSOP 12 mm 8 mm 2500 13 in
Component Taping Orientation for 8-Pin SOIC (Narrow) Devices
User Direction of Feed
PIN 1
W
DS21386B-page 10
P
Standard Reel Component Orientation for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size
8-Pin SOIC (N) 12 mm 8 mm 2500 13 in
2002 Microchip TechnologyInc.
5.3 Package Dimensions
.
8
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
)
C
8-Pin MSOP
TC1320
PIN 1
.026 (0.65) TYP.
.016 (0.40) .010 (0.25)
-Pin SOI
.122 (3.10) .114 (2.90)
.006 (0.15) .002 (0.05)
.122 (3.10) .114 (2.90)
.197 (5.00) .189 (4.80)
.043 (1.10)
MAX.
6° MAX.
.008 (0.20) .005 (0.13)
.028 (0.70) .016 (0.40)
Dimensions: inches (mm)
.157 (3.99 .150 (3.81
.050 (1.27) TYP
.197 (5.00 .189 (4.80
.020 (0.51 .013 (0.33
2002 Microchip TechnologyInc. DS21386B-page 11
.010 (0.25 .004 (0.10
.244 (6.20 .228 (5.79
.069 (1.75 .053 (1.35
.010 (0.25 .007 (0.18
.050 (1.27 .016 (0.40
Dimensions: inches (mm)
TC1320
SALES AND SUPPORT
Data Sheets
Products supportedby a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom­mendedworkarounds.To determine if an errata sheet exists for a particulardevice, please contactoneof the following:
1. Your local Microchip sales office
2. The MicrochipCorporate Literature Center U.S. FAX:(480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com) Pleasespecify which device, revision of silicon and Data Sheet (includeLiterature#) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS21386B-page 12
2002 Microchip TechnologyInc.
TC1320
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical com­ponents in life support systems is not authorized except with express written approval by Microchip. No licenses are con­veyed, implicitly or otherwise, under any intellectual property rights.
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The Microchip name and logo, the Microchip logo, FilterLab, K
EELOQ,microID,MPLAB,PIC,PICmicro,PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
SolutionsCompany areregiste red trademarksof MicrochipTech­nologyIncorp or ated in the U.S.A. and other countries .
dsPIC, ECONOMONITOR, FanSense, FlexR OM , fuzz yLA B, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM .n et , rfPIC, Select Mode and TotalEndurancearetrademarksofMicrochipTechnology Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark of Microchip TechnologyIncorporated in t he U.S.A.
All other trademarks mentioned herein are property of their respective companies.
© 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View,California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its
®
PICmicro devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systemsisISO 9001certified.
2002 Microchip TechnologyInc. DS21386B-page 13
8-bit MCUs, KEELOQ®code hopping
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03/01/02
DS21386B-page 14
*DS21386B*
2002 Microchip Technology Inc.
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