• Debounced Manual Reset Input for External
Override
Applications
• Computers
• Controllers
• Intelligent Instruments
• Automotive Systems
• Critical µP Power Monitoring
General Description
The TC1232 is a fully-integrated processor supervisor
that provides three important functions to safeguard
processor sanity: precision power on/off reset control,
watchdog timer and external reset override.
On power-up, the TC1232 holds the processor in the
reset state for a minimum of 250 msec after V
within tolerance to ensure a stable system start-up.
Microprocessor sanity is monitored by the on-board
watchdog circuit. The microprocessor must provide a
periodic low-going signal on the ST
processor fail to supply this signal within the selected
time-out period (150 msec, 600 msec or 1200 msec),
an out-of-control processor is indicated and the
TC1232 issues a processor reset as a result.
The outputs of the TC1232 are immediately driven
active when the PB input is brought low by an external
push-button switch or other electronic signal. When
connected to a push-button switch, the TC1232
provides contact debounce.
The TC1232 is packaged in a space-saving 8-Pin PDIP
or SOIC package and a 16-Pin SOIC (Wide) package
and requires no external components.
input. Should the
CC
is
Package Types
16-Pin SOIC Wide8-Pin PDIP8-Pin SOIC
1
V
PB RST
2003 Microchip Technology Inc.DS21370B-page 1
18
TD
TOL
GND
2
3
4
TC1232
7
6
5
CC
ST
RST
RST
PB RST
TOL
18
18
TD
27
TC1232
TC1232
36
36
45
45
V
CC
ST
RST
RSTGND
NC
PB RST
NC
TD
NC
TOL
NC
GND
2
3
4
5
6
7
8
TC1232
16
NC
V
15
CC
NC
14
13
ST
NC
12
RST
11
NC
10
RST
9
TC1232
Functional Block Diagram
V
CC
TOL
PB RST
TD
5%/10%
Tol er an ce
Select
Debounce
Watchdog
Time ba se
Select
+
–
+
+
V
REF
–
Reset
Generator
RST
RST
TC1232
Watchdog
Time r
GND
ST
DS21370B-page 2 2003 Microchip Technology Inc.
TC1232
1.0ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
Voltage on Any Pin (With Respect to GND)
...................................................... -0.3V to +5.8V
† Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at
these or any other conditions above those indicated in the
operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended
periods may affect device reliability.
Operating Temperature Range
C-Version ........................................ 0°C to +70°C
E-Version ..................................... -40°C to +85°C
Storage Temperature Range ............. -65°C to +150°C
DC CHARACTERISTICS
= T
Electrical Specifications: Unless otherwise noted, T
A
ParametersSymMinTypMaxUnitsConditions
Supply VoltageV
and PB RST Input High LevelV
ST
ST
and PB RST Input Low LevelV
Input Leakage ST
, TOLI
Output Current RSTI
Current RST, RST
Operating CurrentI
V
5% Trip PointV
CC
V
10% Trip PointV
CC
CC
IH
IL
L
OH
I
OL
CC
CCTP
CCTP
4.55.05.5V
2.0—VCC +0.3VNote 1
-0.3—+0.8V
-1.0—+1.0µA
-1.0-12—mAVOH = 2.4V
2.010—mAVOL = 0.4V
—50200µANote 2
4.504.624.74VTOL = GND (Note 3)
4.254.374.49VTOL = VCC (Note 3)
Capacitance Electrical Characteristics: Unless otherwise noted, T
Input Capacitance ST
Output Capacitance RST, RST
, TOLC
C
IN
OUT
—— 5 pF
—— 7 pF
AC Electrical Characteristics: Unless otherwise noted, T
PB RST
PB RST
Delayt
Reset Active Timet
Pulse Widtht
ST
ST
Time-out Periodt
t
PB
PBD
RST
ST
TD
20——msec Figure 3-3(Note 5)
1420msec Figure 3-3
2506101000msec
20——nsec Figure 3-4
62.5150250msec TD Pin = 0V, Figure 3-4
2506001000msec TD Pin = Open, Figure 3-4
50012002000msec TD Pin = V
VCC Fall Timet
V
Rise Time t
CC
V
Detect to RST High and
CC
Low
RST
V
Detect to RST High and
CC
Open
RST
Note 1: PB RST
is internally pulled up to Vcc with an internal impedance of typically 40 kΩ.
t
RPD
t
RPU
F
R
10——µsec Figure 3-5, (Note 4)
0— —µsecFigure 3-6, (Note 4)
——100nsec Figure 3-7, VCC Falling
2506101000msec Figure 3-8, VCC Rising, (Note 6)
2: Measured with outputs open.
3: All voltages referenced to GND.
4: Ensured by design.
= 5 µsec.
R
must be held low for a minimum of 20 msec to ensure a reset.
5: PB RST
6: t
MIN
A
= T
to T
MIN
; VCC = +4.5V to 5.5V.
MAX
= +25°C
A
to T
. (Note 4)
; VCC = +5V to ±10%.
MAX
Figure 3-4
CC,
2003 Microchip Technology Inc.DS21370B-page 3
TC1232
2.0PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin No.
(8-pin PDIP, SOIC)
12PB RST
24TDTime Delay Set. The watchdog time-out select input (t
36TOLTolerance Input. Connect to GND for 5% tolerance or to V
48GNDGround.
59RSTReset Output (Active-High) – goes active:
611
713
815V
—1,3,5,7,10,12,16NCNo internal connection.
Pin No.
(16-pin SOIC)
SymbolFunction
Push-button Reset Input. A debounced active-low input that ignores pulses
less than 1 msec in duration and is ensured to recognize inputs of 20 msec or
greater.
0V,
t
= 600 msec for TD = open, tTD = 1.2 sec for TD = VCC).
TD
1.If V
2.If PB RST
3.If ST
4.During power-up
RSTReset output (active-low, open-drain) – see RST.
STStrobe input. Input for watchdog timer.
The +5V power-supply input.
CC
TD
falls below the selected reset voltage threshold.
CC
is forced low.
is not strobed within the minimum time-out period.
= 150 msec for TD =
for 10% tolerance.
CC
DS21370B-page 4 2003 Microchip Technology Inc.
TC1232
3.0DETAILED DESCRIPTION
3.1Power Monitor
The TC1232 provides the function of warning the processor of a power failure. When V
being below the voltage levels defined by the TOL pin,
the TC1232’s comparator outputs the RST and RST
signals to a logic level that warns the system of an outof-tolerance power supply. The RST and RST
switch at a threshold value of 4.5V if TOL is tied to V
and at a value of 4.75 volts if TOL is grounded. The
RST and RST
signals are held active for a minimum of
250 msec to ensure that the power supply voltage has
been stabilized.
3.2Push-Button Reset Input
The debounced manual reset input (PB RST) manually
forces the reset outputs into their active states. Once
PB RST
delay time) the reset outputs go active. The reset
outputs remain in their active states for a minimum of
250 msec after PB RST
A mechanical push-button or active logic signal can
drive the PB RST
input pulses less than 1 msec and ecognizes pulses of
20 msec or greater. No external pull-up resistor is
required
pull-up to
has been low for a time t
rises above VIH (Figure 3-3).
input. The debounced input ignores
because the PB RST input has an internal
of approximately 100 µA.
VCC
is detected as
CC
(the push-button
PBD
signals
CC
3.4Supply Monitor Noise Sensitivity
The TC1232 is optimized for fast response to negativegoing changes in V
amount of electrical noise on V
using relays) may require a 0.01 µF or 0.1 µF bypass
capacitor to reduce detection sensitivity. This capacitor
should be installed as close to the TC1232 as possible
to keep the capacitor lead length short.
+5V
V
PB RST
FIGURE 3-1:Push-Button Reset.
. Systems with an inordinate
DD
CC
TC1232
GND
TD
ST
RST
TOL
(such as systems
DD
I/O
processor
Reset
Micro-
3.3Watchdog Timer
When the ST input is not stimulated for a preset time
period, the watchdog timer function forces RST and
RST
signals to the active state. The preset time period
is determined by the TD
connected to ground, 600 msec with TD floating, or
1200 msec with TD connected to V
watchdog timer starts timing-out from the set time
period as soon as RST and RST
to-low transition occurs on the ST input pin prior to
time-out, the watchdog timer is reset and begins to
time-out again. If the watchdog timer is allowed to timeout, then the RST and RST
active state for 250 msec minimum (Figure 3-2).
The software routine that strobes ST
code must be in a section of software that is executed
frequently enough so the time between toggles is less
than the watchdog time-out period. One common
technique controls the µP I/O line from two sections of
the program. The software might set the I/O line high
while operating in the foreground mode and set it low
while in the background or interrupt mode. If both
modes do not execute correctly, the watchdog timer
issues reset pulses.
inputs to be 150 msec with TD
(typical). The
CC
are inactive. If a high-
signals are driven to the
is critical. The
+5V
10 kΩ
0.1
µF
+5V
V
CC
TC1232
TOL GND
TD
RST
ST
RESET
processor
I/O
3-Terminal
Regulator
FIGURE 3-2:Watchdog Timer.
Micro-
2003 Microchip Technology Inc.DS21370B-page 5
TC1232
t
PB
V
IL
Input.
t
PBD
V
IH
t
RST
PB RST
RST
RST
The debounced PB RST input ignores input pulses less
than 1 msec and is designed to recognize pulses of
20 msec or greater.
FIGURE 3-3:Push-Button Reset –
PB RST
t
F
V
CC
+4.75V
+4.25V
FIGURE 3-5:Power-Down Slew Rate.
ST
t
ST
t
TD
Note: tTD is the maximum elapsed time between ST high-
to-low transitions (ST
is activated by falling edges
only) which will keep the watchdog timer from forcing
the reset outputs active for a time of t
function of the voltage at the TD pin, as tabulated
. ITD is a
RST
below:
I
ConditionMin
TD pin = 0V62.5 ms150 ms250 ms
TD pin = Open250 ms600 ms1000 ms
TD pin = V
500 ms1200 ms2000 ms
CC
Typ
TD
Max
FIGURE 3-4:Strobe Input.
t
R
+4.75V
+4.25V
V
CC
FIGURE 3-6:Power-up Slew Rate.
DS21370B-page 6 2003 Microchip Technology Inc.
VCC = 5V
TC1232
+4.5V (5% Trip Point)
+4.25V (10% Trip Point)
RST
V
OH
V
RST
VCC SLEW RATE = 1.66 mV/µsec (0.5V/300 µsec)
FIGURE 3-7:V
Detect Reset Output
cc
OL
Delay (Power-Down).
t
RPD
V
CC
RST
RST
FIGURE 3-8:V
Delay (Power-Up).
4.6V (5% Trip Point)
4.5V(10% Trip Point)
V
OH
V
OL
Detect Reset Output
cc
t
RPU
2003 Microchip Technology Inc.DS21370B-page 7
TC1232
4.0PACKAGING INFORMATION
4.1Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX
XXXXXNNN
YYWW
8-Lead SOIC (150 mil)
XXXXXXXX
XXXXYYWW
NNN
16-Lead SOIC (150 mil)
XXXXXXXXXXXXX
XXXXXXXXXXXXX
YYWWNNN
Example:
TC1232
I/P256
0351
Example:
TC1232
COA0351
256
Example:
TC1232COE
XXXXXXXXXX
0351256
Legend: XX...X Customer specific information*
YYYear code (last 2 digits of calendar year)
WWWeek code (week of January 1 is week ‘01’)
NNNAlphanumeric traceability code
Note:In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
DS21370B-page 8 2003 Microchip Technology Inc.
8-Lead Plastic Dual In-line (PA) – 300 mil (PDIP)
E1
D
2
TC1232
n
E
β
eB
Number of Pins
Pitch
Top to Seating PlaneA.140.155.1703.563.944.3 2
Molded Package ThicknessA2.115.130.1452.923.303.68
Base to Seating PlaneA1.0150.38
Shoulder to Shoulder WidthE.300.313.3257.627.948.26
Molded Package WidthE1.240.250.2606.106.356.60
Overall LengthD.360.373.3859 .149.469.78
Tip to Seating PlaneL.125.130.1353.183.303.43
Lead Thickness
Upper Lead WidthB1.045.058.0701 .141.461.78
Lower Lead WidthB.014.018.0220.360.4 60.56
Overall Row Spacing§eB.310.370.4307.879.4010.92
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include m old flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
Dimension LimitsMINNOMMAXM INNOMMAX
1
α
A
c
UnitsINCHES*MILLIMETERS
n
p
c
α
β
.008.012.0150.200.290.38
A1
B1
B
88
.1002.54
51015 51015
51015 51015
A2
L
p
2003 Microchip Technology Inc.DS21370B-page 9
TC1232
8-Lead Plastic Small Outline (OA) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
Number of Pins
Pitch
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Paramete r
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
16-Lead Plastic Small Outline (OE) – Wide, 300 mil (SOIC)
TC1232
p
n
B
45°
c
β
Number of Pins
Pitch
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mo ld flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-013
Drawing No. C04-102
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.X/XX
Device
Device:TC1232: M icroprocessor Monitor
Temperature Range:C= 0°C to +70°C
Package:PA= Plastic DIP (300 mil Body), 8-lead
Range
E= -40°C to +85°C
OA= Plastic SOIC, (150 mil Body), 8-lead
OA713 = Plastic SOIC, (150 mil Body), 8-lead
OE= Plastic SOIC (300 mil Body), 16-lead
OE713 = Plastic SOIC (300 mil Body), 16-lead
PackageTemp era tur e
Tape and Reel
Tape and Reel
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
Examples:
a) TC1232COA: 0°C to +70°C, 8L-SOIC
b) TC1232COA713: 0°C to +70°C, 8L-SOIC,
Tape and Reel
c) TC1232COE: 0°C to +70°C, 16L-SOIC
d) TC1232COE713: 0°C to +70°C, 16L-SOIC,
Tape and Reel
e) TC1232CPA: 0°C to +70°C, 8L- PDIP
f) TC1232EOA:-40°C to +85°C, 8L-SOIC
g) TC1232EOA713: -40°C to +85°C, 8L-SOIC,
Tape and Reel
h) TC1232EOE: -40°C to +85°C, 16L-SOIC
i) TC1232EOE713: -40°C to +85°C, 16L-SOIC,
Tape and Reel
j) TC1232EPA: -40°C to +85°C, 8L-PDIP
1.Your local Microchip sales office
2.The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3.The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2003 Microchip Technology Inc.DS21370B-page13
TC1232
NOTES:
DS21370B-page 14 2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•Microchip is willing to work with the customer who is concerned about the integrity of their code.
•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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representation or warranty is given and no liability is assumed
by Microchip Technology Incorporated with respect to the
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