• 2.0% Accurate IndependentVoltage Reference
(TC1039)
• Rail-to-Rail Inputs and Outputs
• Operation Down to V
DD
=1.8V
Applications
• Power Management Circuits
• Battery Operated Equipment
• Consumer Products
Device Selection Table
Part NumberPackage
TC1037CECT5-Pin SOT-23A-40°C to +85°C
TC1038CECH6-Pin SOT-23A-40°C to +85°C
TC1039CECH6-Pin SOT-23A-40°C to +85°C
Temperature
Range
General Description
The TC1037/TC1038/TC1039 are single, low-power
comparatorsdesigned for low-power applications.
These comparators are specifically designed for
operation from a single supply. However, operation
from dual supplies also is possible, and power supply
current is independent of the magnitude of the power
supply voltage. The TC1037/TC1038/TC1039 operate
fromtwo1.5ValkalinecellsdowntoV
= 1.8V.Active
DD
supply current is 4µA for the TC1037/TC1038 and 6µA
for the TC1039. Input and output swing of these
devices is rail-to-rail.
An active low shutdown input, SHDN
, is available on
the TC1038 and disables the comparator, placing its
output in a high-impedance state. The TC1038 draws
only 0.05µA (typical) when the shutdown mode is
active.
An internally biased 1.20V bandgap reference i s
included in the TC1039. The reference is accurate to
2.0 percent tolerance. This referenceis independent of
the comparator in the TC1039.
Packaged in a 5-Pin SOT-23A (TC1037) or 6-Pin
SOT-23A (TC1038/TC1039),thesesinglecomparators
are ideal for applications requiring high integration,
small size and low power.
Functional Block Diagram
V
IN+
SS
1
2
3
+
–
5
V
DD
4
IN-
Package Types
5-Pin SOT-23A
V
DD
5
OUTPUT
6-Pin SOT-23A
IN-
4
V
DD
6
IN-SHDN
45
TC1037
TC1037ECT
2
1
OUTPUT
3
V
IN+
SS
6-Pin SOT-23A
V
DD
6
TC1039ECH
1
OUTPUT
NOTE: 5-Pin SOT-23A is equivalent to the EIAJ SC-74A.
6-PinSOT-23A is equivalenttothe EIAJ SC-74.
2002 Microchip TechnologyInc.DS21344B-page 1
V
2
SS
TC1038ECH
1
OUTPUT
IN-REF
45
3
IN+
V
IN+
SS
1
2
3
+
–
2
3
V
IN+
SS
OUTPUT
6
5
4
V
DD
SHDN
IN-
TC1038
OUTPUT
V
SS
IN+
1
Voltage
2
3
+
Reference
–
6
V
5
REF
4
IN-
TC1039
DD
TC1037/TC1038/TC1039
1.0ELECTRICAL
CHARACTERISTICS
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.
The TC1037/TC1038/TC1039 are a series of very low
power, linear building block products targeted at low
voltage, single supply applications. The TC1037/
TC1038/TC1039 minimum operating voltage is 1.8V
and typical supply current is only 4µA for the TC1037
and TC1038 (fully enabled) and 6µA for the TC1039.
3.1Comparator
The TC1037/8/9 contain one comparator. The
comparator’s input range extends beyond both supply
voltagesby 200mV and the outputswill swing to within
several millivoltsof thesupplies depending on the load
current being driven.
The comparator exhibits a propagation delay and
supply current which is largely independent of supply
voltage. The low input bias current and offset voltage
makes it suitable for high impedance precision
applications.
The TC1038 comparator is disabled during shutdown
and has a high impedance output.
3.2Voltage Reference
A 2.0% tolerance, internally biased, 1.20V bandgap
voltage reference is i ncluded in the TC1039. It has a
push-pull output capable of sourcing and sinking at
least 50µA.
3.3Shutdown Input (TC1038 Only)
SHDN at VILdisables the comparator and reduces the
supply current to less than 0.3µA. The SHDN
cannotbe allowedto float. When not used, connect it to
V
. The comparator’s output is in a high impedance
DD
state when the TC1038 is disabled. The comparator’s
inputs can be driven from rail-to-rail by an external
voltage when the TC1038 is disabled. No latchup will
occur when the device is driven to its enabled state
when SHDN
is set to VIH.
input
4.0TYPICAL APPLICATIONS
The TC1037/TC1038/TC1039 family lends itself to a
wide variety of applications, particularly in battery
powered systems. It typicallyfindsapplicationin power
management, processor supervisory and interface
circuitry.
4.1External Hysteresis (Comparator)
Hysteresis can be set externally with two resistors
using positive f eedback techniques (see Figure 4-1).
The design procedure for setting external comparator
hysteresisis as follows:
1.Choose the feedback resistor R
input bias current of the comparator is at most
100pA, the current through R
100nA (i.e., 1000 times the input bias current)
and retain excellent accuracy. The current
through R
R
where VRis a stable r eference voltage.
C
at the comparator’s trip point is VR/
C
2.Determinethehysteresisvoltage (V
the upper and lower thresholds.
6.Verify the threshold voltages with these
formulas:
V
rising:
SRC
.Sincethe
C
canbesetto
C
HY
1
–
------R
A
C
)between
SRC
EQUATION 4-3:
1
1
B
1
-------
R
C
V
V
SRC
THR
falling:
VR()RA()
------R
A
-------
++=
R
EQUATION 4-4:
RAVDD×
V
THFVTHR
2002 Microchip TechnologyInc.DS21344B-page 5
--------- ------------- ---
–=
R
C
TC1037/TC1038/TC1039
4.2Precision Battery Monitor
Figure 4-2 is a precision battery low/battery dead
monitoring circuit. Typically, the battery low output
warns the user that a battery dead condition is
imminent. Battery dead typically initiates a forced
shutdown to prevent operation at low internal supply
voltages(which can cause unstablesystemoperation).
The circuit in Figure 4-2 uses a TC1034, a TC1037 and
a TC1039, and only six external resistors. AMP 1 is a
simple buffer, while CMPTR1 and CMPTR2 provide
precision voltage detection using V
Resistors R2 and R4 set the detection threshold for
BATT LOW,
thresholdforBATT FAIL
assert BATT LOW
2.0V (typical). Total current consumed by this circuit i s
typically 16µA at 3V. Resistors R5 and R6 provide
hysteresis for comparators CMPTR1 and CMPTR2,
respectively.
whileresistorsR1and R3 set the detection
.The componentvaluesshown
at 2.2V (typical) and BATT FAIL at
as a reference.
R
4.332.768 kHz “Time Of Day Clock”
Crystal Controlled Oscillator
A very stable oscillator driver can be designedby using
a crystalresonatorasthefeedbackelement. Figure 4-3
shows a typical application circuit using this technique
to develop a clockdriverfora Time Of Day (TOD)clock
chip.The value of R
level at which the comparator trips – in this case onehalf of V
be set several times greaterthanthe crystaloscillator’s
period,whichwill ensure a 50% duty cycle by maintaining a DC voltage at the inverting comparator input
equal to the absolute average of the output signal.
. The RC time constant of RCand CAshould
DD
and RBdetermine the DC voltage
A
4.4Non-Retriggerable One Shot
Multivibrator
Using two comparators, a non-retriggerable one shot
multivibratorcan be designed using t he circuit configuration of Figure 4-4. A key feature of this design is that
the pulse width is independent of the magnitude of the
supply voltage because the charging voltage and the
intercept voltage are a fixed percentage of V
addition,this one shot is capable of pulse width with as
much as a 99% duty cycle and exhibits input lockoutto
ensure that the circuit will not re-trigger before the
outputpulsehascompletelytimedout.The triggerlevel
is the voltage required at the input to raise the voltage
at node A higher than the voltage at node B, and is set
by the resistivedividerR4 and R10 and the impedance
network composed of R1, R2 and R3. When the one
shot has been triggered, the output of CMPTR2is high,
causingthereferencevoltageatthenon-invertinginput
of CMPTR1 to go to V
input pulses from disturbing the circuit until the output
pulse has timed out.
. This prevents any additional
DD
DD
.In
ThevalueofthetimingcapacitorC1mustbesmall
enough to allow CMPTR1 to discharge C1 to a diode
voltage before the feedback signal from CMPTR2
(through R10) switches CMPTR1 to its high state and
allows C1 to start an exponential charge t hrough R5.
Proper circuit action depends upon rapidly discharging
C1 through the voltage set by R6, R9 and D2 to a final
voltage of a small diode drop. Two propagation delays
after the voltage on C1 drops below the level on the
non-invertinginput of CMPTR2,the output of CMPTR1
switches to the positive rail and begins to charge C1
throughR5. The timedelay which sets the outputpulse
width results from C1 charging to the reference voltage
set by R6, R9 and D2, plus four comparator propagation delays. When the voltage across C1 charges
beyond the reference, the output pulse returns to
ground and the input is again ready to accept a trigger
signal.
4.5Oscillators and Pulse Width
Modulators
Microchip’s linear building block comparators adapt
well to oscillator applications for low frequencies (less
than 100kHz). Figure 4-5 shows a symmetrical square
wave generator using a minimum number of components. The output is set by the RC time constant of R4
and C1, and the totalhysteresisoftheloopissetbyR1,
R2 and R3. The maximum frequencyof the oscillator is
limitedonly by the largesignalpropagationdelayof the
comparator in addition to any capacitive loading at the
output which degrades the slew rate.
To analyzethiscircuit, assume that the output is initially
high. For thisto occur, the voltage at the inverting input
must be less than the voltageat the non-invertinginput.
Therefore, capacitor C1 is discharged. The voltage at
the non-inverting input (V
EQUATION 4-5:
V
H
where, if R1 = R2 = R3, then:
EQUATION 4-6:
)is:
H
R2 VDD()
---------- ------------- ------------- ---------=
R2R1 R3
V
H
||
()+[]
2VDD()
-------------------=
3
DS21344B-page 6
2002 Microchip TechnologyInc.
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