Microchip SAM9X60-EK User Manual

SAM9X60-EK

SAM9X60-EK User's Guide

Scope

This user's guide introduces the SAM9X60 Evaluation Kit (SAM9X60-EK) and describes the development and debugging capabilities running on SAM9 Arm®-based embedded MPUs.

User Guide

DS50002907A-page 1

SAM9X60-EK

1. Introduction

1.1 Document Layout

The document is organized as follows:

• Chapter 1. “Introduction”

• Chapter 2. “Product Overview” – Important information about the SAM9X60-EK board

• Chapter 3. “Function Blocks” – Specifications of the SAM9X60-EK and high-level description of the major components and interfaces

• Chapter 4. “Installation and Operation” – Instructions on how to get started with the SAM9X60-EK

• Appendix. “Schematics and Layouts” – SAM9X60-EK schematics and layout diagrams

1.2 Recommended Reading

The following Microchip document is available and recommended as a supplemental reference resource:

• SAM9X60 Datasheet. Lit. Number DS60001579

SAM9X60-EK

Introduction

User Guide

DS50002907A-page 3

2. Product Overview

The SAM9X60-EK follows the Microchip MPU strategy for low cost evaluation kits, showcasing all the features that the SAM9X60 MPU can offer.

2.1 SAM9X60-EK Features

Table 2-1. SAM9X60-EK Features

Characteristic Specification Featured Components

Processor 228-ball TFBGA, 11x11 mm, 0.65 mm pitch Microchip SAM9X60

SAM9X60-EK

Product Overview

External clock

Memory

SD/MMC One standard 4-bit SD card interface –

USB

CAN Two CAN interfaces Microchip MCP2542

Ethernet One ETH port Microchip KSZ8081

Wi-Fi/BT One optional Wi-Fi® /Bluetooth® interface Slot for Microchip ATWILC3000

Audio One ClassD audio port –

Display One 24-bit LCD interface –

Camera One 12-bit Image Sensor Interface –

IO One expander IO Microchip MCP23008

Debug port

MPU: 24 MHz, 32.768 KHz

Misc. osc.: 25 MHz

One 16-bit, 2-Gbit DDR2

One NAND Flash

One QSPI Flash

One EEPROM

Two stacked Type-A connectors with power switches

One Micro-B USB Device

One J-Link-OB + CDC

One JTAG interface

DSC1001CI5

DSC6083CE2A

Winbond W972GG6KB-25

Micron MT29F08BA

Microchip SST26VF064B

Microchip 24AA02E48

2 * Microchip MIC2025

Embedded J-Link-OB through the CDC interface (ATSAM3U4C TFBGA100)

Board monitor

Expansion

Power management

Board supply From USB A or from external connector –

Backup battery SuperCap –

One RGB (Red, Green, Blue) LED

Four push button switches

One PIO connector

One mikroBUS™ connector

Two power regulators

Two power consumption measurement devices

User Guide

–

Hundreds of possible Click extensions featuring Microchip functions inside

Microchip MIC2800, MCP1725

Microchip PAC1934, PAC1710

™

DS50002907A-page 4

2.2 Evaluation Kit Specifications

CAUTION

Table 2-2. Evaluation Kit Specifications

Characteristic Specification

Board SAM9X60-EK

Board supply voltage External or USB-powered

SAM9X60-EK

Product Overview

Temperature

Relative humidity 0 to 90% (non-condensing)

Main board dimensions 150 × 125 × 20 mm

RoHS status Compliant

Board identification SAM9X60 Evaluation Kit

2.3 Power Sources

Two options are available to power up the SAM9X60-EK board:

• Powering through an external AC to DC +5V wall adapter connector (J1)

• Powering through the USB Micro-B connector on the USBA port (J7 – default choice)

Table 2-3. Electrical Characteristics

Electrical Parameters Value

Input voltage 5VDC

Maximum input voltage (limits) 6VDC

Maximum 3.3VDC current 300 mA

Operating: 0°C to +70°C Storage: –40°C to +85°C

The SAM9X60-EK board runs at a 3.3V voltage level logic. The maximum voltage that the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g., 5V) to an I/O pin could damage the board.

2.4 Connectors on Board

The fully-featured SAM9X60-EK board integrates multiple peripherals and interface connectors, as shown in the following figures.

User Guide

DS50002907A-page 5

Figure 2-1. SAM9X60-EK Top Connectors

D1

J8

J1

Q5

Q1

R9

R249

R245

R236

R242

R8

R34

R48

R49

FB6

C113

R153

D7

C69

C77

J2

C85D2C88

R128

R91

Y6

C56

C128

C126

R171

R181

J16

R19

R18

VDD_3V3_3 U

C150

U27

R116

C120

Q12

R114

C117

R149

C90

R221

TP4

R225

R224

R231

R230

R218

TP6

R213

C127

VBUS_USBC

Q3

R16

C173

Y10

C152

R235

R238

C2

R10

C6

L1

R7

R250

C176

J7

C4

U6

C122

R94

R93

R84

C58

C116

Q10

Q11

J5

Y2

SW1

R156

R158

R74

R72

SW2

R53

R54

R45

R41

R32

R67

R62

SW3

R97

R98C54

C136

Y8

R162

R110

R111

R109

Y7

C131

D4

R177

C141

C99

J14

FB13

J22

J24

C8

C172

R251

R237

D8

FB1

U1

R11

R29

C18

C1

C19

R246

R234

C148

R239

R258

R256

U2

C5

R4

R13

R12

U4

R243

R233

R241

R257

R47

R36

R35

U9

R265

FB8

C119

R92 R90

C60

R189

J3

R155

U10

J20

C76

C70

Y3

R188

J13

R126

C86

U11

R27

R28

Y1

R197

D3

R20

R119

U5

R22

R24

R21 C27

C25

C23

Y5

C91

R88

R86

R159

R157

U8

R85

R82

R75

R71

R65

R66

R203

R201

R199

Q15

Q14

Q13

U21

C125

C129

C55

U26

R59

R52

R145

R44

R40

R31

R142

R68

R64

R196

U7

R191

R185

J17

R136

R175

J9

R118

R107

C57

R112

R108

R113

C100

R137

R172

FB9

R161

R138

Q7 Q6

D5

J11

R173

R170

R169

Q9 Q8

R174

R182

D6

U24

Y9

U28

R17

Q2

TP9

C149

R1

R6

C106

VDDIOM

C61

VDD_3V3

U32

R117

U20

C124

C123

C121

U19

C118

C115

C114

R187

TP2

R127

R122

R220

R223

R222

C92

C93

R215

R216

R219

R227

R229

R226

R228

U23

TP5

TP7

R26

R190

C105

U17

U15

C103

C97

U14

C104

C102

C101

C130

R160

R176

FB10

C142

C138

R179

R178

FB11

C137

R183

R180

VDDCORE

VBUS_USBA

VBUS_USBB

C9

C3

C20

C22

C7

R148

R150

R33

C12

C11

D9

R132

R133

R79

R80

C29

SW4

R195

R58

R141

R146

U13

U12

C95

C132

R5

R2

Q4

C17

VBUS_JLINK

C171

C151

J18

U3

R96 R95

R154

R89

R87

R37

C179

R259

R260

J19

R130

R124

R152

R81 R77

R69

C75

C62

R70

C24

R194

J21

LD1

VDD_WILC

R207 R202

R105

R104

R135

R134

J6

J10

U22

C134

C133

R139

J12

R3

R15

R240

J23

R83

C53

C59

U31

R115

R123

C26

R212

C96

TP8

C135

J4

U16

VDD_MAIN_5V

Configuration

Jumpers

ISI

Connector

2 x CAN

Connector

CLASSD Audio

Connector

JTAG 20-pin

IDC Connector

UART

DEBUG

JLINK USB

Micro-B

External

Power Jack

MikroBus

USB 2.0

Micro-B

Stacked USB

type A

Ethernet

10/100

4 x User Buttons

I2C and PCM audio header

to/from ATWILC3000

Place to solder the

Wi-Fi / BT Module

SD Card

Connector

Raspberry Pi

Connector

™

SAM9X60-EK

Product Overview

User Guide

DS50002907A-page 6

Figure 2-2. SAM9X60-EK Bottom Connectors

C156

R247

C13

C63

R121

C84

R125

C51

R129

C50

C40

R208

C98

R164

R253

C167

R23

C34

C28

R101

R100

R102

R264

R14

C175

C10

C155

PAD2

R270

Q16

C82

C73

R232

R186

C67

R192

C42

C33

C43

C45

C143

R63

R50

R57

R55

R43

R39

R144

R168

R166

R261

R263

R262

C170

C178

R266

C177

R248

C168

C165

C163

C164

C161

C160

U29

FB5

PAD1

C16

C14

C162

C153

R244

C157U25

C79 C71

C68

C81

C78

C72

R120

C66

C65

R131

C83

FB2

C64

C35

C37

C36

C32

C49

C47

FB3

C44 C46

C39

R106

R206

R60

R46

R56

R38

R73

R61

R78

C94

R167

R165

R163

C140

C139

R255

C174

R252

C169

C159

C15

C21

C166

C38

C48

C52

C87

C41

R25

R103

R99

R147

R209

R211

C158

C89

C74

C145

C147

PAD4

PAD3

R268

U30

FB7

C154

C146

C80

C31

R30

R204

C144

R200

R143

R51

R42

R76

R140

R214 R217

R210

J15

FB12

R254

LCD

Connector

SAM9X60-EK

Product Overview

Table 2-4. SAM9X60-EK Board Interface Connectors

Connector Interfaces to

J1 External power jack

J4 Standard SDMMC connector

J6 Dual CAN

J7 USB 2.0 Micro-B (USB-A)

J8A Stacked Type-A USB (USB-B)

J8B Stacked Type-A USB (USB-B)

J10 (not populated) ATWILC3000 GPIO

J9 (not populated) ATWILC3000 UART

User Guide

DS50002907A-page 7

SAM9X60-EK

Product Overview

...........continued

Connector Interfaces to

J5 Ethernet 10/100 RJ45 (port 1)

J11 Audio external power

J12 ClassD audio output

J14 mikroBUS socket

J15 LCD connector

J16 External GPIO

J17 ISI Camera Connector

J18 PCB connector for factory-programming the SAM3U/J-Link-OB (not to be used by end user)

J22 USB 2.0 Micro-B, J-Link-OB/J-Link-CDC

J23 JTAG, 20-pin IDC

J24 FTDI connector (UART debugger)

2.5 Default Jumper Settings

Table 2-5. SAM9X60-EK Jumper Settings

Jumper State Function

J2 Closed VDDBU current measurement

J3

J13

J19 (not populated)

J20

J21

Closed Disable the SHDN function and always keep the board powered on

Open (default) Normal behavior, the PMIC can be powered down by the MPU

Closed Booting from on-board memories is permanently disabled

Open (default) Booting from on-board memories is disabled only when SW4 is pressed

Closed

Open (default) Normal SAM3U operation (runs the J-Link interface)

Closed

Open (default)

Closed Disable UART communication (CDC) between MPU and SAM3U

Open (default)

Erase SAM3U firmware (not populated, reserved for factory configuration and should never be used by the end user)

J-Link on-board interface is disabled. MPU debugging is done through J23, the 20pin SAM-ICE™ connector (i.e., an external JTAG interface is required)

J-Link on-board interface is enabled. MPU debugging is done through it (i.e., using the SAM3U MCU and the micro USB connector J22)

Enable UART communication (CDC) between MPU and SAM3U (PD20 port must be high as well)

2.6 Kit Content

The SAM9X60 evaluation kit includes the following:

• The SAM9X60-EK board

• USB-A to USB Micro-B cable

• 50-position FFC/FPC cable

User Guide

DS50002907A-page 8

3. Function Blocks

SAM9X60

600 MHz ARM926EJ-S CPU

BGA 228

On Board Memories

NAND Flash

4Gb (512M x 8)

MT29F4G08ABAEAWP

QSPI Flash

64Mb (8M x 8)

SST26VF064B

I2C EEPROM

2Kb (256 x 8)

24AA025E48

DDR2 SDRAM

2Gb

W972GG6KB

External connections

ETHERNET PHY

RMII

KSZ8081RNAIA

RJ45

Connector

Camera

ISI

Connector

LCD

Connector

2 x CAN

2 x MCP2542

2 x CAN

2 x Connector

CLASS D

Audio Ampliﬁer

Analog Audio

Connector

RASPBERRY PI

Connector

SD Card

Connector

Wi-Fi / BLE

ATWILC3000

mikroBUS

Connector

USB A,B&C

Connectors

RGB LED'sUSER Buttons

SAM9X60 - EVALUATION KIT

Power Supply

5V INPUT

Connector

PMIC

MIC2800

Voltage & Current

Measurement

PAC1710 PAC1934

Backup Power

3V3 SUPERCAP

Program and debug

UART

DEBUG

Connector

On Board

Programmer

ATSAM3U4CA

J-TAG

Connector

USBA

SAM-BA

This section covers the specifications of the SAM9X60-EK and provides a high-level description of the board's major components and interfaces. This document is not intended to provide detailed documentation about the processor or about any other component used on the board. It is expected that the user will refer to the appropriate documents of these devices to access detailed information.

Figure 3-1. SAM9X60-EK Block Diagram

SAM9X60-EK

Function Blocks

3.1 Power Supply Topology and Power Distribution

budget for all the devices on the board and a correct power-up sequence for the MPU. The power-up and powerdown sequences indicated in the SAM9X60 datasheet must be respected for a reliable operation of the device.

3.1.1 Input Power Options

The SAM9X60-EK board can be powered through:

This section describes the implementation and the circuitry that ensures adequate voltage stability and current

The +5V from the wall adapter is protected through an NCP349 positive overvoltage controller switch. The controller is able to disconnect the system from its output pin when incorrect input operating conditions are detected (5.83V max).

The USB-powered operation comes from the USB device port connected to a PC or a 5VDC supply. The USB supply is enough to power the board in most applications. It is important to note that when the USB supply is used, the USB port has limited power. If USB Host port is required for the application, it is recommended that the external DC supply be used.

• an external AC to DC +5V wall adapter connected via a 2.1 mm center-positive plug into the power jack of the board (J1). The recommended output capacity of the power adapter is 2A,

• USB port A (J7).

User Guide

DS50002907A-page 9

0.1uF 50V 0402

C3

0.1uF 50V 0402

C9

GND

IN

1

IN_PAD

7

EN

6

GND

2

FLAG

3

OUT2

5

OUT1

4

NCP349MNAETBG

U1

2

3

1

2.1mm EJ508A

J1

VDD_MAIN_5V_

GND

EXT_5V DC_5V

180R 0603

FB1

USB_5V

0.1uF 50V 0402

C7

2

71 6

SIA923AEDJ-T1-GE3

Q1A

5

8 4 3

SIA923AEDJ-T1-GE3

Q1B

2

71 6

SIA923AEDJ-T1-GE3

Q2A

5

8 4 3

SIA923AEDJ-T1-GE3

Q2B

GND GND GND GND

GND GND GND

100µF 16V Radial, Can

C4

GND

USBA_VBUS_5V

10uF 25V 1206

C1

10uF 25V 1206

C2

10uF 25V 1206

C8

100k 0402 5%

R2

100k 0402 5%

R3

100k 0402 5%

R5

PIC101 PIC102

COC1

PIC201 PIC202

COC2

PIC301 PIC302

COC3

PIC401 PIC402

COC4

PIC701 PIC702

COC7

PIC801 PIC802

COC8

PIC901 PIC902

COC9

PIFB101

PIFB102

COFB1

PIJ101

PIJ102

PIJ103

COJ1

PIQ101

PIQ102

PIQ106

PIQ107

COQ1A

PIQ103

PIQ104

PIQ105

PIQ108

COQ1B

PIQ201

PIQ202

PIQ206

PIQ207

COQ2A

PIQ203

PIQ204

PIQ205

PIQ208

COQ2B

PIR201

PIR202

COR2

PIR301

PIR302

COR3

PIR501

PIR502

COR5

PIU101

PIU102

PIU103

PIU104 PIU105

PIU106

PIU107

COU1

PIC201

PIC301

PIQ101

PIQ202

PIQ205

PIR202

PIU104 PIU105

PIC101

PIJ101

PIU101 PIU107

PIC102

PIC202

PIC302

PIC402

PIC702

PIC802

PIC902

PIJ102

PIR201

PIR301

PIR501

PIU102

PIU106

PIJ103

PIQ102

PIQ105

PIQ203

PIQ206

PIQ207

PIQ208

PIR302

PIQ103

PIQ106

PIQ107

PIQ108

PIU103

PIC801

PIC901

PIFB102

PIQ201

PIR502

PIC701

PIFB101

PIC401

PIQ104

PIQ204

SAM9X60-EK

Function Blocks

The switch between the two powering options is made by four transistors that ensure the separation between the two when both are plugged. The switch prioritizes powering from the wall adapter to maximize power transfer.

The following figure shows the input power supply topology.

Figure 3-2. Input Power Options

Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for any

project that requires only a 5V source at up to 500 mA.

3.1.2 Power Management Integrated Circuit

The MIC2800 is a high-performance power management IC providing three output voltages with maximum efficiency. Integrating a 2-MHz DC/DC converter with an LDO post-regulator, the MIC2800 gives two high-efficiency outputs with a second, 300 mA LDO for maximum flexibility. The DC-to-DC converter uses small values of L and C to reduce board space while still retaining efficiency over 90% at load currents up to 600 mA. For more information about the MIC2800, refer to the product web page.

Each LDO has an independent Enable (EN) pin thus allowing a proper power-up sequence for the MPU. The 20 KΩ resistor in series and the 0.1 µF capacitor in parallel with the EN1 input make a low-pass filter and introduce the necessary delay between the 3.3V and 1.15V rails needed for the proper operation of the MPU. The diode (D1 in

Figure 3-3) ensures that the capacitor fast discharges during the power-down sequence.

Detailed information on the SAM9X60 MPU power supplies and power-up/down considerations are described in section “Electrical Characteristics” in the SAM9X60 device datasheet (see 1.2 Recommended Reading).

The MIC2800-G8S comes preset to supply all the voltage rails needed by the system:

• 1.8V DC/DC supplies SAM9X60 DDR2 pads (VDDIOM) and devices.

• 1.15V LDO1 supplies SAM9X60 Core (VDDCORE).

• 3.3V LDO2 supplies SAM9X60 I/O pads.

The figure below shows the power management scheme.

User Guide

DS50002907A-page 10

Figure 3-3. Power Management Integrated Circuit

GND GNDGND GND

VDD_1V15

VDD_MAIN_5V

2.2uH

L1

GND

GNDGND

VDD_1V8

GND

MIC2800_nRST

GND

0.1uF 50V 0402

C17

0.1uF 50V 0402

C18

0.1uF 50V 0402

C19

LOWQ

1

BIAS

2

SGND

3

PGND

4

SW

5

VIN

6

VIN

7

LDO2

8

FB

9

LDO

10

LDO1

11

POR

12

CSET

13

CBYP

14

EN1

15

EN2

16

U3

MIC2800-G8SYML-TR

600mA

300mA 300mA

VDD_3V3_LDO

POWER_EN

10uF 25V 1206

C10

10uF 25V 1206

C11

10uF 25V 1206

C12

10uF 25V 1206

C21

10uF 25V 1206

C22

10nF 16V 0402

C20

1N4148

D1

20k 0402 1%

R11

100k 0402 5%

R29

PIC1001

PIC1002

COC10

PIC1101

PIC1102

COC11

PIC1201

PIC1202

COC12

PIC1701 PIC1702

COC17

PIC1801 PIC1802

COC18

PIC1901 PIC1902

COC19

PIC2001 PIC2002

COC20

PIC2101 PIC2102

COC21

PIC2201 PIC2202

COC22

PID101

PID102

COD1

PIL101

PIL102

COL1

PIR1101

PIR1102

COR11

PIR2901

PIR2902

COR29

PIU301

PIU302

PIU303

PIU304

PIU305

PIU306

PIU307

PIU308

PIU309

PIU3010

PIU3011

PIU3012 PIU3013

PIU3014

PIU3015

PIU3016

COU3

PIC1002

PIC1102

PIC1202

PIC1702

PIC1802

PIC1902

PIC2002

PIC2102

PIC2202

PIU303

PIU304

PIU3012

POMIC28000nRST

PIC1701

PIU3014

PIC1801

PIU302

PIC1901

PID101

PIR1102

PIU3015

PIC2001

PIU3013

PIL101

PIU305

PIR2901

PIU301

PID102

PIR1101

PIU3016

NLPOWER0EN

PIC1101

PIC1201

PIL102

PIU309

PIU3010

PIC2201

PIU3011

PIC2101

PIU308

PIC1001

PIR2902

PIU306

PIU307

POMIC28000nRST

10k 0402 5%

R19

1k 0402 5%

R18

12

HDR-2.54 Male 1x2

J3

GND GND

GND

VDD_MAIN_5V VDD_MAIN_5V

SHDN

POWER_EN

Shunt 2.54mm 1x2

JP2

GND

MIC2800_nRST

STARTB

VDD_3V3

100k 0402 5%

R15

100k 0402 5%

R16

100k 0402 5%

R17

3

1

2

BSS138N

Q3

3

1

2

BSS138N

Q4

3

1

2

BSS138N

Q5

PIJ301

PIJ302

COJ3

COJP2

PIQ301

PIQ302

PIQ303

COQ3

PIQ401

PIQ402

PIQ403

COQ4

PIQ501

PIQ502

PIQ503

COQ5

PIR1501

PIR1502

COR15

PIR1601

PIR1602

COR16

PIR1701

PIR1702

COR17

PIR1801

PIR1802

COR18

PIR1901

PIR1902

COR19

PIJ302

PIQ302

PIQ402

PIQ502

PIQ503

PIR1701

POMIC28000nRST

PIJ301

PIR1801

PIQ301

PIR1901

PIQ403

PIR1601

NLPOWER0EN

PIR1902

POSHDN

PIQ303

PIQ401

PIQ501

PIR1501

PIR1802

NLSTARTB

PIR1702

PIR1502

PIR1602

POMIC28000nRST

POSHDN

WARNING

3.1.3 Shutdown Circuitry

The processor can assert the SHDN signal to shut down the PMIC and enter Power-down mode. This is done by pulling both enable pins of the PMIC to GND through a Field Effect Transistor (FET) scheme.

Jumper J3 must not be set to enable this functionality. By setting jumper JP2/J3, the user can shut down the MPU without powering down its power rails.

Figure 3-4. Shutdown Circuitry

SAM9X60-EK

Function Blocks

3.1.4 Battery Unit

A 3.3V battery (supercapacitor) is implemented to permanently maintain the VDDBU voltage.

This function allows the user to shut down the MPU and the system, thus entering a low power mode, and still keep the custom configuration that was previously set in the MPU backup area. While in Shut-down mode, the board can be woken up by action on the SW2 button (WAKE UP), which signals the MPU to resume operations.

Jumper JP1/J2 must be in place for proper operation of the MPU, and can be removed if the user wants to bring the MPU back to the initial configuration, by resetting the General Purpose Backup Registers (GPBR).

Make sure the board is powered off before removing the JP1/J2 jumper.

User Guide

DS50002907A-page 11

Figure 3-5. Battery Unit

220mF

3.3V P8.3L11.7D6.8H1.8

C23

1

2

3

BAT54C

D2

PMEG6010ER

D3

VDDBU

GND

Shunt 2.54mm 1x2

JP1

VDD_3V3

12

HDR-2.54 Male 1x2

J2

100R 0402 1%

R20

PIC2301 PIC2302

COC23

PID201

PID202

PID203

COD2

PID301

PID302

COD3

PIJ201

PIJ202

COJ2

COJP1

PIR2001

PIR2002

COR20

PIC2302

PIC2301

PID202

PIR2002

PID203

PIJ202

PID302

PIR2001

PID201

PID301

PIJ201

I2C ADR : 1001_101[R/W]

GND GND GND

10k 0402 5%

R4

VDD_3V3

VDD_MAIN_5V_ VDD_MAIN_5V

PAC1710_TWCK PAC1710_TWD

VDD_MAIN_5V

GND

PAC1710_INT

1 2

3

4

0.01R 1206

1%

0.25W

R1

SENSE+

1

SENSE-

2

NC

3

NC

4

GND

5

ADDR_SEL

6

ALERT#

7

SMDATA

8

SMCLK

9

VDD

10

PAD

11

PAC1710

U2

5V_P 5V_N

TP LOOP Black TH

TP1

4.7uF 10V 0402

C5

0.1uF 50V 0402

C6

VDD_3V3_LDO

100R 0402 1%

R6

PIC501

PIC502

COC5

PIC601

PIC602

COC6

PIR101

PIR102

PIR103

PIR104

COR1

PIR401

PIR402

COR4

PIR601

PIR602

COR6

PITP101

COTP1

PIU201

PIU202

PIU203

PIU204

PIU205

PIU206

PIU207

PIU208

PIU209

PIU2010

PIU2011

COU2

PIVDD0MAIN05V01

COVDD0MAIN05V

PIR104

PIU202

NL5V0N

PIR103

PIU201

NL5V0P

PIC501

PIC601

PIR602

PITP101

PIU205

PIU2011

PIR601

PIU206

PIU203

PIU204

PIR401

PIU207

POPAC17100INT

PIU209

POPAC17100TWCK

PIU208

POPAC17100TWD

PIR402

PIC502

PIC602

PIU2010

PIR102

PIVDD0MAIN05V01

PIR101

POPAC17100INT POPAC17100TWCK

POPAC17100TWD

3.1.5 Current Measurement

Two Microchip DC power/energy monitors are embedded on the SAM9X60-EK board:

• one single high-side current sense monitor PAC1710

• one four-channel current sense monitor PAC1934

Both chips communicate with the MPU via a Two-wire Interface (TWI) and both output their ALERT# signal to a port expander.

The PAC1710 is a single high-side bidirectional current sensing monitor with precision voltage measurement capabilities. The power monitor measures the voltage developed across an external sense resistor to represent the high-side current of a battery or voltage regulator. The PAC1710 also measures the SENSE+ pin voltage and calculates average power over the integration period. The PAC1710 can be programmed to assert the ALERT# pin when high and low limits are exceeded for current sense and bus voltage. For more information about the PAC1710, refer to the product web page.

One current sense resistor is populated on board for measuring voltage and current on the main 5V power rail.

Figure 3-6. PAC1710 Current Measurement

SAM9X60-EK

Function Blocks

Table 3-1. PAC1710 Signal Descriptions

PIO Signal Name Shared PIO Signal Description

PA31 PAC1710_TWCK Power TWI TWI clock

PA30 PAC1710_TWD Power TWI TWI data

– PAC1710_INT – Interrupt – to port expander U6

The PAC1934 is a four-channel power/energy monitor with current sensor amplifier and bus voltage monitors that feed high resolution ADCs. Digital circuitry performs power calculations and energy accumulation. The PAC1934 enables energy monitoring with integration periods from 1 ms to up to 36 hours. Bus voltage, sense resistor voltage, and accumulated proportional power are stored in registers for retrieval by the system master or embedded controller. For more information about the PAC1934, refer to the product web page.

User Guide

DS50002907A-page 12

I2C ADR : 0010_111[R/W]

8.45k 0603 1%

R14

10k 0402 5%

R13

10k 0402 5%

R12

PAC1934_TWCK

PAC1934_TWD

VDDCORE

VDDIOM

VDD_3V3

PAC1934_INT

1 2

3

4

0.01R 1206

1%

R7

1 2

3

4

0.01R 1206

1%

R8

1 2

3

4

0.01R 1206

1%

R9

SENSE1_P

SENSE1_N

SENSE2_N

SENSE2_P

SENSE3_P

SENSE3_N

4.7uF 10V 0402

C13

0.1uF 50V 0402

C14

4.7uF 10V 0402

C15

0.1uF 50V 0402

C16

GND

VDD_3V3_LDOVDD_3V3_LDO

ADDRSEL

6

SLOW/ALERT

1

VDD

2

GND

3

VDD/IO

15

SENSE3-

7

SENSE3+

8

SENSE4-

9

SENSE4+

10

SENSE1+

11

SENSE1-

12

SENSE2+

13

SENSE2-

14

PWRDN

16

SM_DATA

5

SM_CLK

4

EP

17

U4 PAC1934

VDD_3V3_LDO

VDD_1V15

VDD_1V8

VDD_3V3

VDDIOM

VDDCORE

1 2

3

4

0.01R 1206

1%

R10

SENSE4_P

SENSE4_N

VDD_3V3 VDD_3V3_MPU

PIC1301

PIC1302

COC13

PIC1401

PIC1402

COC14

PIC1501

PIC1502

COC15

PIC1601

PIC1602

COC16

PIR701

PIR702

PIR703

PIR704

COR7

PIR801

PIR802

PIR803

PIR804

COR8

PIR901

PIR902

PIR903

PIR904

COR9

PIR1001

PIR1002

PIR1003

PIR1004

COR10

PIR1201

PIR1202

COR12

PIR1301

PIR1302

COR13

PIR1401

PIR1402

COR14

PIU401

PIU402

PIU403

PIU404

PIU405

PIU406

PIU407

PIU408

PIU409

PIU4010

PIU4011

PIU4012

PIU4013

PIU4014

PIU4015

PIU4016

PIU4017

COU4

PIVDD03V301

COVDD03V3

PIVDDCORE01

COVDDCORE

PIVDDIOM01

COVDDIOM

PIC1301

PIC1401

PIC1501

PIC1601

PIR1401

PIU403 PIU4017

PIR1301

PIU4016

PIR1402

PIU406

PIR1201

PIU401

POPAC19340INT

PIU404

POPAC19340TWCK

PIU405

POPAC19340TWD

PIR704

PIU4012

NLSENSE10N

PIR703

PIU4011

NLSENSE10P

PIR804

PIU4014

NLSENSE20N

PIR803

PIU4013

NLSENSE20P

PIR904

PIU407

NLSENSE30N

PIR903

PIU408

NLSENSE30P

PIR1004

PIU409

NLSENSE40N

PIR1003

PIU4010

NLSENSE40P

PIR701

PIR801

PIR901

PIR1002

PIC1302

PIC1402

PIC1502

PIC1602

PIR1001

PIR1202

PIR1302

PIU402

PIU4015

PIR902

PIVDD03V301

PIR802

PIVDDCORE01

PIR702

PIVDDIOM01

POPAC19340INT

POPAC19340TWCK

POPAC19340TWD

SAM9X60-EK

Function Blocks

Four current sense resistors are populated on board for measuring voltage and current consumption on the power rails:

• 3.3V VDD_3V3_MPU - MPU on the 3.3V rail

• 3.3V VDD_3V3_SYS - rest of the system on the 3.3V rail

• 1.8V VDDIOM - MPU and DDR2 memory

• 1.15V VDDCORE – MPU core

Figure 3-7. PAC1934 Current Measurement

Table 3-2. PAC1934 Signal Descriptions

PIO Signal Name Shared PIO Signal Description

PA31 PAC1934_TWCK Power TWI TWI clock

PA30 PAC1934_TWD Power TWI TWI data

– PAC1934_INT – Interrupt – to port expander U6

3.2 Processor

The SAM9X60 is a high-performance, ultra-low power ARM926EJ-S CPU-based embedded microprocessor (MPU) running up to 600 MHz, with support for multiple memories such as SDRAM, LPSDRAM, LPDDR, DDR2, QSPI and e.MMC Flash. The device integrates powerful peripherals for connectivity and user interface applications, and offers security functions (tamper detection, etc.), TRNG, as well as high-performance crypto accelerators for AES and SHA.

Refer to the SAM9X60 datasheet for more information (see 1.2 Recommended Reading).

3.2.1 Power Supply

The PMIC (main regulator) provides all power supplies required by the SAM9X60 device:

• 1.15V for VDDCORE

Decoupling capacitors are placed close to the MPU power pins to stabilize the voltage rails.

• 1.8V for VDDIOM

• 3.3V for VDDIOP0, VDDIOP1, VDDANA, VDDNF, VDDQSPI, VDDIN33 and VDDBU

User Guide

DS50002907A-page 13

Figure 3-8. Processor Power Supplies

GND

0.1uF16V0201

C32

0.1uF16V0201

C33

SAM9X60 P OWER SUPPLY

4.7uF10V0402

C31

VDDCORE

L6

VDDCORE

F6

VDDCORE

F11

VDDIOM

G14

VDDIOM

C10

VDDIOM

C13

VDDANA

C4

VDDIN33

P13

VDDOUT25

P10

VDDIN33

L11

GND

J8

GND

E7

GND

G12

GNDANA

B4

GNDIN33

R13

VDDNF

K14

VDDIOP0

G3

GND

E10

GND

B13

GND

K5

GND

G5

GND

N15

VDDQSPI

C7

VDDIOP0

K3

GND

H8

GND

H9

GNDIN33

M10

GND

K12

GND

T16

GND

A1

GND

A16

GND

T1

VDDBU

P7

GND

M7

VDDIOP1

N3

GND

N2

U5G

SAM9X6_TFBGA-228

VDDOUT25

VDDBU

VDDCORE

VDDIOM

0.1uF16V0201

C34

0.1uF16V0201

C36

0.1uF16V0201

C37

0.1uF16V0201

C38

0.1uF16V0201

C41

0.1uF16V0201

C42

0.1uF16V0201

C43

0.1uF16V0201

C44

0.1uF16V0201

C45

0.1uF16V0201

C46

0.1uF16V0201

C48

0.1uF16V0201

C49

4.7uF10V0402

C47

0.1uF16V0201

C50

0.1uF16V0201

C51

GND

4.7uF10V0402

C35

VDDIN33

2.2uF10V0402

C52

4.7uF10V0402

C40

4.7uF10V0402

C39

0R 0402

R30

VDD_3V3_MPU

SAM9X60-EK

Function Blocks

3.2.2 Main Configuration and Control

This block depicts the main block for processor configuration and control:

• XIN and XOUT are the Main Clock Oscillator input/output.

• XIN32 and XOUT32 are the Slow Clock Oscillator input/output.

• SHDN is an output signal used to enable and disable an external power supply circuit.

• WKUP is an event detection input pin used to wake up the processor from Shutdown state.

• JTAGSEL is an input that when pulled high enables the JTAG boundary scan.

• TCK, TDI, TDO, TMS and RTCK are used for JTAG communication.

• nRST is the processor main reset input.

• HHSD_A/B/C are the three USB ports embedded inside the MPU.

• RTUNE is used for USB external tuning.

• TST input is reserved for processor manufacturing tests.

• ADVREFP and ADVREFN are the positive and negative reference points for the embedded analog comparator. A small low-pass filter is placed to reduce the input noise and improve accuracy.

User Guide

DS50002907A-page 14

Figure 3-9. Processor Main Configuration and Control

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_RTCK

USBA_N

USBA_P

USBB_N

USBB_P

USBC_N

USBC_P

0R 0402

R26

VDDBU

5.62k

0402 1%

R23

SHDN

WAKE_UP

XIN XOUT

XIN32 XOUT3 2

GND

SAM9X60 CONFIG

GND

1uF 10V 0201

C28

10R 0201 1%

R25

0R 0402

R22

DNP

VDD_3V3_MPU

MPU_nRST

XIN

R10

XOUT

T10

XIN32

T9

XOUT32

R9

SHDN

R11

WKUP

T11

JTAGSEL

P9

nRST

R1

TST

J9

HHSDPA

T12

HHSDMA

R12

HHSDPB

T13

HHSDMB

T14

HHSDPC

P12

HHSDMC

N12

TCK

R3

TDI

F3

TDO

H5

TMS

F5

RTCK

T2

ADVREFP

D5

RTUNE

P11

ADVREFN

C5

U5F

SAM9X6_TFBGA-228

0.1uF 50V 0402

C29

GND

TP2

VDD_3V3

GND

XIN

GND

24MHz 18pF

ABM8G-24.000MHZ-18-D2Y-T

Y1

DNP

27pF

0402

C24

DNP

27pF0402

C25

DNP

1M 0402 5%

R21

DNP

STB

1

GND

2

OUT

3

VDD

4

24MHz DSC1001CI5-024.0000

Y3

GND

XOUT

0R 0402

R28

32.768Khz ABS06-32.768KHZ-T

Y2

GND

XIN32

XOUT32

20pF

0402

C26

20pF0402

C27

1M 0402 5%

R24

DNP

0R 0402

R27

DNP

0R 0402

R91

DNP

XIN

XOUT

51R 0402

R149

3.2.3 Clock Circuitry

The embedded MPU generates its necessary clocks based on two oscillators: one slow clock (SLCK) oscillator running at 32.768 kHz and one main clock oscillator running at 24 MHz.

The main clock oscillator is implemented with a MEMS (Micro Electro-Mechanical System) device DSC1001.

For evaluation purposes, we leave users the freedom to mount a crystal instead, using the PCB footprint reservation (Y1). In that case, resistors R149 and R28 should be removed, resistors R27 and R91 should be populated and capacitors C24 and C25 should be populated with the appropriate load capacitance for the selected crystal.

Figure 3-10. Processor Clock Circuitry

SAM9X60-EK

Function Blocks

User Guide

DS50002907A-page 15

3.2.4 Reset Circuitry

MIC2800_nRST

JTAG_nRST

100R 04021%

R185

100R 04021%

R190

100R 04021%

R191

USER_nRST

MPU_nRST

DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11

DDR_A13 DDR_A14 DDR_A15

DDR_D3 DDR_D6 DDR_D4 DDR_D1 DDR_D5 DDR_D2 DDR_D7 DDR_D0 DDR_D12 DDR_D15 DDR_D13 DDR_D8 DDR_D9 DDR_D10 DDR_D14 DDR_D11

DDR_DQM0 DDR_DQM1

DDR_DQS0_P DDR_DQS0_N

DDR_DQS1_P DDR_DQS1_N

DDR_RAS DDR_CAS DDR_WE

DDR_CS DDR_CLK_P DDR_CLK_N

DDR_CKE

22pF 50V 0402

C62

DDR_A16 DDR_A17 DDR_A18

20k 0402 1%

R119

GND

DDR_SDA10

DIFF100 DIFF100

SDCKn

B14

SDCK

A15

SDCKE

F13

nWR0

E8

SDA10

D12

nRD

F12

nWR1

A10

DDR_CAL

B8

A1

G16

A15

G15

A8

F16

A4

B12

A0

B10

A13

B11

A10

C11

A6

A12

A2

A13

A17

F14

A12

A11

A19

H14

A16

E14

A18

C16

A3

D15

A7

B16

A5

E11

A14

C15

A9

D14

A11

E13

D10

F9

D9

D8

D13

B9

D14

D11

D6

J16

D11

A9

D8

G9

D12

F10

D3

H11

D4

J14

D1

H10

D7

J13

D0

H16

D2

H15

D5

J11

D15

C9

DDR_VREF

A14

nCS1

E16

nCS0

F15

DQS1

D9

SDWE

D16

nDQS1

E9

RAS

E15

nDQS0

H13

DQS0

H12

CAS

C12

DQM1

C8

DQM0

G11

nWR3

L14

U5E

SAM9X6_TFBGA-228

DDR_VREF

Three reset sources for the SAM9X60 MPU are placed on the board:

• Power-on Reset from the power management unit MIC2800

• User push button reset SW3

• External JTAG or J-Link-OB reset from an in-circuit emulator

Figure 3-11. Processor Reset Circuitry

3.2.5 DDR Controller (MPDDRC)

The SAM9X60 embeds a Multi-Port DDR-SDRAM Controller (MPDDRC) to drive DDR2 and LPDDR1 memories.

Note the following regarding the command and control signal connections between the DDR Controller and the DDR Memory:

• Addresses A0, A1 and A12 are not used on the controller side.

• Addresses A2 to A11 are connected to A0 to A9 on the memory side.

• Signal SDA10 must be connected to A10.

• Addresses A13 to A15 are connected to the last three addresses on the memory side.

• A16 to A18 are connected to BA0 to BA2.

It is recommended to double-check the design schematic against the information provided in the datasheet.

Figure 3-12. Processor DDR Controller

SAM9X60-EK

Function Blocks

User Guide

DS50002907A-page 16

4.7k 0201 1%

R120

4.7k 0201 1%

R121

0.1uF 16V 0201

C63

0.1uF 16V 0201

C66

GND

4.7uF 10V 0402

C65

GND

VDDIOM

DDR_VREF

LCD_D17_PC17 LCD_D18_PC18 LCD_D19_PC19 LCD_D20_PC20 LCD_D21_PC21 LCD_D22_PC22 LCD_D23_PC23

LCD_PCLK_PC30

LCD_VSYNC/CS_PC27

LCD_HSYNC/WE_PC28

LCD_DATA_ENABLE_PC29

LCD_IRQ1_PC25

LCD_PWM_PC26

FLEXCOM5_IO1_RX_PA21 FLEXCOM5_IO0_TX_PA22

SDMMC0_DAT2_PA19

SDMMC0_CMD_PA16

SDMMC0_DAT3_PA20

SDMMC0_CLK_PA17

SDMMC0_DAT0_PA15

SDMMC0_DAT1_PA18

SDMMC0_CD_PA23

CLASSD_L0_PA24 CLASSD_L1_PA25 CLASSD_L2_PA26 CLASSD_L3_PA27

WILC3000_ENABLE_PA29

WILC3000_INTERRUPT_PA28

CAN/FLEXCOM_RX_PA06

CAN/FLEXCOM_TX_PA05

FLEXCOM0_IO0_PA00 FLEXCOM0_IO1_PA01

FLEXCOM6_TWD_PA30

FLEXCOM6_TWCK_PA31

CAN/DBGU_TX_PA10

CAN/DBGU_RX_PA09

PA02 PA03 PA04

PA07 PA08

PA11 PA12 PA13 PA14

PC31

SAM9X60 PORT PA

SAM9X60 PORT PC

LCD_D12_ISI_PCK_PC12

LCD_D13_ISI_VSYNC_PC13

LCD_D14_ISI_HSYNC_PC14

LCD_D15_ISI_MCK_PC15

LCD_D0_ISI_D0_PC00

LCD_D2_ISI_D2_PC02

LCD_D4_ISI_D4_PC04

LCD_D6_ISI_D6_PC06

LCD_D8_ISI_D8_PC08

LCD_D10_ISI_D10_PC10

LCD_D1_ISI_D1_PC01

LCD_D3_ISI_D3_PC03

LCD_D5_ISI_D5_PC05

LCD_D7_ISI_D7_PC07

LCD_D9_ISI_D9_PC09

LCD_D11_ISI_D11_PC11

LCD_ISI_ENABLE_PC24

LCD_D16_ISI_nRST_PC16

PA0

P2

PA1

M3

PA2

P1

PA3

L3

PA4

N1

PA5

L4

PA6

M2

PA7

K6

PA8

M1

PA9

G8

PA10

L2

PA11

H7

PA12

L1

PA13

J6

PA14

K1

PA15

H6

PA16

K2

PA17

J3

PA18

J1

PA19

J5

PA20

J2

PA21

G6

PA22

G1

PA23

J4

PA24

F8

PA25

H1

PA26

F7

PA27

H2

PA28

F1

PA29

H3

PA30

G2

PA31

H4

U5A

SAM9X6_TFBGA-228

PC0

M4

PC1

P4

PC2

N5

PC3

P5

PC4

L5

PC5

R4

PC6

M6

PC7

T3

PC8

N8

PC9

T4

PC10

P6

PC11

N6

PC12

R5

PC13

L7

PC14

T5

PC15

J7

PC16

R6

PC17

K8

PC18

T6

PC19

L8

PC20

P8

PC21

M8

PC22

R7

PC23

K9

PC24

R8

PC25

L9

PC26

T8

PC27

M9

PC28

N9

PC29

L10

PC30

T7

PC31

M13

U5C

SAM9X6_TFBGA-228

SAM9X60-EK

Function Blocks

The MPDDRC I/Os embed an automatic impedance matching control to avoid overshoots and to reach the best performance levels depending on the bus load and external memories. A serial termination connection scheme, where the driver has an output impedance matched to the characteristic impedance of the line, is used to improve signal quality and reduce EMI. This is done using the ZQ calibration procedure to calibrate the SAM9X60 DDR I/O drive strength. The pin name where the ZQ resistor must be connected is DDR_CAL and, as indicated in the SAM9X60 datasheet for DDR2 case, the resistor value is 20 KOhms.

The DDR_VREF pin serves as a voltage reference input for the DDR I/Os when DDR2 or LPDDR external SDRAM memories are used.

Figure 3-13. DDR Reference Voltage

3.2.6 PIOs

The following sections depict all the signals connected to the SAM9X60 MPU ports.

See Table 3-3 for details about each port’s functions.

Figure 3-14. Processor PIOs PA and PC

User Guide

DS50002907A-page 17

LCD_IRQ2_PB17

ETH0_TXCK_PB04

ETH0_TX0_PB09

ETH0_TXEN_PB07

ETH0_TX1_PB10

ETH0_RX1_PB01

ETH0_RX0_PB00

ETH0_RXER_PB02

ETH0_RXDV_PB03

ETH0_MDC_PB06

ETH0_MDIO_PB05

ETH0_IRQ_PB08

NAND_IO0_PD06 NAND_IO1_PD07 NAND_IO2_PD08 NAND_IO3_PD09 NAND_IO4_PD10 NAND_IO5_PD11 NAND_IO6_PD12 NAND_IO7_PD13

NAND_CLE_PD03

NAND_ALE_PD02

NAND_nWE_PD01

NAND_nRE_PD00

NAND_nCS_PD04

NAND_RB_PD05

USBB_EN_5V_PD15 USBC_EN_5V_PD16

MBUS_AD4_PB15

USBA_VBUSDETECT_PB16

MBUS_RST_PB14

NRST_PB25

SEL_FNCT1_PD19 SEL_FNCT2_PD20

MCP23008_INT_PD17

PB19 PB20 PB21 PB22 PB23 PB24

MBUS_INT_PB18

PB11 PB12 PB13

CAN_STBY_PD21

SAM9X60 PORT PB

SAM9X60 PORT PD

LCD_ID_PD14

USER_BUTTON_PD18

PB0

F4

PB1

C1

PB2

D3

PB3

D1

PB4

E3

PB5

E1

PB6

D2

PB7

A5

PB8

E6

PB9

A2

PB10

A3

PB11

D6

PB12

C2

PB13

A4

PB14

F2

PB15

B5

PB16

B3

PB17

B1

PB18

E4

PB19

C6

PB20

A6

PB21

A7

PB22

B7

PB23

B6

PB24

A8

PB25

E2

U5B

SAM9X6_TFBGA-228

PD0

R14

PD1

T15

PD2

P15

PD3

N14

PD4

R16

PD5

N11

PD6

K16

PD7

J12

PD8

K15

PD9

J10

PD10

L16

PD11

K11

PD12

L15

PD13

J15

PD14

L12

PD15

M16

PD16

M14

PD17

N16

PD18

L13

PD19

P16

PD20

M11

PD21

M15

U5D

SAM9X6_TFBGA-228

22R 0402 1%

R31

22R 0402 1%

R32

22R 0402 1%

R38

22R 0402 1%

R39

22R 0402 1%

R40

22R 0402 1%

R41

SDMMC1_WILC3000_DAT3_PA04

SDMMC1_WILC3000_DAT2_PA03

SDMMC1_WILC3000_DAT1_PA02

SDMMC1_WILC3000_DAT0_PA11

SDMMC1_WILC3000_CMD_PA12

SDMMC1_WILC3000_CK_PA13

FLEXCOM5_IO4_BT_RTS_PA07

FLEXCOM5_IO3_BT_CTS_PA08

PA02

PA03

PA04

PA07

PA08

PA11

PA12

PA13

PA14

22R 0402 1%

R42

22R 0402 1%

R43

22R 0402 1%

R44

22R 0402 1%

R45

22R 0402 1%

R46

22R 0402 1%

R50

22R 0402 1%

R51

22R 0402 1%

R52

22R 0402 1%

R53

22R 0402 1%

R54

22R 0402 1%

R55

22R 0402 1%

R56

22R 0402 1%

R57

22R 0402 1%

R58

22R 0402 1%

R59

EXT40_GPIO_PA02

EXT40_GPIO_PA03

EXT40_GPIO_PA04

EXT40_SPI_MOSI_PA12

EXT40_SPI_MISO_PA11

EXT40_SPI_SCLK_PA13

EXT40_GPIO_PA14

EXT40_NPCS1_PA07

EXT40_NPCS2_PA08

MBUS_NPCS0_PA14

MBUS_SPCK_PA13

MBUS_MISO_PA11

MBUS_MOSI_PA12

QSPI_IO0_PB21

QSPI_IO1_PB22

QSPI_IO2_PB23

QSPI_IO3_PB24

QSPI_SCK_PB19

QSPI_CS_PB20

22R 0402 1%

R69

22R 0402 1%

R70

22R 0402 1%

R71

22R 0402 1%

R72

PB19

PB20

PB21

22R 0402 1%

R74

22R 0402 1%

R75

22R 0402 1%

R77

22R 0402 1%

R79

22R 0402 1%

R80

22R 0402 1%

R81

PB22

PB23

PB24

PC31

EXT40_I2SMCK_PB23

EXT40_CLK1_PC31

EXT40_I2SWS_PB20

EXT40_I2SCK_PB19

EXT40_GPIO_PB24

EXT40_I2SDIN_PB21

EXT40_I2SDOUT_PB22

ETH0_PCK1_PC31

LED_RED_PB11

LED_GREEN_PB12

LED_BLUE_PB13

EXT40_CLK2_PB13

EXT40_PWM1_PB12

EXT40_PWM0_PB11

0R 0402

R66

0R 0402

R63

0R 0402

R60

PB11

PB12

PB13

MBUS_PWM_PB13

0R 0402

R65

22R 0402 1%

R82

22R 0402 1%

R85

22R 0402 1%

R86

22R 0402 1%

R88

SAM9X60-EK

Function Blocks

Figure 3-15. Processor PIOs PB and PD

Some of the ports were multiplexed to accommodate more devices on the evaluation kit and to showcase all the functions the SAM9X60 MPU can address off a single PIO wire.

Most of the ports that share multiple functions are split through passive resistors placed on the board as close to the MPU as possible, therefore no other hardware change must be made. In most cases, the user can use only one of their functions at a time, or can develop a composite driver enabling the use of multiple functions at the same time.

Figure 3-16. Processor PIO Muxing

Table 3-3. Processor PIOs Pin Assignment and Signal Description

Pad Power Rail Function I/O Type

PA0 VDDIOP0 (3.3V) FLEXCOM0_IO0

PA1 VDDIOP0 (3.3V) FLEXCOM0_IO1

TWI Data (TWD) bidirectional line shared between the LCD, EEPROMs and external 40-pin header

TWI Clock (TWCK) output line shared between the LCD, EEPROMs and external 40-pin header

User Guide

DS50002907A-page 18

...........continued

Pad Power Rail Function I/O Type

SAM9X60-EK

Function Blocks

PA2 VDDIOP0 (3.3V)

PA3 VDDIOP0 (3.3V)

PA4 VDDIOP0 (3.3V)

PA51VDDIOP0 (3.3V)

PA61VDDIOP0 (3.3V)

PA7 VDDIOP0 (3.3V)

PA8 VDDIOP0 (3.3V)

SDMMC1_DAT1

GPIO GPIO going to the external 40-pin header

FLEXCOM0_IO3

GPIO GPIO going to the external 40-pin header

FLEXCOM0_IO2

GPIO GPIO going to the external 40-pin header

FLEXCOM1_IO0 UART Transmit (TX) output line going to the external 40-pin header

CANTX1

FLEXCOM1_IO1 UART Receive (RX) input line going to the external 40-pin header

CANRX1

FLEXCOM4_IO4 First SPI Chip Select (nCS) output line for the external 40-pin header

FLEXCOM5_IO4 SPI Request to Send (RTS) output line for the BT module

FLEXCOM4_IO5

FLEXCOM5_IO3 SPI Clear to Send (CTS) input line for the BT module

SDIO Data 1 (I/O1) bidirectional line for the ATWILC3000 Wi-Fi/BT module

SDIO Data 2 (I/O2) bidirectional line for the ATWILC3000 Wi-Fi/BT module

SDIO Data 3 (I/O3) bidirectional line for the ATWILC3000 Wi-Fi/BT module

CAN Transmit (CANTX) output line going to the second CAN transceiver MCP2542

CAN Receive (CANRX) input line going to the second CAN transceiver MCP2542

Second SPI Chip Select (nCS) output line for the external 40-pin header

PA92VDDIOP0 (3.3V)

PA102VDDIOP0 (3.3V)

PA11 VDDIOP0 (3.3V)

PA12 VDDIOP0 (3.3V)

PA13 VDDIOP0 (3.3V)

PA14 VDDIOP0 (3.3V)

DRXD DEBUG UART Receive (DRX) input line

CANRX0

DTXD DEBUG UART Transmit (DTX) input line

CANTX0

FLEXCOM4_IO1

SDMMC1_DAT0

FLEXCOM4_IO0

SDMMC1_CMD

FLEXCOM4_IO2

SDMMC1_CK

FLEXCOM4_IO3 SPI Chip Select (nCS) output line for the mikroBUS connector

GPIO GPIO going to the external 40-pin header

CAN Receive (CANRX) input line going to the first CAN transceiver MCP2542

CAN Transmit (CANTX) output line going to the first CAN transceiver MCP2542

SPI Master Input Slave Output (MISO) input line shared between the mikroBUS and external 40-pin connectors

SDIO Data 0 (I/O0) bidirectional line going to the ATWILC3000 WiFi/BT module

SPI Master Output Slave Input (MOSI) output line shared between the mikroBUS and external 40-pin connectors

SDIO Command (CMD) bidirectional line going to the ATWILC3000 Wi-Fi/BT module

SPI Source Clock (SCLK) output line shared between the mikroBUS and external 40-pin connectors

SDIO Data 0 (I/O0) bidirectional line going to the ATWILC3000 WiFi/BT module

User Guide

DS50002907A-page 19

SAM9X60-EK

Function Blocks

...........continued

Pad Power Rail Function I/O Type

PA15 VDDIOP0 (3.3V) SDMMC0_DAT0 SDIO Data 0 (I/O0) bidirectional line going to the SD card connector

PA16 VDDIOP0 (3.3V) SDMMC0_CMD

PA17 VDDIOP0 (3.3V) SDMMC0_CK SDIO Clock (CLK) output line going to the SD card connector

PA18 VDDIOP0 (3.3V) SDMMC0_DAT1 SDIO Data 1 (I/O1) bidirectional line going to the SD card connector

PA19 VDDIOP0 (3.3V) SDMMC0_DAT2 SDIO Data 2 (I/O2) bidirectional line going to the SD card connector

PA20 VDDIOP0 (3.3V) SDMMC0_DAT3 SDIO Data 3 (I/O3) bidirectional line going to the SD card connector

PA21 VDDIOP0 (3.3V) FLEXCOM5_IO1

PA22 VDDIOP0 (3.3V) FLEXCOM5_IO0

PA23 VDDIOP0 (3.3V) GPIO

PA24 VDDIOP0 (3.3V) CLASSD_L0 CLASSD Left Output L0

PA25 VDDIOP0 (3.3V) CLASSD_L1 CLASSD Left Output L1

PA26 VDDIOP0 (3.3V) CLASSD_L2 CLASSD Left Output L2

PA27 VDDIOP0 (3.3V) CLASSD_L3 CLASSD Left Output L3

PA28 VDDIOP0 (3.3V) GPIO / WKUP4

PA29 VDDIOP0 (3.3V) GPIO

SDIO Command (CMD) bidirectional line going to the SD card connector

UART Receive (RX) input line shared between the mikroBUS connector and the BT transceiver on the ATWILC3000 module

UART Transmit (TX) output line shared between the mikroBUS connector and the BT transceiver on the ATWILC3000 module

GPIO used as input to detect when an SD card has been inserted in the SD connector

GPIO Input used to signal any interrupt coming from the WILC300 WiFi/BT module

GPIO Output used to enable the WILC300 Wi-Fi/BT module by enabling its power supply

PA30 VDDIOP0 (3.3V) FLEXCOM6_IO0

PA31 VDDIOP0 (3.3V) FLEXCOM6_IO1

PB0 VDDANA (3.3V) E0_RX0 RMII Ethernet Receive Data 0 signal going to KSZ8081

PB1 VDDANA (3.3V) E0_RX1 RMII Ethernet Receive Data 1 signal going to KSZ8081

PB2 VDDANA (3.3V) E0_RXER RMII Ethernet Receive Error signal going to KSZ8081

PB3 VDDANA (3.3V) E0_RXDV RMII Ethernet Receive Data Valid signal going to KSZ8081

PB4 VDDANA (3.3V) E0_TXCK RMII Ethernet Transmit Clock signal going to KSZ8081

PB5 VDDANA (3.3V) E0_MDIO RMII Ethernet Management Data I/O signal going to KSZ8081

PB6 VDDANA (3.3V) E0_MDC RMII Ethernet Management Data Clock signal going to KSZ8081

PB7 VDDANA (3.3V) E0_TXEN RMII Ethernet Receive Data Valid signal going to KSZ8081

PB8 VDDANA (3.3V) E0_TXER RMII Ethernet Transmit Coding Error signal going to KSZ8081

PB9 VDDANA (3.3V) E0_TX0 RMII Ethernet Transmit Data 0 signal going to KSZ8081

PB10 VDDANA (3.3V) E0_TX1 RMII Ethernet Transmit Data 1 signal going to KSZ8081

PB11 VDDANA (3.3V) PWM0

TWI Data (TWD) bidirectional signal shared between PAC1934, PAC1710, MPC23008 and the mikroBUS connector

TWI Clock (TWCK) Bidirectional signal shared between PAC1934, PAC1710, MPC23008 and the mikroBUS connector

PWM signal shared between the LD1 red LED and the 40-pin connector

User Guide

DS50002907A-page 20

...........continued

Pad Power Rail Function I/O Type

SAM9X60-EK

Function Blocks

PB12 VDDANA (3.3V) PWM1

PB13 VDDANA (3.3V) PWM2

PB14 VDDANA (3.3V) GPIO GPIO output used as the reset signal for the mikroBUS connector

PB15 VDDANA (3.3V) AD4 Analog input for the mikroBUS connector

PB16 VDDANA (3.3V) GPIO

PB17 VDDANA (3.3V) GPIO GPIO input used to signal any interrupt request from the LCD

PB18 VDDANA (3.3V) GPIO

QSCK QSPI Serial Clock (SCK) signal going to SST26VF064B

PB19 VDDQSPI (3.3V)

I2SMCC_CK I2S Bit Clock (CK) signal going to the 40-pin connector

QCS QSPI Chip Select (CS) signal going to SST26VF064B

PB20 VDDQSPI (3.3V)

I2SMCC_WS I2S Word Select (WS) signal going to the 40-pin connector

QIO0 QSPI Data I/O 0 (IO0) signal going to SST26VF064B

PB21 VDDQSPI (3.3V)

I2SMCC_DIN0 I2S Data IN 0 (DIN0) signal going to the 40-pin connector

QIO1 QSPI Data I/O 1 (IO1) signal going to SST26VF064B

PB22 VDDQSPI (3.3V)

I2SMCC_DOUT0 I2S Data Out 0 (DOUT0) signal going to the 40-pin connector

PWM signal shared between the LD1 green LED and the 40-pin connector

PWM signal shared between the LD1 blue LED, the mikroBUS and the 40-pin connectors

GPIO input used to detect if the board has been connected to a host on the USBA port

GPIO input used to signal any interrupt request from the mikroBUS connector

PB23 VDDQSPI (3.3V)

PB24 VDDQSPI (3.3V)

PB25 VDDIOP0 (3.3V) NRST_OUT Output signal used to reset all the devices on the board

PC0 VDDIOP1 (3.3V)

PC1 VDDIOP1 (3.3V)

PC2 VDDIOP1 (3.3V)

PC3 VDDIOP1 (3.3V)

QIO2 QSPI Data I/O 2 (IO2) signal going to SST26VF064B

I2SMCC_MCK I2S Master Clock (MCK) signal going to the 40-pin connector

QIO3 QSPI Data I/O 3 (IO3) signal going to SST26VF064B

GPIO GPIO signal going to the 40-pin connector

LCDDAT0 LCD Data Output 0 (DAT0) signal going to the LCD connector

ISI_D0

LCDDAT1 LCD Data Output 1 (DAT1) signal going to the LCD connector

ISI_D1

LCDDAT2 LCD Data Output 2 (DAT2) signal going to the LCD connector

ISI_D2

LCDDAT3 LCD Data Output 3 (DAT3) signal going to the LCD connector

ISI_D3

Image Sensor Interface (ISI) Data Input 0 (D0) signal going to the ISI connector

Image Sensor Interface (ISI) Data Input 1 (D1) signal going to the ISI connector

Image Sensor Interface (ISI) Data Input 2 (D2) signal going to the ISI connector

Image Sensor Interface (ISI) Data Input 3 (D3) signal going to the ISI connector

User Guide

DS50002907A-page 21

Microchip SAM9X60-EK User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Scope

Table of Contents

1. Introduction

1.1 Document Layout

1.2 Recommended Reading

2. Product Overview

2.1 SAM9X60-EK Features

2.2 Evaluation Kit Specifications

2.3 Power Sources

2.4 Connectors on Board

2.5 Default Jumper Settings

2.6 Kit Content

3. Function Blocks

3.1 Power Supply Topology and Power Distribution

3.1.1 Input Power Options

3.1.2 Power Management Integrated Circuit

3.1.3 Shutdown Circuitry

3.1.4 Battery Unit

3.1.5 Current Measurement

3.2 Processor

3.2.1 Power Supply

3.2.2 Main Configuration and Control

3.2.3 Clock Circuitry

3.2.4 Reset Circuitry

3.2.5 DDR Controller (MPDDRC)

3.2.6 PIOs