This user's guide introduces the SAM9X60 Evaluation Kit (SAM9X60-EK) and describes the development and
debugging capabilities running on SAM9 Arm®-based embedded MPUs.
The Microchip Website.................................................................................................................................65
Hundreds of possible Click
extensions featuring Microchip
functions inside
Microchip MIC2800, MCP1725
Microchip PAC1934, PAC1710
™
DS50002907A-page 4
2.2 Evaluation Kit Specifications
CAUTION
Table 2-2. Evaluation Kit Specifications
CharacteristicSpecification
BoardSAM9X60-EK
Board supply voltageExternal or USB-powered
SAM9X60-EK
Product Overview
Temperature
Relative humidity0 to 90% (non-condensing)
Main board dimensions150 × 125 × 20 mm
RoHS statusCompliant
Board identificationSAM9X60 Evaluation Kit
2.3 Power Sources
Two options are available to power up the SAM9X60-EK board:
• Powering through an external AC to DC +5V wall adapter connector (J1)
• Powering through the USB Micro-B connector on the USBA port (J7 – default choice)
Table 2-3. Electrical Characteristics
Electrical ParametersValue
Input voltage5VDC
Maximum input voltage (limits)6VDC
Maximum 3.3VDC current300 mA
Operating: 0°C to +70°C
Storage: –40°C to +85°C
The SAM9X60-EK board runs at a 3.3V voltage level logic. The maximum voltage that the I/O pins can
tolerate is 3.3V. Providing higher voltages (e.g., 5V) to an I/O pin could damage the board.
2.4 Connectors on Board
The fully-featured SAM9X60-EK board integrates multiple peripherals and interface connectors, as shown in the
following figures.
This section covers the specifications of the SAM9X60-EK and provides a high-level description of the board's major
components and interfaces. This document is not intended to provide detailed documentation about the processor or
about any other component used on the board. It is expected that the user will refer to the appropriate documents of
these devices to access detailed information.
Figure 3-1. SAM9X60-EK Block Diagram
SAM9X60-EK
Function Blocks
3.1 Power Supply Topology and Power Distribution
budget for all the devices on the board and a correct power-up sequence for the MPU. The power-up and powerdown sequences indicated in the SAM9X60 datasheet must be respected for a reliable operation of the device.
3.1.1 Input Power Options
The SAM9X60-EK board can be powered through:
This section describes the implementation and the circuitry that ensures adequate voltage stability and current
The +5V from the wall adapter is protected through an NCP349 positive overvoltage controller switch. The controller
is able to disconnect the system from its output pin when incorrect input operating conditions are detected (5.83V
max).
The USB-powered operation comes from the USB device port connected to a PC or a 5VDC supply. The USB supply
is enough to power the board in most applications. It is important to note that when the USB supply is used, the USB
port has limited power. If USB Host port is required for the application, it is recommended that the external DC supply
be used.
• an external AC to DC +5V wall adapter connected via a 2.1 mm center-positive plug into the power jack of the
board (J1). The recommended output capacity of the power adapter is 2A,
• USB port A (J7).
User Guide
DS50002907A-page 9
0.1uF
50V
0402
C3
0.1uF
50V
0402
C9
GND
IN
1
IN_PAD
7
EN
6
GND
2
FLAG
3
OUT2
5
OUT1
4
NCP349MNAETBG
U1
2
3
1
2.1mm
EJ508A
J1
VDD_MAIN_5V_
GND
EXT_5VDC_5V
180R 0603
FB1
USB_5V
0.1uF
50V
0402
C7
2
71
6
SIA923AEDJ-T1-GE3
Q1A
5
84
3
SIA923AEDJ-T1-GE3
Q1B
2
71
6
SIA923AEDJ-T1-GE3
Q2A
5
84
3
SIA923AEDJ-T1-GE3
Q2B
GNDGNDGNDGND
GNDGNDGND
100µF
16V
Radial, Can
C4
GND
USBA_VBUS_5V
10uF
25V
1206
C1
10uF
25V
1206
C2
10uF
25V
1206
C8
100k
0402
5%
R2
100k
0402
5%
R3
100k
0402
5%
R5
PIC101
PIC102
COC1
PIC201
PIC202
COC2
PIC301
PIC302
COC3
PIC401
PIC402
COC4
PIC701
PIC702
COC7
PIC801
PIC802
COC8
PIC901
PIC902
COC9
PIFB101
PIFB102
COFB1
PIJ101
PIJ102
PIJ103
COJ1
PIQ101
PIQ102
PIQ106
PIQ107
COQ1A
PIQ103
PIQ104
PIQ105
PIQ108
COQ1B
PIQ201
PIQ202
PIQ206
PIQ207
COQ2A
PIQ203
PIQ204
PIQ205
PIQ208
COQ2B
PIR201
PIR202
COR2
PIR301
PIR302
COR3
PIR501
PIR502
COR5
PIU101
PIU102
PIU103
PIU104
PIU105
PIU106
PIU107
COU1
PIC201
PIC301
PIQ101
PIQ202
PIQ205
PIR202
PIU104
PIU105
PIC101
PIJ101
PIU101
PIU107
PIC102
PIC202
PIC302
PIC402
PIC702
PIC802
PIC902
PIJ102
PIR201
PIR301
PIR501
PIU102
PIU106
PIJ103
PIQ102
PIQ105
PIQ203
PIQ206
PIQ207
PIQ208
PIR302
PIQ103
PIQ106
PIQ107
PIQ108
PIU103
PIC801
PIC901
PIFB102
PIQ201
PIR502
PIC701
PIFB101
PIC401
PIQ104
PIQ204
SAM9X60-EK
Function Blocks
The switch between the two powering options is made by four transistors that ensure the separation between the two
when both are plugged. The switch prioritizes powering from the wall adapter to maximize power transfer.
The following figure shows the input power supply topology.
Figure 3-2. Input Power Options
Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for any
project that requires only a 5V source at up to 500 mA.
3.1.2 Power Management Integrated Circuit
The MIC2800 is a high-performance power management IC providing three output voltages with maximum efficiency.
Integrating a 2-MHz DC/DC converter with an LDO post-regulator, the MIC2800 gives two high-efficiency outputs with
a second, 300 mA LDO for maximum flexibility. The DC-to-DC converter uses small values of L and C to reduce
board space while still retaining efficiency over 90% at load currents up to 600 mA. For more information about the
MIC2800, refer to the product web page.
Each LDO has an independent Enable (EN) pin thus allowing a proper power-up sequence for the MPU. The 20 KΩ
resistor in series and the 0.1 µF capacitor in parallel with the EN1 input make a low-pass filter and introduce the
necessary delay between the 3.3V and 1.15V rails needed for the proper operation of the MPU. The diode (D1 in
Figure 3-3) ensures that the capacitor fast discharges during the power-down sequence.
Detailed information on the SAM9X60 MPU power supplies and power-up/down considerations are described in
section “Electrical Characteristics” in the SAM9X60 device datasheet (see 1.2 Recommended Reading).
The MIC2800-G8S comes preset to supply all the voltage rails needed by the system:
• 1.8V DC/DC supplies SAM9X60 DDR2 pads (VDDIOM) and devices.
• 1.15V LDO1 supplies SAM9X60 Core (VDDCORE).
• 3.3V LDO2 supplies SAM9X60 I/O pads.
The figure below shows the power management scheme.
The processor can assert the SHDN signal to shut down the PMIC and enter Power-down mode. This is done by
pulling both enable pins of the PMIC to GND through a Field Effect Transistor (FET) scheme.
Jumper J3 must not be set to enable this functionality. By setting jumper JP2/J3, the user can shut down the MPU
without powering down its power rails.
Figure 3-4. Shutdown Circuitry
SAM9X60-EK
Function Blocks
3.1.4 Battery Unit
A 3.3V battery (supercapacitor) is implemented to permanently maintain the VDDBU voltage.
This function allows the user to shut down the MPU and the system, thus entering a low power mode, and still keep
the custom configuration that was previously set in the MPU backup area. While in Shut-down mode, the board can
be woken up by action on the SW2 button (WAKE UP), which signals the MPU to resume operations.
Jumper JP1/J2 must be in place for proper operation of the MPU, and can be removed if the user wants to bring the
MPU back to the initial configuration, by resetting the General Purpose Backup Registers (GPBR).
Make sure the board is powered off before removing the JP1/J2 jumper.
User Guide
DS50002907A-page 11
Figure 3-5. Battery Unit
220mF
3.3V
P8.3L11.7D6.8H1.8
C23
1
2
3
BAT54C
D2
PMEG6010ER
D3
VDDBU
GND
Shunt 2.54mm 1x2
JP1
VDD_3V3
12
HDR-2.54 Male 1x2
J2
100R
0402
1%
R20
PIC2301
PIC2302
COC23
PID201
PID202
PID203
COD2
PID301
PID302
COD3
PIJ201
PIJ202
COJ2
COJP1
PIR2001
PIR2002
COR20
PIC2302
PIC2301
PID202
PIR2002
PID203
PIJ202
PID302
PIR2001
PID201
PID301
PIJ201
I2C ADR : 1001_101[R/W]
GNDGNDGND
10k
0402
5%
R4
VDD_3V3
VDD_MAIN_5V_VDD_MAIN_5V
PAC1710_TWCK
PAC1710_TWD
VDD_MAIN_5V
GND
PAC1710_INT
12
3
4
0.01R
1206
1%
0.25W
R1
SENSE+
1
SENSE-
2
NC
3
NC
4
GND
5
ADDR_SEL
6
ALERT#
7
SMDATA
8
SMCLK
9
VDD
10
PAD
11
PAC1710
U2
5V_P5V_N
TP LOOP Black TH
TP1
4.7uF
10V
0402
C5
0.1uF
50V
0402
C6
VDD_3V3_LDO
100R
0402
1%
R6
PIC501
PIC502
COC5
PIC601
PIC602
COC6
PIR101
PIR102
PIR103
PIR104
COR1
PIR401
PIR402
COR4
PIR601
PIR602
COR6
PITP101
COTP1
PIU201
PIU202
PIU203
PIU204
PIU205
PIU206
PIU207
PIU208
PIU209
PIU2010
PIU2011
COU2
PIVDD0MAIN05V01
COVDD0MAIN05V
PIR104
PIU202
NL5V0N
PIR103
PIU201
NL5V0P
PIC501
PIC601
PIR602
PITP101
PIU205
PIU2011
PIR601
PIU206
PIU203
PIU204
PIR401
PIU207
POPAC17100INT
PIU209
POPAC17100TWCK
PIU208
POPAC17100TWD
PIR402
PIC502
PIC602
PIU2010
PIR102
PIVDD0MAIN05V01
PIR101
POPAC17100INT
POPAC17100TWCK
POPAC17100TWD
3.1.5 Current Measurement
Two Microchip DC power/energy monitors are embedded on the SAM9X60-EK board:
• one single high-side current sense monitor PAC1710
• one four-channel current sense monitor PAC1934
Both chips communicate with the MPU via a Two-wire Interface (TWI) and both output their ALERT# signal to a port
expander.
The PAC1710 is a single high-side bidirectional current sensing monitor with precision voltage measurement
capabilities. The power monitor measures the voltage developed across an external sense resistor to represent the
high-side current of a battery or voltage regulator. The PAC1710 also measures the SENSE+ pin voltage and
calculates average power over the integration period. The PAC1710 can be programmed to assert the ALERT# pin
when high and low limits are exceeded for current sense and bus voltage. For more information about the PAC1710,
refer to the product web page.
One current sense resistor is populated on board for measuring voltage and current on the main 5V power rail.
Figure 3-6. PAC1710 Current Measurement
SAM9X60-EK
Function Blocks
Table 3-1. PAC1710 Signal Descriptions
PIOSignal NameShared PIOSignal Description
PA31PAC1710_TWCKPower TWITWI clock
PA30PAC1710_TWDPower TWITWI data
–PAC1710_INT–Interrupt – to port expander U6
The PAC1934 is a four-channel power/energy monitor with current sensor amplifier and bus voltage monitors that
feed high resolution ADCs. Digital circuitry performs power calculations and energy accumulation. The PAC1934
enables energy monitoring with integration periods from 1 ms to up to 36 hours. Bus voltage, sense resistor voltage,
and accumulated proportional power are stored in registers for retrieval by the system master or embedded
controller. For more information about the PAC1934, refer to the product web page.
Four current sense resistors are populated on board for measuring voltage and current consumption on the power
rails:
• 3.3V VDD_3V3_MPU - MPU on the 3.3V rail
• 3.3V VDD_3V3_SYS - rest of the system on the 3.3V rail
• 1.8V VDDIOM - MPU and DDR2 memory
• 1.15V VDDCORE – MPU core
Figure 3-7. PAC1934 Current Measurement
Table 3-2. PAC1934 Signal Descriptions
PIOSignal NameShared PIOSignal Description
PA31PAC1934_TWCKPower TWITWI clock
PA30PAC1934_TWDPower TWITWI data
–PAC1934_INT–Interrupt – to port expander U6
3.2 Processor
The SAM9X60 is a high-performance, ultra-low power ARM926EJ-S CPU-based embedded microprocessor (MPU)
running up to 600 MHz, with support for multiple memories such as SDRAM, LPSDRAM, LPDDR, DDR2, QSPI and
e.MMC Flash. The device integrates powerful peripherals for connectivity and user interface applications, and offers
security functions (tamper detection, etc.), TRNG, as well as high-performance crypto accelerators for AES and SHA.
Refer to the SAM9X60 datasheet for more information (see 1.2 Recommended Reading).
3.2.1 Power Supply
The PMIC (main regulator) provides all power supplies required by the SAM9X60 device:
Decoupling capacitors are placed close to the MPU power pins to stabilize the voltage rails.
• 1.8V for VDDIOM
• 3.3V for VDDIOP0, VDDIOP1, VDDANA, VDDNF, VDDQSPI, VDDIN33 and VDDBU
User Guide
DS50002907A-page 13
Figure 3-8. Processor Power Supplies
GND
0.1uF16V0201
C32
0.1uF16V0201
C33
SAM9X60POWERSUPPLY
4.7uF10V0402
C31
VDDCORE
L6
VDDCORE
F6
VDDCORE
F11
VDDIOM
G14
VDDIOM
C10
VDDIOM
C13
VDDANA
C4
VDDIN33
P13
VDDOUT25
P10
VDDIN33
L11
GND
J8
GND
E7
GND
G12
GNDANA
B4
GNDIN33
R13
VDDNF
K14
VDDIOP0
G3
GND
E10
GND
B13
GND
K5
GND
G5
GND
N15
VDDQSPI
C7
VDDIOP0
K3
GND
H8
GND
H9
GNDIN33
M10
GND
K12
GND
T16
GND
A1
GND
A16
GND
T1
VDDBU
P7
GND
M7
VDDIOP1
N3
GND
N2
U5G
SAM9X6_TFBGA-228
VDDOUT25
VDDBU
VDDCORE
VDDIOM
0.1uF16V0201
C34
0.1uF16V0201
C36
0.1uF16V0201
C37
0.1uF16V0201
C38
0.1uF16V0201
C41
0.1uF16V0201
C42
0.1uF16V0201
C43
0.1uF16V0201
C44
0.1uF16V0201
C45
0.1uF16V0201
C46
0.1uF16V0201
C48
0.1uF16V0201
C49
4.7uF10V0402
C47
0.1uF16V0201
C50
0.1uF16V0201
C51
GND
4.7uF10V0402
C35
VDDIN33
VDDIN33
2.2uF10V0402
C52
4.7uF10V0402
C40
4.7uF10V0402
C39
0R 0402
R30
VDD_3V3_MPU
VDD_3V3_MPU
SAM9X60-EK
Function Blocks
3.2.2 Main Configuration and Control
This block depicts the main block for processor configuration and control:
• XIN and XOUT are the Main Clock Oscillator input/output.
• XIN32 and XOUT32 are the Slow Clock Oscillator input/output.
• SHDN is an output signal used to enable and disable an external power supply circuit.
• WKUP is an event detection input pin used to wake up the processor from Shutdown state.
• JTAGSEL is an input that when pulled high enables the JTAG boundary scan.
• TCK, TDI, TDO, TMS and RTCK are used for JTAG communication.
• nRST is the processor main reset input.
• HHSD_A/B/C are the three USB ports embedded inside the MPU.
• RTUNE is used for USB external tuning.
• TST input is reserved for processor manufacturing tests.
• ADVREFP and ADVREFN are the positive and negative reference points for the embedded analog comparator.
A small low-pass filter is placed to reduce the input noise and improve accuracy.
Figure 3-9. Processor Main Configuration and Control
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_RTCK
USBA_N
USBA_P
USBB_N
USBB_P
USBC_N
USBC_P
0R
0402
R26
VDDBU
5.62k
04021%
R23
SHDN
WAKE_UP
XIN
XOUT
XIN32
XOUT3 2
GND
GND
SAM9X60CONFIG
GND
1uF
10V
0201
C28
10R
0201
1%
R25
0R0402
R22
DNP
VDD_3V3_MPU
MPU_nRST
XIN
R10
XOUT
T10
XIN32
T9
XOUT32
R9
SHDN
R11
WKUP
T11
JTAGSEL
P9
nRST
R1
TST
J9
HHSDPA
T12
HHSDMA
R12
HHSDPB
T13
HHSDMB
T14
HHSDPC
P12
HHSDMC
N12
TCK
R3
TDI
F3
TDO
H5
TMS
F5
RTCK
T2
ADVREFP
D5
RTUNE
P11
ADVREFN
C5
U5F
SAM9X6_TFBGA-228
0.1uF
50V
0402
C29
GND
TP2
VDD_3V3
GND
XIN
GND
24MHz
18pF
ABM8G-24.000MHZ-18-D2Y-T
Y1
DNP
27pF
0402
C24
DNP
27pF0402
C25
DNP
1M
0402
5%
R21
DNP
STB
1
GND
2
OUT
3
VDD
4
24MHz
DSC1001CI5-024.0000
Y3
GND
XOUT
0R
0402
R28
32.768Khz
ABS06-32.768KHZ-T
Y2
GND
XIN32
XOUT32
20pF
0402
C26
20pF0402
C27
1M
0402
5%
R24
DNP
0R
0402
R27
DNP
0R
0402
R91
DNP
XIN
XOUT
51R
0402
R149
3.2.3 Clock Circuitry
The embedded MPU generates its necessary clocks based on two oscillators: one slow clock (SLCK) oscillator
running at 32.768 kHz and one main clock oscillator running at 24 MHz.
The main clock oscillator is implemented with a MEMS (Micro Electro-Mechanical System) device DSC1001.
For evaluation purposes, we leave users the freedom to mount a crystal instead, using the PCB footprint reservation
(Y1). In that case, resistors R149 and R28 should be removed, resistors R27 and R91 should be populated and
capacitors C24 and C25 should be populated with the appropriate load capacitance for the selected crystal.
The MPDDRC I/Os embed an automatic impedance matching control to avoid overshoots and to reach the best
performance levels depending on the bus load and external memories. A serial termination connection scheme,
where the driver has an output impedance matched to the characteristic impedance of the line, is used to improve
signal quality and reduce EMI. This is done using the ZQ calibration procedure to calibrate the SAM9X60 DDR I/O
drive strength. The pin name where the ZQ resistor must be connected is DDR_CAL and, as indicated in the
SAM9X60 datasheet for DDR2 case, the resistor value is 20 KOhms.
The DDR_VREF pin serves as a voltage reference input for the DDR I/Os when DDR2 or LPDDR external SDRAM
memories are used.
Figure 3-13. DDR Reference Voltage
3.2.6 PIOs
The following sections depict all the signals connected to the SAM9X60 MPU ports.
See Table 3-3 for details about each port’s functions.
Some of the ports were multiplexed to accommodate more devices on the evaluation kit and to showcase all the
functions the SAM9X60 MPU can address off a single PIO wire.
Most of the ports that share multiple functions are split through passive resistors placed on the board as close to the
MPU as possible, therefore no other hardware change must be made. In most cases, the user can use only one of
their functions at a time, or can develop a composite driver enabling the use of multiple functions at the same time.
Figure 3-16. Processor PIO Muxing
Table 3-3. Processor PIOs Pin Assignment and Signal Description
NAND Flash Command Latch Enable (CLE) output signal going to
MT29F4G08ABAEA
NAND Flash Chip Select (CLE) output signal going to
MT29F4G08ABAEA
NAND Flash Ready/busy# (R/B#) input pin provides a hardware
method of detecting PROGRAM or ERASE cycle completion from
MT29F4G08ABAEA
NAND Flash Data 0 (D0) Bidirectional signal going to
MT29F4G08ABAEA
NAND Flash Data 1 (D1) Bidirectional signal going to
MT29F4G08ABAEA
NAND Flash Data 2 (D2) Bidirectional signal going to
MT29F4G08ABAEA
NAND Flash Data 3 (D3) Bidirectional signal going to
MT29F4G08ABAEA
NAND Flash Data 4 (D4) Bidirectional signal going to
MT29F4G08ABAEA
User Guide
DS50002907A-page 23
...........continued
PadPower RailFunctionI/O Type
SAM9X60-EK
Function Blocks
PD11 VDDNF (3.3V)D21
PD12 VDDNF (3.3V)D22
PD13 VDDNF (3.3V)D23
PD14 VDDNF (3.3V)GPIO
PD15 VDDNF (3.3V)GPIOGPIO used as output for enabling the 5V supply on the USBB port
PD16 VDDNF (3.3V)GPIOGPIO used as output for enabling the 5V supply on the USBC port
PD17 VDDNF (3.3V)GPIO
PD18 VDDNF (3.3V)GPIOGPIO used as input to probe the changes of the user button
PD19 VDDNF (3.3V)GPIO
PD20 VDDNF (3.3V)GPIO
NAND Flash Data 5 (D5) Bidirectional signal going to
MT29F4G08ABAEA
NAND Flash Data 6 (D6) Bidirectional signal going to
MT29F4G08ABAEA
NAND Flash Data 7 (D7) Bidirectional signal going to
MT29F4G08ABAEA
GPIO used to identify the type of LCD connected by reading the
information stored on an EEPROM placed on the LCD through the
OneWire interface
GPIO used as input to signal any interrupt request from the
MCP23008 GPIO expander
GPIO used as output for selecting between the functions of PA05 and
(1)
PA06
HIGH = UART to 40-pin connector LOW = CAN1 communication
GPIO used as output for selecting between the functions of PA10 and
(2)
PA09
HIGH = Enable DEBUG UART
LOW = CAN0 communication
PD21 VDDNF (3.3V)D31
Note:
1.The selection of the functions of ports PA5 and PA6 must also comply with the state of PD19 as this signal
commands an analog switch placed on the board.
2.The selection of the functions of ports PA9 and PA10 must also comply with the state of PD20 as this signal
commands an analog switch placed on the board.
3.2.7 Dedicated Two-wire Interfaces
The SAM9X60-EK features two dedicated TWIs to access the devices present on board.
The TWI interface uses only two lines, namely serial data (TWD) and serial clock (TWCK). According to the standard,
the TWI clock rate is limited to 400 kHz in Fast mode and 100 kHz in Normal mode, but a configurable baud rate
generator permits the output data rate to be adapted to a wide range of core clock frequencies. The TWI supports
both Master and Slave modes.
One interface is used to access the devices placed in the lower left side of the board:
• The PAC1934 voltage monitor (address: 0010_111[R/W])
• The PAC1710 voltage monitor (address: 1001_101[R/W])
• The MCP23008 Port Expander (address: 0100_000[R/W])
• And any device placed on the mikroBUS connector
GPIO used as output to place the CAN transceivers in or out of
standby
The second interface is used to access the devices placed in the upper right side of the board:
• The 24AA025E48 serial EEPROM (address: 1010_011[R/W])
• The LCD or camera connected on the ISI connector
• And any device connected on the external 40-pin connector
Figure 3-18. Board Upper Right TWI Interface
Function Blocks
3.2.8 I/O Expander
The SAM9X60-EK features an 8-bit I/O expander with serial TWI interface MCP23008.
The MCP23008 consists of multiple 8-bit configuration registers for input, output and polarity selection. The system
master can enable the I/Os as either inputs or outputs by writing the I/O configuration bits.
The data for each input or output is kept in the corresponding input or output register. The polarity of the Input Port
register can be inverted with the Polarity Inversion register. All registers can be read by the system master.
The interrupt output can be configured to activate under two (mutually exclusive) conditions:
• When any input state differs from its corresponding input port register state (indicating to the system master that
an input state has changed)
• When an input state differs from a preconfigured register value
The Interrupt Capture register captures port values at the time of the interrupt, thereby saving the condition that
caused the interrupt.
The Power-on Reset (POR) sets the registers to their default values and initializes the device state machine.
The MCP23008 communicates with the MPU via a TWI bus.
Ports PA09 and PA10 are shared between the CAN0 transceiver and the DEBUG UART interface going to the
DEBUG connector. The selection is done using port PD20:
• HIGH = DEBUG UART communication
• LOW = CAN0 communication
Figure 3-21. Selection between CAN0 or DBGU UART
Ports PA21 and PA22 are shared between a UART interface going to the mikroBUS connector and the UART
interface used to access and configure the Bluetooth functions of the ATWILC3000 module. The selection is done
using port PA29:
Figure 3-22. Selection between mikroBUS UART or ATWILC3000 Bluetooth UART
FLEXCOM5_IO1_RX_PA21
FLEXCOM5_IO0_TX_PA22
GND
GND
VDD_3V3
VDD_3V3
GND
GND
MBUS_RX
MBUS_TX
22R 0402 1%
R156
22R 0402 1%
R157
22R 0402 1%
R158
22R 0402 1%
R159
OE1
1
OE2
7
IN1
2
OUT2
3
GND
4
VCC
8
OUT1
6
IN2
5
NL27WZ125USG
U21
OE1
1
OE2
7
IN1
2
OUT2
3
GND
4
VCC
8
OUT1
6
IN2
5
NL27WZ126USG
U23
WILC3000_ENABLE_PA29
0.1uF
50V0402
C125
0.1uF
50V0402
C129
WILC_BT_TX
WILC_BT_RX
When developing an application, the designer must keep in mind to first configure the values for the selection ports
(PA29, PD19 and PD20) to ensure the signal takes the desired path.
3.3 On-board Memories
The SAM9X60 features a DDR/SDR memory interface and an External Bus Interface (EBI) to enable interfacing to a
wide range of external memories and to almost any type of parallel peripheral.
This section describes the memory devices mounted on the SAM9X60-EK board:
• One DDR2 SDRAM
• One NAND Flash
• One QSPI Flash
• One serial EEPROM
Additional memory can be added to the board by:
• Installing an SD or MMC card in the SD/MMC slot,
• Using the USB ports.
Support is dependent upon driver support in the OS.
SAM9X60-EK
Function Blocks
3.3.1 DDR2/SDRAM
One DDR2/SDRAM (2-Gbit W972GG6KB = 16 Mwords x 16 bits x 8 banks) is used as main system memory, totaling
256 KBytes of SDRAM on the board. The memory bus is 16 bits wide and operates with a frequency of up to 200
MHz.
100Ω ± 10% differential trace impedance
Routing top or bottom
50Ω ± 10% single-ended trace impedance
Routing top or bottom
SAM9X60-EK
Function Blocks
3.3.2 NAND FLASH
The SAM9X60-EK has native support for NAND Flash memory through its NAND Flash Controller. The board
implements one MT29F4G08ABA 4Gb x 8 NAND Flash connected to Chip Select three (NCS3) of the
microcontroller. That makes a 512-Mbyte memory space.
The QSPI can be used in SPI mode to interface with serial peripherals (such as ADCs, DACs, LCD controllers, CAN
controllers and sensors), or in Serial Memory mode to interface with serial Flash memories.
The QSPI allows the system to execute code directly from a serial Flash memory (XIP, or Execute In Place,
technology) without code shadowing to RAM. The Flash memory communication protocol is serial, however it is seen
in the system as a conventional parallel memory (ROM, SRAM, DRAM, embedded Flash memory, etc.).
With the support of the Quad SPI protocol, the QSPI allows the system to use high-performance serial Flash
memories which are small and inexpensive, instead of larger and more expensive parallel Flash memories.
Figure 3-25. QSPI Serial Flash
Table 3-6. QSPI Signal Descriptions
PIOSignal NameShared PIOSignal Description
PB19 QSPI0_SCK_PB19I2SMCC_CKQSPI Clock
PB20 QSPI0_CS_PB20_enabled I2SMCC_WS
PB21 QSPI0_IO0_PB21I2SMCC_DIN0Data0
PB22 QSPI0_IO1_PB22I2SMCC_DOUT0 Data1
PB23 QSPI0_IO2_PB23I2SMCC_MCLData2
PB24 QSPI0_IO3_PB24–Data3
3.3.4 Serial EEPROM with Unique MAC Address
The SAM9X60-EK board embeds one Microchip 24AA025E48 serial EEPROM. The 24AA025E48 features 2048 bits
of serial Electrically-Erasable Programmable Read-Only Memory (EEPROM) organized as 256 words of eight bits
each and is accessed via an I2C-compatible (2-wire) serial interface. In addition, the 24AA025E48 incorporates an
easy and inexpensive method to obtain a globally unique MAC or EUI address (EUI-48™). For more information
about the 24AA025E48, refer to the product web page.
The EUI-48 addresses can be assigned as the actual physical address of a system hardware device or node, or it
can be assigned to a software instance. These addresses are factory-programmed by Microchip and unique. They
are permanently write-protected in an extended memory block located outside the standard 2-Kbit memory array.
Chip Select (through a Disable Boot control buffer – see
In the SAM9X60-EK usage context, the EEPROM device is used as a “software label” to store board information
such as chip type, manufacturer name and production date, using the last two 16-byte blocks in memory. The
information contained in these blocks should not be modified.
3.4 Peripherals
Several interfaces and connectors are implemented in the SAM9X60-EK with the purpose of enabling the user to test
all the features that the MPU can offer and to facilitate a reference design for future customer applications.
This section describes the following peripherals mounted on the SAM9X60-EK board:
• Ethernet 10/100 port (GMAC)
• USB host/device
• Wi-Fi/Bluetooth module (optional)
• Controller Area Network (CAN) interface
• Liquid Crystal Display (LCD) interface
• Image Sensor Interface (ISI)
• Audio Class D (CLASSD) amplifier
• Secure Digital Multimedia Card (SDMMC)
• mikroBUS interface
• GPIO interface
3.4.1 Ethernet 10/100 Port (GMAC)
The KSZ8081 is a single-supply 10Base-T/100Base-TX Ethernet physical-layer transceiver for transmission and
reception of data over standard CAT-5 unshielded twisted pair (UTP) cable. The KSZ8081 is a highly-integrated PHY
solution. It reduces board cost and simplifies board layout by using on-chip termination resistors for the differential
pairs and by integrating a low-noise regulator to supply the 1.2V core, and by offering 1.8/2.5/3.3V digital I/O interface
support.
The KSZ8081RNA is connected over the Reduced Media Independent Interface (RMII) directly to the RMII-compliant
MAC inside the SAM9X60 MPU. As the power-up default, the KSZ8081RNA uses a 25 MHz MEMS oscillator to
generate all required clocks, including the 50-MHz RMII reference clock output for the MAC. For more information
about the KSZ8081RNx, refer to the product web page.
An individual unique 48-bit MAC address (Ethernet hardware address) is allocated to this product and is stored in the
Microchip 24AA025E48 TWI serial EEPROM described in 3.3.4 Serial EEPROM with Unique MAC Address.
The USB (Universal Serial Bus) is a hot-pluggable general-purpose high-speed I/O standard for computer
peripherals. The standard defines connector types, cabling, and communication protocols for interconnecting a wide
variety of electronic devices. The USB 2.0 Specification defines data transfer rates as high as 480 Mbps (also known
as High Speed USB). A USB host bus connector uses four pins: a power supply pin (5V), a differential pair (D+ and
D- pins) and a ground pin.
The SAM9X60-EK board features three USB communication ports named USB-A to USB-C™.
90Ω ±15% differential trace impedance
Routing top or bottom
SAM9X60-EK
Function Blocks
The USB-A port can act only as a USB device interface and can be accessed via the USB Micro-B connector (J7).
Two resistors are placed on its power rail to form a voltage divider, converting 5V into 3.3V that is then used to signal
the presence of a USB host to the MPU.
In the case of board bring-up, USB-A is the default port used to connect to the MPU over SAM-BA (SAM Boot
Assistance). For more information, refer to the product web page.
The USB-A port is also used as a secondary power source, as mentioned in 3.1 Power Supply Topology and Power
Distribution. In most cases, this port is limited to 500 mA.
Figure 3-29. USB-A Port
Table 3-10. USB-A Connector Signal Descriptions
Pin NoSignal NameSignal Description
1USBA_VBUS_5VFirst port 5V power
2USBA_NFirst port data minus
3USBA_PFirst port data plus
4ID– (not used)
5GNDFirst port ground
Table 3-11. USB-A PIO Signal Descriptions
PIOSignal NameSharedSignal Description
PB16USBA_VBUSDETECT_PB16–VBUS detection
The USB-B and USB-C ports are connected to the stacked USB Type-A connector (J8) and each port can act both as
device and as host.
90Ω ±15% differential trace impedance
Routing top or bottom
Table 3-12. USB-B and USB-C Connector Signal Descriptions
Pin NoSignal NameSignal Description
0EARTH_USB_BConnector chassis connected to ground
SAM9X60-EK
Function Blocks
1USBB_VBUS_5VSecond port 5V power
2USBB_NSecond port data minus
3USBB_PSecond port data plus
4GNDSecond port ground
5USBC_VBUS_5VThird port 5V power
6USBC_NThird port data minus
7USBC_PThird port data plus
8GNDThird port ground
In Host mode, the USB Host ports B and C are equipped with 500-mA high-side power switches to enable selfpowered and bus-powered applications. The USBx_EN_5V_PDxx signal controls the current limiting power switch
MIC2025, which in turn supplies power to a client device. Per the USB specification, bus-powered USB 2.0 devices
are limited to a maximum of 500 mA, therefore the MIC2025 limits the current and indicates an overcurrent with the
USBx_OVCUR signal. For more information about the MIC2025, refer to the product web page.
The user has the option to solder an ATWILC3000-MR110CA Wi-Fi/BT module with a chip antenna.
The ATWILC3000-MR110PA WLAN PHY is designed to achieve a reliable and power-efficient physical layer
communication as specified by IEEE® 802.11 b/g/n in Single Stream mode with a 20-MHz bandwidth. Advanced
algorithms are used to achieve maximum throughput in a real-world communication environment with impairments
and interference. The PHY implements all required functions such as FFT, filtering, FEC (Viterbi decoder), frequency
and timing acquisition and tracking, channel estimation and equalization, carrier sensing and clear channel
assessment, as well as automatic gain control. The module is available in a fully certified, 22.428 x 17.732 mm, 36pin module package. For more information about the ATWILC3000, refer to the product web page.
50Ω ± 10% single-ended trace i mpedance
Routing top or bottom
SAM9X60-EK
Function Blocks
Table 3-14. Wi-Fi/Bluetooth Signal Descriptions
PIOSignal NameSharedSignal Description
PA11SDMMC1_WILC3000_DAT0_PA11–SDIO data
PA02SDMMC1_WILC3000_DAT1_PA02–SDIO data
PA03SDMMC1_WILC3000_DAT2_PA03–SDIO data
PA04SDMMC1_WILC3000_DAT3_PA04–SDIO data
PA12SDMMC1_WILC3000_CMD_PA12–SDIO command
PA13SDMMC1_WILC3000_CK_PA13–SDIO clock
PA21FLEXCOM1_IO1_RX_PA21–Bluetooth serial TX
PA22FLEXCOM1_IO0_TX_PA22–Bluetooth serial RX
PA07FLEXCOM1_IO1_RTS_PA07–Bluetooth serial RTS
PA08FLEXCOM1_IO1_CTS_PA08–Bluetooth serial CTS
PB25NRST_PB25–Module reset
PA28WILC3000_INTERUPT_PA28–Interrupt
PA29WILC3000_ENABLE_PA29–Chip enable
Special care must be taken when powering the ATWILC3000 wireless module. Due to the nature of the wireless
transmission, the module draws a lot of current from its supply rail. In the worst-case scenario, the module can draw
up to 300 mA. The main PMIC on the board, the MIC2800, has a maximum output capacity of 300 mA on its 3.3V
rail, therefore it is not fit to power this module alongside the other components on the board.
To address this issue, the module is fitted with its own separate power supply, the MCP1725, which is a 500-mA Low
Dropout (LDO) linear regulator that provides high current and low output voltages in a very small package. For more
information about the MCP1725, refer to the product web page.
The MCP1725 was chosen because it can supply the current required by the module, and because it features a
shutdown input pin (SHDN) and a Power Good output pin (PWRGD):
• The SHDN input allows to shut down the wireless module if it is unused, therefore saving power.
• The PWRGD output ensures that the ATWILC3000 wireless module is kept in reset until its power rails are
stable.
Figure 3-33. Wi-Fi/Bluetooth Enable
Note: Enabling the ATWILC3000 module prevents the Flexcom UART from being used with the mikroBUS
connector (this is switched by U23).
3.4.4 Controller Area Network (CAN) Interface
Two MCP2542 transceivers are placed on the SAM9X60-EK.
The MCP2542 is a high-speed CAN transceiver that provides the interface between the Controller Area Network
(CAN) protocol controller and the physical two-wire bus. For more information about the MCP2542, refer to the
product web page.
CAN1 function and UART on the external 40-pin connector are shared and selectable through the
SEL_FNCT1_PD19 PIO.
CAN0 function and Debug UART are shared and selectable through the SEL_FNCT2_PD20 PIO.
3.4.5 Liquid Crystal Display (LCD) Interface
The SAM9X60-EK board provides a connector with 24 bits of data and control signals to the LCD interface.
Optional displays such as AC320005-5 (refer to the product web page) can be connected to the board.
In order to operate correctly with various LCD modules, two voltage lines are available: 3.3V and 5VDC (default). The
selection is made with 0R resistors.
J15 is a 1.27-mm pitch, 50-pin header. It gives access to the LCD signals.
The Audio Class D (CLASSD) Amplifier is a digital input, Pulse Width Modulated (PWM) output stereo Class D
amplifier. CLASSD features a high-quality interpolation filter embedding a digitally-controlled gain, an equalizer and a
de-emphasis filter.
On its input side, CLASSD is compatible with most common audio data rates. On the output side, its PWM output can
drive either:
• high-impedance single-ended or differential output loads (Audio DAC application), or
• external MOSFETs through an integrated non-overlapping circuit (Class D power amplifier application).
For more information, refer to the SAM9X60 datasheet (see 1.2 Recommended Reading).
The output stage of the CLASSD amplifier featured on the SAM9X60-EK can be powered either from the on-board
5V power rail or an outside power supply. The selection is made by changing the jumper (JP3) position on J11:
Table 3-19. Class D Output Connector J12 Signal Description
Pin NoSignal NameSignal Description
1LEFT_NNegative level
2LEFT_PPositive level
3GNDGround
4External powerInput external power
3.4.8 Secure Digital Multimedia Card (SDMMC)
The SD (Secure Digital) card is a non-volatile memory card format used as a mass storage memory in mobile
devices.
The SAM9X60 has one Secure Digital Multimedia Card (SDMMC) interface that supports the MultiMedia Card
(e.MMC) Specification V4.51, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is
compliant with the SD Host Controller Standard V3.0 Specification.
A standard MMC/SD card connector, connected to the SDMMC interface, is mounted on the top side of the board.
The SDMMC0 communication is based on an 8-pin interface (clock, command, four data and power lines). It includes
a card detection switch.
The SAM9X60-EK hosts a pair of 8-pin female headers (J14) implementing a mikroBUS socket. For details, refer to
the mikroBUS documentation on https://www.mikroe.com/mikrobus.
Figure 3-39. mikroBUS Interface
SAM9X60-EK
Function Blocks
Table 3-20. mikroBUS Connector J14 Pin Assignment
FunctionPIOMbus Signal Pin # Pin # Mbus Signal PIOFunction
Analog input PB15 AN116PWMPB13 PWM
ResetPB14 RST215INTPB18 Interrupt
SPI
Chip Select
SPI clockPA13 SPI_SPCK413UART_TXPA22 UART transmit (input from SAM into Mbus)
PA14 SPI_NPCS314UART_RXPA21 UART receive (output from Mbus into
SAM)
SPI MISOPA11 SPI_MISO512TWI_SCLPA31 TWI clock
SPI MOSIPA12 SPI_MOSI611TWI_SDAPA30 TWI data
VCC_3V3 Supply7105V Supply_VDD
GROUND_GND89GND_Ground
Note: Enabling the ATWILC3000 interface prevents the UART functionality from being used with the mikroBUS
connector. See 3.4.3 Wi-Fi/Bluetooth Module (Optional).
The SAM9X60-EK includes two main debugging interfaces to provide debug-level access to the SAM9X60-EK:
• One UART through the USB/J-Link-OB CDC feature
• Two JTAG interfaces, one connected directly to the MPU using connector J23 and one through the J-Link-OB
interface USB port J21
3.5.1 Serial Debug Com Port (FTDI)
The SAM9X60-EK board features a dedicated serial port for debugging, accessible through header J24. Various
interfaces can be used as a USB/Serial DBGU port bridge, such as the FTDI TTL-232R USB-to-TTL serial cable.
Figure 3-41. Serial Debug Com Port
SAM9X60-EK
Function Blocks
Table 3-22. Debug Com Port Signal Descriptions
PIOSignal NameSharedSignal Description
PA09DBGU_RX_PA09DEBUGReceive data
PA10DBGU_TX_PA10DEBUGTransmit data
3.5.2 Debug JTAG
A 20-pin JTAG header (J23) is provided on the SAM9X60-EK board to facilitate software development and debugging
using various JTAG emulators. The interface signals have a voltage level of 3.3V.
90Ω ±15% differential trace impe dance
Routing top or bottom
STB
1
GND
2
OUT
3
VDD
4
12.00 MHz
DSC6011JI1A-012.0000
Y10
BOT TOP
SideSide
12
34
78
910
1112
13
15
14
16
J18
pads on PCB
SignalPin NoPin NoSignal
+3.3V21+3V3
GND43NC
GND55TDI
GND87TMS
GND109TCK
GND1211RTCK
GND1413TDO
GND1615nRST
GND1817NC
GND2019NC
3.5.3 Embedded Debugger (J-Link-OB) Interface
The SAM9X60-EK includes a built-in SEGGER J-Link-On-Board (J-Link-OB) device. The functionality is implemented
with an ATSAM3U4C microcontroller in an LFBGA100 package. The ATSAM3U4C provides the functions of the
JTAG interface and a bridge from USB to Serial debug port (known as CDC, or communication class device). The bicolored LED (D9) shows the status of the J-Link-On-Board device.
The J-Link-OB device is designed to provide an efficient, low-cost, on-board alternative to the standard J-Link or
SAM-ICE.
Its own dedicated USB port acts as a power source for this block (which is separated from the rest of the system) and
provides the communication link to program and debug the MPU.
Table 3-24. J-Link-OB and J-Link-CDC LED D9 Status
LED D9StateDescription
Red and GreenOffJ-Link (SAM3U device) is not programmed, or J20 and J21 are installed.
RedOnJ-Link (SAM3U device) is programmed but J-Link is disabled (J20 installed).
GreenFlashingJ-Link is operational but the USB port is not connected.
GreenOnJ-Link-OB is connected and ready.
The ATSAM3U microcontroller is powered only through the J-Link USB connector. This way, the programmer IC is
separated from the rest of the system and the user can have a better reading of the power that the system is drawing
when interrogating the power measurement devices placed on the board.
The MIC5528 has been selected to convert the 5V coming from the USB connector into the 3.3V rail needed by the
microcontroller. The MIC5528 is a simple low-power, low dropout regulator designed for optimal performance in a
very small footprint. It is capable of sourcing up to 500 mA of output current while only drawing 38 μA of operating
current. For more information about the MIC5528, refer to the product web page.
Figure 3-44. J-Link-OB Power Supply
If the user does not require the on-board programming feature, this section can be left unpowered, with no impact on
the rest of the system. A level shifter has been placed on the DEBUG UART line between the SAM9X60 MPU and
the on-board programmer to properly separate the two voltage domains.
Figure 3-45. J-Link-OB Level Shifter
Jumper JP6/J20 disables the J-Link-OB JTAG functionality. When installed (J20 shorted), a quad analog switch (U31/
U32) routes the JTAG interface of the SAM9X60 to the 20-pin header J23.
• Jumper JP6/J20 not installed: J-Link-OB-ATSAM3U4C is enabled and fully functional.
• Jumper JP6/J20 installed: J-Link-OB-ATSAM3U4C is disabled and an external JTAG controller can be used
through the 20-pin JTAG port J23.
In addition to the J-Link-OB functionality, the ATSAM3U4C microcontroller provides a bridge to a debug serial port
(DBGU) of the main board processor. The port is made accessible over the same USB connection used by JTAG by
implementing a Communication Device Class (CDC), which allows a terminal communication with the target device.
This feature is enabled/disabled by jumper J21.
• Jumper J21 not installed: the J-Link-OB CDC function is enabled and fully functional.
• Jumper J21 installed: the J-Link-OB CDC function is disabled.
The USB CDC converts the USB device into a serial communication device. The target device running the CDC is
recognized by the host as a serial interface (USB2COM, virtual COM port) without the need of installing a special
host driver (the CDC is standard). All PC software using a COM port work without modifications with this virtual COM
port. Under Microsoft® Windows®, the device shows up as a COM port; under Linux®, as a /dev/ACMx device. This
enables the user to use host software which was not designed to be used with USB, such as a terminal program.
Figure 3-48. Disable J-Link JTAG
3.5.4 Push Button Switches
The SAM9X60-EK features four push buttons:
• One User push button (SW1) connected to PIO_PD18. This is left at user usage.
• One Wake-up push button (SW2) connected to the SAM9X60 WKUP pin; when pressed, the processor recovers
from shutdown.
• One Board Reset push button (SW3); when pressed, the processor is reset.
• One Disable Boot push button (SW4); if kept pressed during power-up, the processor is prevented from booting
off the on-board memories (QSPI and NAND Flash), thereby enabling booting from other sources or into ROM
Code.
Figure 3-49. User Push Buttons
3.5.5 Disable Boot
On-board push button SW4 and/or jumper J13 control the selection (CS#) of the bootable memory components
(QSPI and NAND FLASH) using a non-inverting 3-state buffer.
The rule of operation is:
• SW4 (DISABLE_BOOT) or J13 shorted = booting from QSPI and NAND FLASH is disabled.
• LED D6 indicates the state of the DIS_BOOT signal.
– Red = on-board boot memories are disabled.
– Green = on-board boot memories are enabled.
1.On SAM9X60-EK Rev. B, the Ethernet activity LED on RJ45 connector J5 is inoperative due to an incorrect
LED connection. This issue is solved in Rev. 2, as shown in the following picture. Nevertheless, the Ethernet
port is perfectly operational on Rev. B boards.
Figure 5-1. RJ45 Connector Right LED Connection Change from Rev. B to Rev. 2
SAM9X60-EK
Erratum
2.SAM9X60-EK Rev. B has the DSC1001DI5-025.0000 in the place of Y6 while SAM9X60-EK Rev. 2 features
Microchip provides online support via our website at http://www.microchip.com/. This website is used to make files
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• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
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Microchip’s product change notification service helps keep customers current on Microchip products. Subscribers will
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To register, go to http://www.microchip.com/pcn and follow the registration instructions.
Customer Support
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Embedded Solutions Engineer (ESE)
• Technical Support
Customers should contact their distributor, representative or ESE for support. Local sales offices are also available to
help customers. A listing of sales offices and locations is included in this document.
Technical support is available through the website at: http://www.microchip.com/support
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today,
when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these
methods, to our knowledge, require using the Microchip products in a manner outside the operating
specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of
intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code
protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection
features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital
Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you
may have a right to sue for relief under that Act.
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MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer,
QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control,
HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus,
ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider,
Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom,
CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP,
INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM,
PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad
I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.