MICROCHIP PIC16C5X DATA SHEET
PIC16C5X
Data Sheet
EPROM/ROM-Based 8-bit CMOS
Microcontroller Series
2002 Microchip Technology Inc. Preliminary DS30453D
Note the following details of the code protection feature on PICmicro® MCUs.
• The PICmicro family meets the specifications contained in the Microchip Data Sheet.
• Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today ,
when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet.
The person doing so may be engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable”.
• Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features o f
our product.
If you have any further questions about this matter, please contact the local sales office nearest to you.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
K
EELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Co ntrol
Solutions Com pany ar e regis tered tr ademarks of Microch ip Technology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and T otal Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwid e head qu art ers,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
®
8-bit MCUs, KEELOQ
®
code hoppin g
DS30453D - page ii Preliminary 2002 Microchip Technology Inc.
PIC16C5X
EPROM/ROM-Based 8-bit CMOS Microcontroller Series
Devices Included in this Data Sheet:
•PIC16C54
• PIC16CR54
•PIC16C55
•PIC16C56
• PIC16CR56
•PIC16C57
• PIC16CR57
•PIC16C58
• PIC16CR58
Note: PIC16C5X refers to all revision s of the p art
(i.e., PIC16C54 refers to PIC16C54,
PIC16C54A, and PIC16C54C), unless
specifically called out otherwise.
High-Performance RISC CPU:
• Only 33 single word instructions to learn
• All instructions are single cycle except for pro-
gram branches which are two-cycle
• Operating speed: DC - 40 MHz clock input
DC - 100 ns instruction cycle
Device Pins I/O
PIC16C54 18 12 512 25
PIC16C54A 18 12 512 25
PIC16C54C 18 12 512 25
PIC16CR54A 18 12 512 25
PIC16CR54C 18 12 512 25
PIC16C55 28 20 512 24
PIC16C55A 28 20 512 24
PIC16C56 18 12 1K 25
PIC16C56A 18 12 1K 25
PIC16CR56A 18 12 1K 25
PIC16C57 28 20 2K 72
PIC16C57C 28 20 2K 72
PIC16CR57C 28 20 2K 72
PIC16C58B 18 12 2K 73
PIC16CR58B 18 12 2K 73
EPROM/
ROM
RAM
• 12-bit wi de instructions
• 8-bit wide data path
• Seven or eight special functi on hard ware regis ters
• Two-level deep hardware stack
• Direct, indirect and relative addressing modes for
data and instruction s
Peripheral Features:
• 8-bit real time clock/counter (TMR0) with 8-bit
programmable prescaler
• Power-on Reset (POR)
• Device Reset Timer (DRT)
• Watchdog Timer (WDT) with its own on-chip
RC oscillator for reliable operation
• Programmable Code Protection
• Power saving SLEEP mode
• Selectable oscillator options:
- RC: Low cost RC oscillator
- XT: Standard crystal/resonator
- HS: High speed crystal/resonator
- LP: Power saving, low frequency crystal
CMOS Technology:
• Low power, high speed CMOS EPROM/ROM technology
• Fully static design
• Wide operating voltage and temperature range:
- EPROM Commercial/Industrial 2.0V to 6.25V
- ROM Commercial/Industrial 2.0V to 6.25V
- EPROM Extended 2.5V to 6.0V
- ROM Extended 2.5V to 6.0V
• Low power consumption
- < 2 mA typical @ 5V, 4 MHz
-15 µA typical @ 3V, 32 kHz
- < 0.6 µA typical standby current
(with WDT disabled) @ 3V, 0°C to 70°C
Note: In this document, figure and table titles
refer to all varieties of the part nu mber indicated, (i.e., The title “Figure 15-1: Load
Conditions For Device Timing Specifications - PIC16C54A”, also refers to
PIC16LC54A and PIC16LV54A parts),
unless specifically called out otherwise.
2002 Microchip Technology Inc. Preliminary DS30453D-page 1
PIC16C5X
Pin Diagrams
PDIP, SOIC, Windowed CERDIP
•1
PIC16C58
PIC16C56
PIC16CR56
PIC16CR58
2
3
4
5
6
7
8
9
MCLR
RA2
RA3
T0CKI
/VPP
VSS
RB0
RB1
RB2
RB3
SSOP
MCLR
RA2
RA3
T0CKI
/VPP
VSS
VSS
RB0
RB1
RB2
RB3
•1
2
3
4
5
6
7
8
9
10
PIC16CR58
PIC16C58
PIC16CR56
PIC16CR54
PIC16C56
18
PIC16CR54
PIC16C54
17
16
15
14
13
12
11
10
20
19
PIC16C54
18
17
16
15
14
13
12
11
RA1
RA0
OSC1/CLKIN
OSC2/CLKOUT
DD
V
RB7
RB6
RB5
RB4
RA1
RA0
OSC1/CLKIN
OSC2/CLKOUT
DD
V
VDD
RB7
RB6
RB5
RB4
PDIP, SOIC, Windowed CERDIP
T0CKI
V
N/C
V
N/C
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
DD
SS
•1
2
3
4
5
6
7
8
9
10
11
12
13
14
PIC16CR57
PIC16C57
PIC16C55
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SSOP
VSS
T0CKI
V
VDD
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
VSS
•1
2
DD
3
4
5
6
7
8
9
10
11
12
13
14
PIC16CR57
PIC16C55
PIC16C57
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MCLR
/VPP
OSC1/CLKIN
OSC2/CLKOUT
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
RB7
RB6
RB5
MCLR/VPP
OSC1/CLKIN
OSC2/CLKOUT
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
RB7
RB6
RB5
Device Differences
Oscillator
Selection
(Program)
Oscillator
Device
Voltage
Range
PIC16C54 2.5-6.25 Factory See Note 1 1.2 PIC16CR54A No
PIC16C54A 2.0-6.25 User See Note 1 0.9 —No
PIC16C54C 2.5-5.5 User See Note 1 0.7 PIC16CR54C Y es
PIC16C55 2.5-6.25 Factory See Note 1 1.7 — No
PIC16C55A 2.5-5.5 User See Note 1 0.7 — Yes
PIC16C56 2.5-6.25 Factory See Note 1 1.7 — No
PIC16C56A 2.5-5.5 User See Note 1 0.7 PIC16CR56A Yes
PIC16C57 2.5-6.25 Factory See Note 1 1.2 — No
PIC16C57C 2.5-5.5 User See Note 1 0.7 PIC16CR57C Y es
PIC16C58B 2.5-5.5 User See Note 1 0.7 PIC16CR58B Yes
PIC16CR54A 2.5-6.25 Factory See Note 1 1.2 N/A Yes
PIC16CR54C 2.5-5.5 Factory See Note 1 0.7 N/A Yes
PIC16CR56A 2.5-5.5 Factory See Note 1 0.7 N/A Yes
PIC16CR57C 2.5-5.5 Factory See Note 1 0.7 N/A Yes
PIC16CR58B 2.5-5.5 Factory See Note 1 0.7 N/A Yes
Note 1: If you change from this device to another device, please verify oscillator characteristics in your application.
Note: The table shown abov e shows the generic names of the PIC16C5X devices. For device varieties, please
refer to Section 2.0.
Process
Technology
(Microns)
ROM
Equivalent
MCLR
Filter
DS30453D-page 2 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
Table of Contents
1.0 General Description............. ............................ ........................... ........................... ..................... ......................... .........................5
2.0 PIC16C5X Device Varieties ................... ............................ ........................... ............................................................................... 7
3.0 Architectural Overview ................................................................................................................................................................9
4.0 Oscillator Configurations............................................................................................................................................................ 15
5.0 Reset.......................................................................................................................................................................................... 19
6.0 Memory Organization................................................................................................................................................................. 25
7.0 I/O Ports................................................................................. .............................................. ......................... ............................. 35
8.0 Timer0 Module and TMR0 Register........................................................................................................................................... 37
9.0 Special Features of the C PU...................................................................................................................................................... 43
10.0 Instruction Set Summary............................................................................................................................................................ 49
11.0 Development Support................................................................................................................................................................. 61
12.0 Electrical Characteristics - PIC16C54/55/56/57.........................................................................................................................67
13.0 Electrical Characteristics - PIC16CR54A................................................................................................................................... 79
14.0 Device Characterization - PIC16C54/55/56/57/CR54A.............................................................................................................. 91
15.0 Electrical Characteristics - PIC16C54A.................................................................................................................................... 103
16.0 Device Characterization - PIC16C54A.....................................................................................................................................117
17.0 Electrical Characteristics - PIC16C54C/CR54C/C55A/C56A/CR56A/C57C/CR57C/C58B/CR58B ........................................ 131
18.0 Device Characterization - PIC16C54C/CR54C/C55A/C56A/CR56A/C57C/CR57C/C58B/CR58B ..........................................145
19.0 Electrical Characteristics - PIC16C54C/C55A/C56A/C57C/C58B 40MHz............................................................................... 155
20.0 Device Characterization - PIC16C54C/C55A/C56A/C57C/C58B 40MHz................................................................................165
21.0 Packaging Information................ ........................... ........................... ............................ .................. .......................... ................ 171
Appendix A: Compatibility .............................................. ........................... ............................ ........................................................ 183
On-Line Support.................... ........................... ............................ ........................... ....................... ......................... ...........................189
Reader Response..............................................................................................................................................................................190
Product Identification System............................................................................................................................................................ 191
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Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
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To determine if an errata sheet exists for a particular device, please check with one of the following:
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2002 Microchip Technology Inc. Preliminary DS30453D-page 3
PIC16C5X
NOTES:
DS30453D-page 4 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
8-Bit EPROM/ROM-Based CMOS Microcontrollers
1.0 GENERAL DESCRIPTION
The PIC16C5X from Microchip Technology is a family
of low cost, high performance, 8-bit fully static,
EPROM/ROM-based CMOS microcontrollers. It
employs a R ISC a rc hi t ec t ure w i th onl y 33 si n gl e wor d /
single cycle instructions. All instructions are single
cycle except for program branches which take two
cycles. The PIC16C5X delivers performance in an
order of magnitude higher than its competitors in the
same price category. The 12-bit wide instructions are
highly symmetrical resulting in 2:1 code compression
over other 8- bit mic rocont rollers in its clas s. The ea sy
to use and easy to remember instruction set reduces
developmen t time significantly.
The PIC16C5X product s are equip ped with spe cial features that reduce sy stem cost and po wer requireme nts.
The Power-on Reset (POR) and Device Reset Timer
(DRT) eliminate the need for external RESET circuitry.
There are four oscill ator c onfigu rations to choo se from ,
including the power saving LP (Low Power) oscillator
and cost saving RC oscillator. Power saving SLEEP
mode, Watchdog Timer and Code Protection features
improve system cost, power and reliability.
The UV erasable CERDIP p ackage d version s are ideal
for code development, while the cost effective One
Time Programmable (OTP) versions are suitable for
productio n in any volu me. The custom er can take fu ll
advantage of Microchip’s price leadership in OTP
microcontrollers, while benefiting from the OTP’s
flexibility.
The PIC16C5X products are supported by a full featured macro as sembler, a software simulator, an in-circuit emulator, a low cost developmen t program mer and
a full featured programmer. All the tools are supported
on IBM
PC and compatible machines.
1.1 Applications
The PIC16C5X series fit s perfectly in a pplications rang-
ing from high speed automotive and appliance motor
control to low power remote transmitters/receivers,
pointing device s and te lecom p rocessors. T he EPROM
technology makes customizing application programs
(transmitter codes, motor speeds, receiver frequencies, etc.) extremely fast and convenient. The small
footprint packages, for through hole or surface mounting, make this mic rocontroller se ries perfect for a pplications with space limitations. Low cost, low power, high
performance ease of use and I/O flexibility make the
PIC16C5X series very v ersatile even in areas where no
microcontroller use has been considered before (e.g.,
timer functions, replacement of “glue” logic in larger
systems, co-processor applications).
2002 Microchip Technology Inc. Preliminary DS30453D-page 5
PIC16C5X
TABLE 1-1: PIC16C5X FAMILY OF DEVICES
Features PIC16C54 PIC16CR54 PIC16C55 PIC16C56 PIC16CR56
Maximum Operati on Frequency 40 MHz 20 MHz 40 MHz 40 MHz 20 MHz
EPROM Program Memory (x12 words) 512 — 512 1K —
ROM Program Memory (x12 words) — 512 — — 1K
RAM Data Memory (bytes) 2525242525
Timer Module(s) TMR0 TMR0 TMR0 TMR0 TMR0
I/O Pins 12 12 20 12 12
Number of Instructions 33 33 33 33 33
Packages 18-pin DIP,
SOIC;
20-pin SSOP
®
All PICmicro
I/O current capability.
Maximum Operation Frequency 40 MHz 20 MHz 40 MHz 20 MHz
EPROM Program Memory (x12 words) 2K —2K—
ROM Program Memory (x12 words) — 2K — 2K
RAM Data Memory (byte s) 72 72 73 73
Timer Module(s) TMR0 TMR0 TMR0 TMR0
I/O Pins 20 20 12 12
Number of Instructions 33 33 33 33
Packages 28-pin DIP , SOIC ;
All PICmicro
I/O current capability.
Family devices have Power-on Reset, selectable Watchdog Timer, selectable Code Protect and high
Features PIC16C57 PIC16CR57 PIC16C58 PIC16CR58
28-pin SSOP
®
Family devices have Power-on Reset, selectable Watchdog Timer, selectable Code Protect and high
18-pin DIP,
SOIC;
20-pin SSOP
28-pin DIP, SOIC;
28-pin SSOP
28-pin DIP,
SOIC;
28-pin SSOP
18-pin DIP, SOIC;
20-pin SSOP
18-pin DIP,
SOIC;
20-pin SSOP
18-pin DIP,
SOIC;
20-pin SSOP
18-pin DIP, SOIC;
20-pin SSOP
DS30453D-page 6 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
2.0 PIC16C5X DEVICE VARIETIES
A variety of frequency ranges and packaging options
are available. Depen ding on applicati on and production
requirements, t he proper devic e option can b e selected
using the information in this section. When placing
orders, please use the PIC16C5X Product Identification System at the ba ck of this data s heet to spe cify the
correct part number.
For the PIC16C5X family of devices, there are four
device types, as indicated in the device number:
1. C, as in PIC16C54C. These devices have
EPROM program memory and operate over the
standard voltage range.
2. LC, as in PIC16LC54A. These devices have
EPROM program memory and operate over an
extended voltage range.
3. CR, as in PIC16CR54A. These devices have
ROM program memory and operate over the
standard voltage range.
4. LCR, as in PIC16LCR54A. These devices hav e
ROM program memory and operate over an
extended voltage range.
2.1 UV Erasable Devices (EPROM)
The UV erasable versions offered in CERDIP packages, are optimal for prototype development and pilot
programs.
UV erasable dev ices can be programmed for a ny of the
four oscillator configurations. Microchip’s
PICSTART
both support programming of the PIC16C5X. Third
party programmers also are available. Refer to the
Third Party Guide (DS00104) for a list of sources.
Plus
(1)
and PRO MATE programmers
2.3 Quick-Turnaround-Production (QTP) Devices
Microchip o ffers a QTP Prog ramming Serv ice for factory production orders. This service is made available
for users who choose not to program a medium to high
quantity of units and whose code patterns have stabilized. The device s are identical to the OTP devices but
with all EPROM locations and co nfiguration bit options
already programmed by the factory. Certain code and
prototype verification procedures apply before production shipments are available. Please contact your
Microchip Technology sales office for more details.
2.4 Serialized Quick-TurnaroundProduction (SQTP
Microchip offers the unique programming service
where a few user defined locations in each device are
programmed with different serial numbers. The serial
numbers may be random, pseudo-random or sequential. The devices are identical to the OTP devices but
with all EPROM locations and co nfiguration bit options
already programmed by the factory.
Serial programming allows each device to have a
unique number which can serve as an entry code,
password or ID number.
SM
) Devices
2.5 Read Only Memory (ROM) Devices
Microchip offe rs masked ROM vers ions of several of
the highest volume parts, giving the customer a low
cost option for high volume, mature products.
2.2 One-Time-Programmable (OTP) Devices
The availability of OTP devices is especially useful for
customers expecting frequent code changes and
updates, or small volume applications.
The OTP devic es, packaged in plas tic packages , permit the user to program them once. In addition to the
program memory, the configuration bits must be programmed.
Note 1: PIC16C55A and PIC16C57C devices
require OSC2 not to be connected while
programming with PICSTART® Plus
programmer .
2002 Microchip Technology Inc. Preliminary DS30453D-page 7
PIC16C5X
NOTES:
DS30453D-page 8 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
3.0 ARCHITECTURAL OVERVIEW
The high performance of the PIC16C5X family can be
attributed to a number of architectural features commonly found in RISC microprocessors. To begin with,
the PIC16C5X uses a Harvard architecture in which
program and data are accessed on separate buses.
This improves bandwidth over traditional von Neumann
architecture where program and data are fetched on
the same bus. Separating program and data memory
further allows instructions to be sized differently than
the 8-bit wide data word. Instruction opcodes are 12
bits wide making it possible to have all single word
instructions. A 12-bit wide program memory access
bus fetches a 12-b it inst ructio n in a s ingle cycle. A twostage pipeline overlaps fetch and execution of instructions. Consequently, all instructions (33) execute in a
single cycle except for program branches.
The PIC16C54/CR54 and PIC16C55 address 512x 12
of program memory, the PIC16C56/CR56 address
1K x 12 of program memory, and the PIC16C57/CR57
and PIC16C58/CR58 address 2K x 12 of program
memory. All program memory is i nternal.
The PIC16C5X can directly or indirectly address its
register files an d dat a me mory. All special functio n registers including the program c ounter a re mapp ed in th e
data memory. The PIC16C5X has a highly orthogonal
(symmetrica l) instruct ion set that m akes it possib le to
carry out any operation on any register using any
addressing mode. This symmetrical nature and lack of
‘special optimal situations’ make programming with the
PIC16C5X simple yet ef fic ient. In add ition, the learnin g
curve is reduced significantly.
The PIC16C5X device cont ains an 8-bit ALU and working register. The ALU is a general purpose arithmetic
unit. It performs arithmetic and Boolean functions
between data in the working register and any register
file.
The ALU is 8 bits wide and capable of addition, subtraction, shift and logical operations. Unless otherwise
mentioned, arithmetic operations are two's complement in nature. In two-operand instructions, typically
one operand is the W (working) register. The other
operand is either a file register or an immediate constant. In single operand instructions, the operand is
either the W register or a file register.
The W register is an 8-bit working regi ster used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC), and
Zero (Z) bits in the ST ATUS register . The C and DC bit s
operate as a borrow
tively, in subtraction. See the SUBWF and ADDWF
instructions for examples.
A simplified block diagram is shown in Figure 3-1, with
the corresponding device pins described in Table 3-1
(for PIC16C54/56/58) and Table 3-2 (for PIC16C55/
57).
and digit borrow out bit, respec-
2002 Microchip Technology Inc. Preliminary DS30453D-page 9
PIC16C5X
FIGURE 3-1: PIC16C5X SERIES BLOCK DIAGRAM
EPROM/ROM
512 X 12 TO
2048 X 12
12
INSTRUCTION
REGISTER
12
INSTRUCTION
DECODER
8
LITERALS
W
9-11
PC
DIRECT ADDRESS
STATUS
ALU
“TRIS 5”
9-11
9
FROM W
TRISA PORTA
STACK 1
ST ACK 2
WDT TIME
OUT
8
DIRECT RAM
ADDRESS
4
TMR0
4
T0CKI
PIN
WA TCHDOG
WDT/TMR0
PRESCALER
OPTION REG.
DATA BUS
8
“TRIS 6”
CONFIGURATION WORD
“DISABLE”
TIMER
FROM W
TRISB
PROTECT”
CLKOUT
6
FROM W
8
PORTB
“CODE
5
8
“OSC
SELECT”
2
“OPTION”
5-7
FSR
“TRIS 7”
OSC1 OSC2 MCLR
OSCILLATOR/
TIMING &
CONTROL
“SLEEP”
GENERAL
PURPOSE
REGISTER
FILE
(SRAM)
24, 25, 72 or
73 Bytes
8
FROM W
8
TRISC
8
PORTC
4
RA<3:0> RB<7:0>
8
8
RC<7:0>
(28-Pin
Devices Only)
DS30453D-page 10 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
TABLE 3-1: PINOUT DESCRIPTION - PIC16C54, PIC16CR54, PIC16C56, PIC16CR56, PIC16C58,
PIC16CR58
Pin Name
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
T0CKI 3 3 3 I ST Clock input to Tim er0. Must be tied to V
/VPP 4 4 4 I ST Master clear (RESET) input/programming voltage input.
MCLR
OSC1/CLKIN 16 16 18 I ST Oscillator crystal input/external clock source input.
OSC2/CLKOUT 15 15 17 O — Oscillator crystal output. Connects to crystal or resonator
DD 14 14 15,16 P — Positive supply for logic and I/O pins.
V
VSS 5 5 5,6 P — Ground reference for logic and I/O pins.
Legend: I = input, O = output, I/O = input/output, P = power, — = Not Used, TTL = TTL input, ST = Schmitt Trigger
input
Pin Number Pin Buffer
DIP SOIC SSOP
17
18
10
11
12
13
17
18
1
2
6
7
8
9
1
2
6
7
8
9
10
11
12
13
19
20
1
2
7
8
9
10
11
12
13
14
Type Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Description
TTL
Bi-directional I/O port
TTL
TTL
TTL
TTL
Bi-directional I/O port
TTL
TTL
TTL
TTL
TTL
TTL
TTL
SS or VDD, if not in
use, to reduce current consumption.
This pin is an a ctive lo w RESET to the d evice. Voltage on
the MCLR/VPP pin must not exceed VDD to avoid unin-
tended entering of Programming mode.
in crystal Oscillator mode. In RC mode, OSC2 pin outputs
CLKOUT, which has 1/4 the frequency of OSC1 and
denotes the instruction cycle rate.
2002 Microchip Technology Inc. Preliminary DS30453D-page 11
PIC16C5X
TABLE 3-2: PINOUT DESCRIPTION - PIC16C55, PIC16C57, PIC16CR57
Pin Name
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
T0CKI 1 1 2 I ST Clock input to Timer0. Must be tied to V
MCLR
OSC1/CLKIN 27 27 27 I ST Oscillator crystal input/external clock source input.
OSC2/CLKOUT 26 26 26 O — Oscillator crystal output . Con nec ts to crystal or resonator
DD 2 2 3,4 P — Positive supply for logic and I/O pins.
V
VSS 4 4 1,14 P — Ground reference for logic and I/O pins.
N/C 3,5 3,5 — — — Unused, do not connect.
Legend: I = input, O = output, I/O = input/output, P = power, — = Not Used, TTL = TTL input, ST = Schmitt Trigger
input
Pin Number
DIP SOIC SSOP
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
28 28 28 I ST Master clear (RESET) input. This pin is an active low
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
10
11
12
13
15
16
17
18
19
20
21
22
23
24
25
Pin
Buffer
Type
Type
5
I/O
TTL
Bi-directional I/O port
6
I/O
TTL
7
I/O
TTL
8
I/O
TTL
9
I/O
TTL
Bi-directional I/O port
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
Bi-directional I/O port
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
I/O
TTL
use, to reduce current consumpti on.
RESET to the device.
in crystal Oscil lator mode. In RC mode, OSC 2 pin outpu ts
CLKOUT which has 1/4 the frequency of OSC1, and
denotes the instruction cycle rate.
Description
SS or VDD, if not in
DS30453D-page 12 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
3.1 Clocking Scheme/Instruction Cycle
The clock input (OSC1/CLKIN pin) is internally divided
by four to generate four non-overlapping quadrature
clocks, namely Q1, Q2, Q3 and Q4. Internal ly, the program counter is i nc rem ente d ev ery Q 1 and th e instruction is fetched from program memory and latched into
the instruction register in Q4. It is decoded and executed during the following Q1 through Q4. The clocks
and instru c ti o n ex ecution fl ow are show n i n Fi g ure 3-2
and Example 3-1.
FIGURE 3-2: CLOCK/INSTRUCTION CYCLE
Q2 Q3 Q4
OSC1
Q1
Q2
Q3
Q4
PC
OSC2/CLKOUT
(RC mode)
Q1
PC PC+1 PC+2
Fetch INST (PC)
Execute INST (PC-1) Fetch INST (PC+1)
Q1
Execute INST (PC) Fetch INST (PC+2)
3.2 Instruction Flow/Pipelining
An Instruction Cycle consists of four Q cycles (Q1, Q2,
Q3 and Q4). The instruction fetch and execute are
pipelined such that fetch takes one instruction cycle,
while decode and execute takes another instruction
cycle. However, due to the pipelining, each instruction
effectively executes in one cycle. If an instruction
causes the program counter to change (e.g., GOTO),
then two cycles a re required to c omplete the i nstruction
(Example 3-1).
A fetch cycle begins with the program counter (PC)
incrementing in Q1.
In the execution cy cle, the fetched instruction i s latched
into the Inst ruction Regist er in cycle Q1. T his instruction is then decoded and executed during the Q2, Q3
and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write).
Q2 Q3 Q4
Q2 Q3 Q4
Q1
Execute INST (PC+1)
Internal
phase
clock
EXAMPLE 3-1: INSTRUCTION PIPELINE FLOW
1. MOVLW H’55’
2. MOVWF PORTB
3. CALL SUB_1
4. BSF PORTA, BIT3
All instructions are sing le cycle, except fo r any program branches . These take two cycles since the fetch instruction
is “flushed” from the pipeline, while the new instruction is being fetched and then executed.
2002 Microchip Technology Inc. Preliminary DS30453D-page 13
Fetch 1 Execute 1
Fetch 2 Execute 2
Fetch 3 Execute 3
Fetch 4 Flush
Fetch SUB_1 Execute SUB_1
PIC16C5X
NOTES:
DS30453D-page 14 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
4.0 O SCILLATOR CONFIGURATIONS
4.1 Oscillator Types
PIC16C5Xs can be operated in four different oscillator
modes. The user can program two configuration bits
(FOSC1:FOSC0) to select one of these four modes:
1. LP: Low Power Crystal
2. XT: Crystal/Resonator
3. HS: High Speed Crystal/Resonator
4. RC: Resistor/Capacitor
Note: Not all oscillator sele ct ion s av ail abl e for al l
parts. See Section 9.1.
4.2 Crystal Oscill ator/Ceramic Resonators
In XT, LP or HS modes, a crystal or ceramic resonator
is connected to the OSC1/CLKIN and OSC2/CLKOUT
pins to establish oscillation (Figure 4-1). The
PIC16C5X oscillator de sign requires the use of a p arallel cut crystal. Use of a series cut crystal may give a frequency out of the crystal manufacturers specifications.
When in XT, LP or HS modes, the device can have an
external clock source drive the OSC1/CLKIN pin
(Figure 4-2).
FIGURE 4-1: CRYSTAL/CERAMIC
RESONATOR OPERATION
(HS, XT OR LP OSC
CONFIGURATION)
(1)
C1
(1)
C2
Note 1: See Capacitor Selection tables for
recommended values of C1 and C2.
2: A series resistor (RS) may be required
for AT strip cut crystals.
3: RF varies with the Oscillator mode cho-
sen (approx. value = 10 MΩ).
XTAL
RS
(2)
OSC1
OSC2
RF
(3)
PIC16C5X
SLEEP
To internal
logic
FIGURE 4-2: EXTERNAL CLOCK INPUT
OPERATION (HS, XT OR
LP OSC
CONFIGURATION)
Clock from
ext. system
Open
OSC1
PIC16C5X
OSC2
TABLE 4-1: CAPACITOR SELECTION FOR
CERAMIC RESONATORS PIC16C5X, PIC16CR5X
Osc
Type
XT 455 kHz
HS 8.0 MHz
These values are for design guidance only. Since
each resonator has its own characteristics, the user
should consult the resonator manufacturer for
appropriate values of external components.
Resonator
Freq
2.0 MHz
4.0 MHz
16.0 MHz
Cap. RangeC1Cap. Range
C2
68-100 pF
15-33 pF
10-22 pF
10-22 pF
10 pF
68-100 pF
15-33 pF
10-22 pF
10-22 pF
10 pF
TABLE 4-2: CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR PIC16C5X, PIC16CR5X
Osc
Typ e
LP 32 kHz
XT 100 kHz
HS 4 MHz
Note 1: For V
These values are for design guidance only. Rs may
be required in HS mode as wel l as X T mode to avoid
overdriving cry st a ls w it h low driv e le vel specification.
Since each crystal has its own characteristics, the
user should consult the crystal manufacturer for
appropriate values of external components.
Crystal
Freq
200 kHz
455 kHz
1 MHz
2 MHz
4 MHz
8 MHz
20 MHz
DD > 4.5V, C1 = C2 ≈ 30 pF is
recommended.
(1)
Cap.Range
C1
15 pF 15 pF
15-30 pF
15-30 pF
15-30 pF
15-30 pF
15 pF
15 pF
15 pF
15 pF
15 pF
Cap. Range
C2
200-300 pF
100-200 pF
15-100 pF
15-30 pF
15 pF
15 pF
15 pF
15 pF
15 pF
Note: If you change from this device to another
device, please ve rify osci llator c har acter istics in your application.
2002 Microchip Technology Inc. Preliminary DS30453D-page 15
PIC16C5X
4.3 External Crystal Oscillator Circuit
Either a prepackaged oscillator or a simple oscillator
circuit with TTL gates c an be used as an external crystal oscillat or circ uit. Pre packaged oscilla tors pro vide a
wide operating range and better stability. A welldesigned crystal oscillator will provide good performance with TTL gates. Two types of crystal oscillator
circuits can be used: one with parallel resonance, or
one with series resonance.
Figure 4-3 shows an im plementation example of a parallel resonant oscillator circuit. The circuit is designed
to use the fundamental frequency of the crystal. The
74AS04 inverter performs the 180-degree phase shift
that a parallel oscillator requires. The 4.7 kΩ resistor
provides the negative feedback for stability. The 10 kΩ
potentiometers bias the 74AS04 in the linear region.
This circuit could be used for external oscillator
designs.
FIGURE 4-3: EXAMPLE OF EXTERNAL
PARALLEL RESONANT
CRYSTAL OSCILLATOR
CIRCUIT (USING XT, HS
OR LP OSCILLATOR
MODE)
Figure 4-4 shows a series resonant oscillator circuit.
This circuit is also desi gned to use the funda mental fr equency of the crystal. The inverter performs a 180degree phase shift in a series resonant oscillator circuit. The 330kΩ resistors provide the negative feedback to bias the inverters in their linear region.
FIGURE 4-4: EXAMPLE OF EXTERNAL
SERIES RESONANT
CRYSTAL OSCILLATOR
CIRCUIT (USING XT, HS
OR LP OSCILLATOR
MODE)
To Other
74AS04
Devices
Open
PIC16C5X
CLKIN
OSC2
330K
74AS04
330K
74AS04
0.1 µF
XTAL
10K
+5V
10K
20 pF
4.7K
74AS04
XTAL
20 pF
74AS04
10K
Open
To Other
Devices
PIC16C5X
CLKIN
OSC2
DS30453D-page 16 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
4.4 RC Oscillator
For timing insensitive applications, the RC device
option offers additional cost savings. The RC oscillator
frequency is a funct ion of the su ppl y vo ltage, the resis-
EXT) and capacitor (CEXT) v alues, and the oper at-
tor (R
ing temperature. In addition to this, the oscillator
frequency wi ll v ar y fr om u ni t to un i t du e to no r ma l pro cess parameter variation. Furthermore, the difference
in lead fra me ca pacita nce bet ween packa ge type s w ill
also affect the oscillation frequency, especially for low
EXT values. The user also needs to take into account
C
variation due to tolerance of external R and C components used.
Figure 4-5 shows how the R/C combination is connected to the PIC16C5X. For R
2.2 kΩ, the oscillator operation may become unstable,
or stop completely. For very high R
(e.g., 1 MΩ) the oscillator becomes sensitive to noise,
humidity and leakage. Thus, we recommend keeping
EXT between 3 kΩ and 100 kΩ.
R
Although the oscillator will operate with no external
capacitor (CEXT = 0 pF), we recommend us ing values
above 20 pF for noi se an d s tability reasons. With no or
small external capacitance, the oscillation frequency
can vary dramatically due to changes in external
capacitances, such as PCB trace capacitance or package lead frame capacitance.
The Electrical Specifications sections show RC frequency variation from part to part due to normal process variation. The variat ion is larger f or larger R (since
leakage current vari ation will af fect RC fre quency mo re
for large R) and for smaller C (since variation of input
capacitance will affect RC frequency more).
Also, see the Electrical Specifications sections for variation of oscilla tor frequ ency due to V
C
EXT values as well as freq uency varia tion due to op er-
ating temperature for given R, C, and V
The oscillator frequency, divided by 4, is available on
the OSC2/CLKOU T pin, and can be used f or test purposes or to synchronize other logic.
EXT values below
EXT values
DD for given REXT/
DD values.
FIGURE 4-5: RC OSCILLATOR MODE
VDD
REXT
OSC1
CEXT
VSS
Fosc/4
N
OSC2/CLKOUT
Note: If you change from this device to another
device, please ve rify osci llator c har acter istics in your application.
Internal
clock
PIC16C5X
2002 Microchip Technology Inc. Preliminary DS30453D-page 17
PIC16C5X
NOTES:
DS30453D-page 18 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
and PD bits (STA TUS <4:3>) are set or cl eared
5.0 RESET
PIC16C5X devices may be RESET in one of the following ways:
• Power-On Reset (POR)
•MCLR
•MCLR Wake-up Reset (from SLEEP)
• WDT Reset (normal operation)
• WDT Wake-up Reset (from SLEEP)
Table 5-1 shows these RESET conditions for the PCL
and STATUS registers.
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are reset to a
“RESET state” on Power-On Reset (POR), MCLR
WDT Reset. A MCLR
also results in a device RESET, and not a continuation
of operation before SLEEP.
TABLE 5-1: STATUS BITS AND THEIR SIGNIFICANCE
Power-On Reset 11
MCLR
MCLR
WDT Reset (normal operation) 01
WDT Wake-up (from SLEEP) 00
Legend: u = unchanged, x = unknown, — = unimplemented read as ’0’.
Reset (normal operation)
or
or WDT wake-up from SLEEP
Condition TO PD
Reset (normal operation)
Wake-up (from SLEEP)
The TO
depending on the dif ferent RESET co nditio ns (Table 5-
1). These bits may be used to determine the nature of
the RESET.
Table 5-3 lists a full description of RESET states of all
registers. Figure 5-1 shows a simplified block diagram
of the On-chip Reset circuit.
uu
10
TABLE 5-2: SUMMARY OF REGISTERS ASSOCIATED WITH RESET
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
03h STATUS
Legend: u = unchanged, x = unknown, q = see Table 5-1 for possible values.
PA2 PA1 PA0 TO PD Z DC C 0001 1xxx 000q quuu
Value on
POR
Value on
MCLR and
WDT Reset
2002 Microchip Technology Inc. Preliminary DS30453D-page 19
PIC16C5X
TABLE 5-3: RESET CONDITIONS FOR ALL REGISTERS
Register Address Power-On Reset MCLR or WDT Reset
WN/Axxxx xxxx uuuu uuuu
TRIS N/A 1111 1111 1111 1111
OPTION N/A --11 1111 --11 1111
INDF 00h xxxx xxxx uuuu uuuu
TMR0 01h xxxx xxxx uuuu uuuu
PCL 02h 1111 1111 1111 1111
STATUS 03h 0001 1xxx 000q quuu
(1)
FSR
PORTA 05h ---- xxxx ---- uuuu
PORTB 06h xxxx xxxx uuuu uuuu
PORTC
(2)
General Purpose Register Files 07-7Fh xxxx xxxx uuuu uuuu
Legend: x = unknown u = unchanged - = unimplemented, read as ’0’
q = see tables in Table 5-1 for possible values.
Note 1: These values are valid for PIC16C57/CR57/C58/CR58. For the PIC16C54/CR54/C55/C56/CR56, the
value on RESET is 111x xxxx and for M CLR
2: General purpose register file on PIC16C54/CR54/C56/CR56/C58/CR58.
04h 1xxx xxxx 1uuu uuuu
07h xxxx xxxx uuuu uuuu
and WDT Reset, the value is 111u uuuu.
FIGURE 5-1: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Power-Up
Detect
VDD
MCLR/VPP pin
WDT
On-Chip
RC OSC
POR (Power-On Reset)
WDT Time-out
8-bit Asynch
Ripple Counter
(Device Reset
Timer)
RESET
SQ
R
Q
CHIP RESET
DS30453D-page 20 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
5.1 Power-On Reset (POR)
The PIC16C5X family incorporates on-chip Power-On
Reset (POR) circuitry which provides an internal chip
RESET for most power-up situations. To use this feature, the user merely ties the MCLR
simplified block diagram of the on-chip Power-On
Reset circuit is shown in Figure 5-1.
The Power-On Reset circuit and the Device Reset
Timer (Section 5.2) circuit are closely related. On
power-up, the RESET latch is set and the DRT is
RESET. The DRT timer begins counting on ce it detect s
to be high . After the time -out period, wh ich is
MCLR
typically 18 ms, it will RESET the reset latch and thus
end the on-chip RESET signal.
A power-up example where MCLR
shown in Figure 5-3. V
before bringing MCLR
out of reset T
In Figure 5-4, the on-chip P ower-On Reset featu re is
being used (MCLR and VDD are ti ed together). The VDD
is stable bef ore the st art-up tim er times out and the re is
no problem in getting a proper RESET. However,
Figure 5-5 depicts a probl em situati on where VDD rises
too slowly. The time between when the DRT senses a
high on the MCLR
pin (and VDD) actuall y reach th eir full valu e, is too long.
In this situation, when th e start-up timer times out, V
has not re ached the VDD (min) value and the chip is,
therefore, not guaranteed to function correctly. For
such situation s, we recommend that externa l RC circuits be used to achieve longer POR delay times
(Figure 5-2).
DRT msec after MCLR goes high.
DD is allowed to rise and stabilize
high. The chip will actual ly come
/VPP pin, and when the MCLR/VPP
/VPP pin to VDD. A
is not tied to VDD is
DD
FIGURE 5-2: EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW VDD POWER-UP)
VDDVDD
D
• External Power-On Reset circuit is required
only if V
helps discharge the capacitor quickly when
VDD powers down.
• R < 40 kΩ is recommended to make su re th at
voltage drop across R does not violate the
device electrical specification.
•R1 = 100Ω to 1 kΩ will limit any current flow-
ing into MCLR from external capacitor C in the
event of MCLR
static Discharge (ESD) or Electrical Overstress (EOS).
R
R1
C
DD power-up is too slow. The diode D
pin breakdown due to Electro-
MCLR
PIC16C5X
Note: When the device starts normal operation
(exits the RESET condition), device operating parameter s (v ol t age , fre que nc y, temperature, etc.) must be met to ensure
operation. If these conditions are not met,
the device must be hel d in RESET unti l the
operating conditions are met.
For more information on PIC16C5X POR, see
Up Consider ations
Handbook.
The POR circuit does not produce an internal RESET
DD declines.
when V
- AN522 in the Embedded Control
Power-
2002 Microchip Technology Inc. Preliminary DS30453D-page 21
PIC16C5X
FIGURE 5-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD)
VDD
MCLR
INTERNAL POR
TDRT
DRT TIME-OUT
INTERNAL RESET
FIGURE 5-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIME
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT
FIGURE 5-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIME
V1
VDD
TIED TO VDD): FAST VDD RISE
TIED TO VDD): SLOW VDD RISE
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
When VDD rises slowly, the TDRT time-out expires long before VDD has reached its final value. In
this example, the chip will RESET properly if, and only if, V1 ≥ VDD min
DS30453D-page 22 Preliminary 2002 Microchip Technology Inc.
TDRT
PIC16C5X
5.2 Device Reset Timer (DRT)
The Device Reset Timer (DRT) provides an 18 ms
nominal time-out on RESET regardless of Oscillator
mode used. The DR T operat es on an inte rnal RC os cillator. The processor is kept in RESET as long as the
DRT is active. The DRT delay allows V
DD min., and for the oscillator to stabilize.
V
DD to rise above
Oscillator circuit s ba sed on cryst als or cera mic res onators require a certain time after power-up to establish a
stable oscillati on. The on-chi p DRT ke ep s the device in
a RESET condition for approximately 18ms after the
voltage on the MCLR
IH) level. T hus, extern al RC network s connected t o
(V
the MCLR
input are not required in most cases, allow-
/VPP pin has reached a logic high
ing for savings in cost-sen sitive and /or space re stricted
applications.
The Device Reset time delay will vary from chip to chip
due to V
DD, temperature, and process variation. See
AC parameters for details.
The DRT will also be tri ggered upon a W atc hdog T im er
time-out. This is particularly important for applications
using the WDT to wake the PI C16C5X from SLEEP
mode automatically.
5.3 Reset on Brown-Out
A brown-out is a condition where device power (VDD)
dips below its minimum value, but no t to zero, and the n
recovers. The device should be RESET in the event of
a brown-out .
To RESET PIC16C5X devices when a brown-out
occurs, external brown-out protection circuits may be
built, as shown in Figu re 5-6, Figure 5-7 and Figure 5-
8.
FIGURE 5-6: EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 1
VDD
DD
V
33K
FIGURE 5-7: EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 2
VDD
V
DD
R1
Q1
MCLR
R2
40K
PIC16C5X
This brown-out circuit is less expensive, althou gh
less accurate. Transistor Q1 turns off when V
DD
is below a certain level such that:
V
DD •
R1
R1 + R2
= 0.7V
FIGURE 5-8: EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 3
VDD
bypass
capacitor
MCP809
Vss
V
DD
RST
This brown-out protection circuit employ s Micro-
chip Technology’s MCP809 microcontroller
supervisor. The MCP8XX and MCP1XX families
of supervisors provide push-pull and open collector outputs with both "active high and active low"
RESET pins. There are 7 differe nt trip point selec tions to accommodate 5V and 3V systems.
VDD
MCLR
PIC16C5X
10K
This circuit will activate RESET when VDD goes below Vz
+ 0.7V (where Vz = Zener voltage).
2002 Microchip Technology Inc. Preliminary DS30453D-page 23
Q1
40K
MCLR
PIC16C5X
PIC16C5X
NOTES:
DS30453D-page 24 Preliminary 2002 Microchip Technology Inc.
PIC16C5X
6.0 MEMORY ORGANIZATION
PIC16C5X memory is organiz ed into program memory
and data memory. For devices with more than 512
bytes of program memory, a paging scheme is used.
Program memory pages are accessed using o ne or two
ST ATUS Register bits. For devi ces with a d ata memor y
register file of more than 32 registers, a banking
scheme is used. Data memory banks are accessed
using the File Selection Register (FSR).
6.1 Program Memory Organization
The PIC16C54, PIC16CR54 and PIC16C55 have a 9bit Program Counter (PC ) capable of addressing a 512
x 12 program memory space (Figure 6-1). The
PIC16C56 and PIC16CR56 have a 10-bit Program
Counter (PC) capable of addressing a 1K x 12 program
memory space (Figure 6-2). The PIC16CR57,
PIC16C58 and PIC16CR58 have an 11-bit Program
Counter capable of addressing a 2K x 12 program
memory space (Figure6-3). Accessing a location
above the physicall y implem ented addre ss will ca use a
wraparound.
A NOP at the RESET vector location will caus e a rest art
at location 000h. The RESET ve ctor for the PIC16C5 4,
PIC16CR54 and PIC16C55 is at 1FFh. The RESET
vector for the PIC16C56 and PIC16CR56 is at 3FFh.
The RESET vector for the PIC16C57, PIC16CR57,
PIC16C58, and PIC16CR58 is at 7FFh. See
Section 6.5 for additional information using CALL and
GOTO instructions.
FIGURE 6-1: PIC16C54/CR54/C55
PROGRAM MEMORY MAP
AND STACK
PC<8:0>
CALL, RETLW
Space
User Memory
Stack Level 1
Stack Level 2
On-chip
Program
Memory
RESET Vector
9
000h
0FFh
100h
1FFh
FIGURE 6-2: PIC16C56/CR56
PROGRAM MEMO RY MAP
AND STACK
PC<9:0>
CALL, RETLW
Space
User Memory
Stack Level 1
Stack Level 2
On-chip Program
Memory (Page 0)
On-chip Program
Memory (Page 1)
RESET Vector
10
000h
0FFh
100h
1FFh
200h
2FFh
300h
3FFh
FIGURE 6-3: PIC16C57/CR57/C58/
CR58 PROGRAM
MEMORY MAP AND
STACK
PC<10:0>
CALL, RETLW
Space
User Memory
Stack Level 1
Stack Level 2
On-chip Program
Memory (Page 0)
On-chip Program
Memory (Page 1)
On-chip Program
Memory (Page 2)
On-chip Program
Memory (Page 3)
RESET Vector
11
000h
0FFh
100h
1FFh
200h
2FFh
300h
3FFh
400h
4FFh
500h
5FFh
600h
6FFh
700h
7FFh
2002 Microchip Technology Inc. Preliminary DS30453D-page 25
PIC16C5X
6.2 Data Memory Organization
Data memory is composed of registers, or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: Special Function Registers and
General Purpose Registers.
The Special Function Registers include the TMR0 register, the Program Counter (PC), the Status Register,
the I/O registers (ports) and the File Select Register
(FSR). In addition, Special Purpose Registers are used
to control the I/O port configuration and prescaler
options.
The General Purpose Registers are used for data and
control information under command of the instructions.
For the PIC16C54, PIC16CR54, PIC16C56 and
PIC16CR56, the register file is composed of 7 Special
Function Registers and 25 General Purpose Registers
(Figure 6-4).
For the PIC16C55, the register file is composed of 8
Special Function Registers and 24 General Purpose
Registers.
For the PIC1 6C57 an d PIC1 6CR57 , the re gister file is
composed of 8 Spec ial F unctio n Re gister s, 24 Genera l
Purpose Registers and up to 48 additional General
Purpose Registers that may be addressed using a
banking scheme (Figure 6-5).
For the PIC1 6C58 an d PIC1 6CR58 , the re gister file is
composed of 7 Spec ial F unctio n Re gister s, 25 Genera l
Purpose Registers and up to 48 additional General
Purpose Registers that may be addressed using a
banking scheme (Figure 6-6).
FIGURE 6-4: PIC16C54, PIC16CR54,
PIC16C55, PIC16C56,
PIC16CR56 REGISTER
FILE MAP
File Address
(1)
00h
01h
02h
03h
04h
05h
06h
07h
08h
1Fh
Note 1: Not a physical register. See
Section 6.7.
2: PIC16C55 only , in all o ther devic es this
is implemented as a a gen eral pu rpose
register .
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
General
Purpose
Registers
(2)
6.2.1 GENERAL PURPOSE REGISTER
FILE
The register file is accessed either directly or indirectly
through the File Select Register (FSR). The FSR Register is described in Sec tion 6.7.
DS30453D-page 26 Preliminary 2002 Microchip Technology Inc.
FIGURE 6-5: PIC16C57/CR57 REGISTER FILE MAP
FSR<6:5> 00 01 10 11
File Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
0Fh
10h
1Fh
(1)
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
General
Purpose
Registers
General
Purpose
Registers
Bank 0 Bank 1 Bank 2 Bank 3
20h
2Fh
30h
General
Purpose
Registers
3Fh
40h
Addresses map back to
addresses in Bank 0.
4Fh
50h
General
Purpose
Registers
5Fh
PIC16C5X
60h
6Fh
70h
General
Purpose
Registers
7Fh
Note 1 : Not a physical register. See Section 6.7.
FIGURE 6-6: PIC16C58/CR58 REGISTER FILE MAP
FSR<6:5> 00 01 10 11
File Address
00h
01h
02h
03h
04h
05h
06h
07h
0Fh
10h
1Fh
(1)
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
General
Purpose
Registers
General
Purpose
Registers
Bank 0 Bank 1 Bank 2 Bank 3
20h
2Fh
30h
General
Purpose
Registers
3Fh
40h
Addresses map back to
addresses in Bank 0.
4Fh
50h
General
Purpose
Registers
5Fh
60h
6Fh
70h
General
Purpose
Registers
7Fh
Note 1: Not a physical register. See Section 6.7.
2002 Microchip Technology Inc. Preliminary DS30453D-page 27
PIC16C5X
6.2.2 SPECIAL FUNCTION REGISTERS
The Special Function Registers are registers used by
the CPU and peripheral functions to control the operation of the device (Table 6-1).
The Special Registers ca n be classifi ed into two se ts.
The Special Function Registers associated with the
“core” functions are described in this section. Those
related to the operation of the peripheral features are
described in the section for each peripheral feature.
TABLE 6-1: SPECIAL FUNCTION REGISTER SUMMARY
Value on
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Power-on
Reset
N/A TRIS I/O Control Registers (TRISA, TRISB, TRISC)
N/A OPTION Contains control bits to configure T imer0 and Timer0/WDT prescaler
00h INDF Uses contents of FSR to address data memory (not a physical register)
01h TMR0 Timer0 Module Register
(1)
02h
03h STATUS
04h FSR Indirect data memory address pointer
05h PORTA
06h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
(2)
07h
Legend: x = unknown, u = unchanged, – = unimplemented, read as '0' (if applicable). Shaded cells = unimplemented or unused
Note 1: The upper byte of the Program Counter is not directly accessible. See Section 6.5 for an explanation of how to access
PCL Low order 8 bits of PC
PA2 PA1 PA0 TO PD ZDCC
— — — — RA3 RA2 RA1 RA0
PORTC RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
these bits.
2: File address 07h is a General Purpose Register on the PIC16C54, PIC16CR54, PIC16C56, PIC16CR56, PIC16C58 and
PIC16CR58.
3: These values are valid for PIC16C57/CR57/C58/CR58. For the PIC16C54/CR54/C55/C56/CR56, the value on RESET is
111x xxxx and for MCLR
and WDT Reset, the value is 111u uuuu.
1111 1111
- -11 1111
xxxx xxxx
xxxx xxxx
1111 1111
0001 1xxx
1xxx xxxx
---- xxxx
xxxx xxxx
xxxx xxxx
(3)
Details
on Page
35
30
32
38
31
29
32
35
35
35
DS30453D-page 28 Preliminary 2002 Microchip Technology Inc.
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