MICROCHIP PIC16C50X Technical data

PIC16C50X

EPROM Memory Programming Specification

This document includes the programming
specifications for the following devices:

• PIC16C505

1.2 Programming Mode

The Programming mode for the PIC16C50X allows
programming of user pr ogra m memory, and the confi g­uration word for the PIC16C50X.

1.0 PROGRAMMING THE PIC16C50X

Pin Diagram

PDIP, SOIC, Windowed CERDIP

The PIC16C50X can be programmed using a serial
method. Due to this serial programming, the
PIC16C50X can be programmed while in the user’s
system, increasin g d esi gn flexibility. Thi s pr ogra mm in g
specification applies to PIC16C50X devices in all
packages.

RB5/OSC1/CLKIN

RB4/OSC2/CLKOUT

RB3/MCLR

VDD

/VPP

RC5/T0CKI

RC4
RC3

1.1 Hardware Requirements

The PIC16C50X requires two programmable power
supplies, one for V
one for V

PP (12V to 14V). Both supplies shoul d have a

minimum resolution of 0.25V.

TABLE 1-1: PIN DESCRIPTIONS (DURING PROGRAMMING): PIC16C50X

Pin Name

RB3/MCLR

Legend: I = Input, O = Output, P = Power

DD (2.0V to 6.5V recommended) and

During Programming

Pin Name Pin Type Pin Description

RB1 CLOCK I Clock Input
RB0 DATA I/O Data Input/Output

/VPP VPP P Programming Power

VDD VDD P Power Supply

SS VSS PGround

V

1
2
3

4
5
6
7

14

PIC16C505

13
12
11
10

9
8

SS

V
RB0
RB1
RB2
RC0
RC1
RC2

 2001 Microchip Technology Inc. DS30603B-page 1

PIC16C50X

2.0 PROGRAM MODE ENTRY

The Program/Verify Test mode is entered by holding
pins RB0 and RB1 low , w hile raisin g MCLR
to VIHH. Once in this Test mode, the user program
memory and the test program memory can be
accessed and programmed in a serial fashion. The first
selected memory location is the configuration word.

RB0 and RB1 are Schmitt Trigger inputs in this
mode.

Incrementing the PC once (using the increment
address command) selects location 0x000 of the regu­lar program memory. Afterwards, all other memory
locations from 0x0 01-03FF can be add resse d by inc re­menting the PC.

If the program counter has reached the last user pro­gram location and is incremented again, the o n-chip spe­cial EPROM area will be addressed. (See Figure 2-2 to
determine where the special EPR OM area is located for
the various PIC16C50X devices.)

2.1 Programming Method

The programming technique is described in the follow­ing section. It is designed to guarantee good program­ming margins. It does, however, require a variable
power supply for V

2.1.1 PROGRAMMING METHOD DETAILS

Essentially, this technique includes the followi ng step s:

1. Perform blank check at V
failure. The device may not be properly erased.

2. Program location with pul ses and verify after each
pulse at V
required during progr amming (4.5V - 5.5V).

a) Programming condition:

PP = 12.75V to 13.25V

V
V

DD = VDDP = 4.5V to 5.5V
PP must be ≥ VDD + 7.25V to keep

V
“Programming mode” active.

b) Verify condition:

DD = VDDP

V
VPP ≥ VDD + 7.5V but not to exceed 13.25V
If location fails to program after “N” pulses (sug­gested maximum program pulses of 8), then
report error as a programm ing failure.

Note: Device must be verified at minimum and

3. Once loca tion pass es ‘Step 2’, apply 11X over­programming, i.e., apply 11 times the number of
pulses that were required to program the loca­tion. This will insure a solid programming mar­gin. The overprogramming should be made
“software programm able” for easy updates.

4. Program all location s .

5. Verify al l l oc ati ons (u sin g Speed Verify mo de) at

DD = VDDMIN.

V

CC.

DD = VDDMIN. Report

DD = VDDP: where VDDP = VDD range

maximum specified operating voltages as
specified in the data sheet.

pin from VIL

6. Verify all locations at VDD = VDDMAX.

DDMIN is the minimum operating voltage spec.

V
for the part. V

DDMAX is the maximum operating

voltage spec. for the part.

2.1.2 SYSTEM REQUIREMENTS

Clearly, to implement this technique, the most stringent
requirements will be that of the power supplies:

V

PP: VPP can be a fixed 13.0V to 13.25V supply . It must

not exceed 14.0V to avoid damage to the pin and
should be current limited to appro xi ma tely 100m A.

DD: 2.0V to 6.5V with 0.25V granularity. Since this

V

method calls f or verifi cation at d ifferent V
programmable V

DD power supply is needed.

DD values, a

Current Requirement: 40 mA maximum
Microchip may releas e devices in the future with differ-

DD ranges which mak e it nece ssary to have a p ro-

ent V
grammable V

DD.

It is important to verify an EPROM at the voltages
specified in this method to remain consistent with
Microchip's test scre ening. For e xample, a PIC16C 50X
specified for 4.5V to 5.5V should be tested for proper
programming from 4.5V to 5.5V.

Note: Any programmer not meeting the program-

mable V
V

DD requirement and the verify at

DDMAX and VDDMIN requirement, may

only be classified as a “prototype” or
“development” programmer, but not a
production programme r.

2.1.3 SOFTWARE REQUIREMENTS

Certain parameters should be programmable (and
therefore, easily modified) for easy upgrade.

a) Pulse width.
b) Maximum number of pulses, present limit 8.
c) Number of over-prog ram ming pulse s: sh ould b e

= (A • N) + B, where N = number of pulses
required in regular programming. In our current
algorithm A = 11, B = 0.

2.2 Programming Pulse Width

Program Memory Cells: When programming one

word of EPROM, a programming pulse width (T
100 µs is recommended.

The maximum number of programming attempts
should be limited to 8 per word.

After the first successful verify , the same location should
be over-programmed with 11X over-programming.

Configuration Word: The configuration word for oscil­lator selection, WDT (Watchdog Timer) disable and
code protection, and MCLR
programming pulse width (T

enable, requires a

PWF) of 10 ms. A series of

100 µs pulses is preferred over a single 10 ms pulse.

PW) of

DS30603B-page 2  2001 Microchip Technology Inc.

FIGURE 2-1: PROGRAMMING METHOD FLOW CHART

Start

Blank Check

DD = VDDMIN

@ V

Pass?

No

Yes

PIC16C50X

Report Possible Erase Failure

Continue Programming

at user’s option

Report Programming Failure

Yes

Increment PC to p o i n t to

next location, N = 0

Program 1 Location

@ V

PP = 12.75V to 13.25V

V

DD = VDDP

Pass?

Yes

Apply 11N additional

program pulses

All

locations

No

done?

Yes

Verify all locations

@ V

DD = VDDMIN

Pass?

No

No

No

(N = # of program pulses)

N > 8?

N = N + 1

Report verify failure

@ V

DDMIN

Yes

Verify all locations

VDD = VDD max.

@ V

DD = VDDMAX

Pass?

No

Yes

Now program

Configuration Word

Done

 2001 Microchip Technology Inc. DS30603B-page 3

Report verify failure

@ V

DDMAX

Verify Configuration Word

@ V

DDMAX & VDDMIN

PIC16C50X

FIGURE 2-2: PIC16C50X SERIES PROGRAM MEMORY MAP IN PROGRAM/VERIFY MODE

Address
(HEX) 000

NNN
TTT

TTT + 1
TTT + 2
TTT + 3

TTT + 3F

11 0

Bit Number

User Program Memory

(NNN + 1) x 12 bit

0 0 ID0
0 0 ID1
0 0 ID2
0 0 ID3

For Customer Use
(4 x 4 bit usable)

For Factory Use

(FFF)

NNN Highest normal EPROM memory address. NNN = 0x3FF for PIC16C505.

Note that some versions will have an oscillator calibration value programmed at NNN.

TTT Start address of special EPROM area and ID locations.

2.3 Special Memory Locations

The highest address of program memory space is
reserved for the intern al RC oscill ator calibra tion valu e.
This location should not be overwritten except when
this location is blank, and it should be verified, when
programmed, that it is a MOVLW XX instruction.

The ID Locations are a is only ena bled if the device i s in
Programming/Verify mode. Thus, in normal operation
mode, only the memory location 0x000 to 0xNNN will

2.3.1 CUSTOMER ID CODE LOCATIONS

Per definition, the first four words (address TTT to
TTT + 3) are reserved for customer use. It is recom­mended that the customer use on ly the four lower order
bits (bits 0 through 3) of each word and filling the eight
higher order bits with ’0’s.

A user may want to store an identification code (ID) in
the ID locations and still be able to read this code after

the code protection bit wa s programmed.
be accessed and the Progr am Co unter wil l just roll over
from address 0xNNN to 0x000 when incremented.

The configuration word can only be accessed immedi­ately after MCLR
Counter will be set to all ’1’s upon MCLR

, going from VIL to VHH. The Program

=VIL. Thus,

EXAMPLE 2-1: CUSTOMER CODE 0xD1E2

The Customer ID code “0xD1E2” should be stored in

the ID locations 400-403 like this:
it has the value “0xFFF” when access ing the c onfigur a-

tion EPROM. Incrementing the Program Counter once
causes the Program Counter to rollover to all '0's.
Incrementing the Program Counter 4K times after
RESET (MCLR

= VIL) does not allow access to the

configuration EPROM.

Reading these four memory locations, even with the

code protection bit programmed, would still output on

PORTA the bit sequence “1101”, “0001”, “1110”,

“0010” which is “0xD1E2”.

Configuration Word 5 bits

400: 0000 0000 1101

401: 0000 0000 0001

402: 0000 0000 1110

403: 0000 0000 0010

Note: All other loca tion s in PIC mic ro® configura-

tion memory are reserved and should not
be programmed.

DS30603B-page 4  2001 Microchip Technology Inc.

PIC16C50X

2.4 Program/Verify Mode

The Program/Verify mode is entered by holding pins
RB1 and RB0 l ow, while rais ing MC LR

IHH (high voltage). Once in this mode, the user pro-

V
gram memory and the configuration memory can be
accessed and progra mmed in serial fashion. The m ode
of operation is serial, and the me mory tha t is acces sed
is the user program memory. RB0 and RB1 are Schmitt
Trigger inputs in this mode.

The sequence that enters the devi ce into the Program­ming/V erify mode pla ces al l other logic into the RESET
state (the MCLR
that all I/O are in the RESET state (High impedance
inputs).

Note: The MCLR pin sho uld be raised fro m VIL to

pin was initia lly at VIL). This means

IHH within 9 ms of VDD rise. This is to

V
ensure that the device does not have the
PC incremented while in valid operation
range.

pin from VIL to

2.4.1 PROGRAM/VERIFY OPERATION

The RB1 pin is used as a clock input pin, and the RB0
pin is used for entering command bits and data input/
output during seria l operation. To input a co mmand, the
clock pin (RB1 ) is cy cl e d s ix ti m es. E a ch c om ma nd bi t
is latched on the fall ing edg e of th e cl oc k w ith the l eas t
significant bit (LSb) of the command being input first.
The data on pin RB0 is required to have a minimum
setup and hold time (see AC/DC sp ecs), with respect to
the falling edge o f the cloc k. Comm ands that have dat a
associated w ith them (read and l oad) are specifie d to
have a minimum delay of 1µs between the command
and the data. After this delay the clock pin is cycled 16
times with the first cycle being a START bit and the last
cycle being a STOP bit. Data is also input and output
LSb first. Therefore, during a read operation, the LSb
will be transmitted onto pin RB0 on the rising edge of
the second cycle, a nd du ring a lo ad operation, the LSb
will be latched on the fall ing edge of the second cycle.
A minimum 1 µs delay is also specified between con­secutive commands.

All commands are transmit ted LSb first. Data words ar e
also transmitted LSb first. The data is transmitted on
the rising edge and latched on the falling edge of the
clock. To allow for decoding of commands and reversa l
of data pin configuration, a time separation of at least
1µs is required between a command and a data word
(or another command).

The commands that are available are listed in Table 2-1.

TABLE 2-1: COMMAND MAPPING

Command Mapping (MSb ... LSb) Data

Load Data

Read Data

Increment Address

Begin programming

End Programming

Note: The clock must be disabled during in-circuit programming.

000010

000100

000110

001000

001110

0, data(14), 0
0, data(14), 0

 2001 Microchip Technology Inc. DS30603B-page 5

PIC16C50X

2.4.1.1 Load Data

After receiving this command, the chip will load in a
14-bit “data word” when 16 cycles are applied, as
described previously. Because this is a 12-bit core, the
two MSb’s of the data word are ignored. A timing dia­gram for the load data command is shown in
Figure 5-1.

2.4.1.2 Read Data

After receiving this command, the chip will transmit
data bits out o f the memory currently ac cessed, star ting
with the second risi ng edge of th e clock i nput. The R B0
pin will go into output mode on the second rising clock
edge, and it will revert back to input mode (hi­impedance) after the 16th rising edge. A timing
diagram of this command is shown in Fi gure 5-2.

2.4.1.3 Increment Address

The PC is incremented when this command is
received. A timing diagram of this command is shown
in Figure 5-3.

2.4.1.4 Begin Programming

A load data command must be given before every
begin programming command. Programming of the

appropriate memo ry (test program mem ory or user pro­gram memory) will begin after this command is
received and decoded. Programming should be per­formed with a series of 100µs programm ing pulses. A
programming pulse is defined as the time between the
begin programming command and the end program­ming command.

2.5 Programming Algorithm Requires
Variable V

The PIC16C50X uses an intelligent algorithm. The
algorithm calls for program verification at V
well as V

“erase margin”. Verification at V
“program margin”.

The actual programming must be done with V

DDP range (4.75 - 5.25V).

V

DDP =VCC range requir ed during pro gramming.

V

DDMIN = minimum operating VDD spec for the part.

V

DDMAX = maximum operating VDD spec for the p art.

V
Programmers must verify the PIC16C50X at its speci-

fied V
introduce future versions of the PIC16C50X with a
broader VDD range, it is best that these levels are user
selectable (defaults are ok).

DDMAX. Verification at VDDMIN insures good

DDMAX and VDDMIN levels. Since Microchip may

Note: Any programmer not meeting these

requirements may only be classified as a
“prototype” or “development” programmer,
but not a “production” quality programmer.

DD

DDMIN, as

DDMAX insures good

DD in the

2.4.1.5 End Programming

After receiving this command, the chip stops program­ming the memo ry (configuration pro gram memory o r
user program memory) that it was programming at the
time.

DS30603B-page 6  2001 Microchip Technology Inc.

3.0 CONFIGURATION WORD

The PIC16C50X family members have several config­uration bits. Thes e bit s can be program med (reads ’0’),
or left unprogrammed (reads ’1’), to select various
device configu rations . Figu re 3-1 provide s an overvi ew
of configuration bits.

FIGURE 3-1: CONFIGURATION WORD BIT MAP

Bit Number:

10 9 8

11

CPCP CPCP

7

6 54

CP CP

MCLRE

CP

3

WDTE

2

FOSC2

1

FOSC1

0

FOSC0

PIC16C50X

Register: CONFIG
Address 0FFFh

bit 11-6, 4: CP: Code Protection bits
bit 5: MCLRE: RB3/MCLR Pin Function Select bit

1 = RB3/MCLR
0 = RB3/MCLR pin function is digital I/O, MCLR internally tied to VDD

bit 3: WDTE: Watchdog Timer Enable bit

1 = WDT enabled
0 = WDT disabled

bit 2-0: FOSC2:FOSC0: Oscillator Selection bits

111 = External RC oscillator/CLKOUT function on RB4/OSC2/CLKOUT pin
110 = External RC oscillator/RB4 function on RB4/OSC2/CLKOUT pin
101 = Internal RC oscillator/CLKOUT function on RB4/OSC2/CLKOUT pin
100 = Internal RC oscillator/RB4 function on RB4/OSC2/CLKOUT pin
011 = Invalid selection
010 = HS oscillator
001 = XT oscilla tor
000 = LP oscillator

Note 1: All of the CP pins have to be given the same value to enable the code protection scheme listed.

2: 03FFh is always uncode protected on the PIC16C505. This location contains the MOVLW xx

calibration instruction for the INTRC.

pin function is MCLR

(1) (2)

 2001 Microchip Technology Inc. DS30603B-page 7

PIC16C50X

4.0 CODE PROTECTION

The program code writte n into the EPROM can be p ro­tected by writing to the CP bit of the config uration word.

In PIC16C50X, it is still possible to program and read
locations 0x000 through 0x03F, after code protection.
Once code protection is enabled, all protected seg­ments read '0's (or “garbage values”) and are pre-
vented from further programming. All unprotected

segments, including ID locations and configuration
word, read normally. These locations can be pro­grammed.

Once code protection is enabled, all code protected
locations (0x040 to 0x3FE) rea d 0’s. All unprotected
segments, including the internal oscillator calibration
value (0x3FF location), ID and config word read as
normal.

4.1 Embedding Configuration Word and ID Information in the HEX File

T o al low port ability of code , the programm er is required to read the configurati on word and ID loc ations from the H EX
file when loading the HEX fi le. If configuratio n word information w as not present in the HEX file, then a simple w arning
message may be issued . Similar ly, while saving a HEX file, configu ration word and ID info rmatio n must be includ ed.
An option to not include this information may be provided.

Microchip Technology Inc. feels strongly that this feature is important for the benefit of the end customer.

TA BLE 4-1: CODE PROTECTION: PIC16C505

To code protect:

(CP enable pattern: 000000X0XXXX)

Program Memory Segment R/W in Protected Mode R/W in Unprotected Mode

Configuration Word (0xFFF) Read Enabled, Write Enabled Read Enabled, Write Enabled

[0x00:0x3F] Read Enabled, Write Enabled Read Enabled, Write Enabled

[0x40:0x3FE] Read Disabled (all 0’s), Write Disabled Read Enabled, Write Enabled

0x3FF Read Enabled, Write Enabled Read Enabled, Write Enabled

ID Locations (0x400 : 0x403) Read Enabled, Write Enabled Read Enabled, Write Enabled

DS30603B-page 8  2001 Microchip Technology Inc.

PIC16C50X

4.2 Checksum

4.2.1 CHECKSUM CALCULATIONS

Checksum is calculated by reading the contents of the
PIC16C50X memory locations and adding up the
opcodes up to th e max imum use r addres sabl e loc ation
(not including the l ast l ocatio n whic h is re serve d for th e
oscillator calibration value), e.g., 0x3FE for the
PIC16C505. Any carry bits exceeding 16-bits are
neglected. Finally, the configuration word (appropri­ately masked) is added to the checksum. Checksum
computation for e ach member of th e PIC16C50X family
is shown in Table 4-2.

The checksum is calculated by summing the following:

• The contents of all program memory locations

• The configuration word, appropriately masked

• Masked ID locations (when applicable)

The Least Significant 16-bits of this sum are the
checksum.

TABLE 4-2: CHECKSUM COMPUTATION

Device

PIC16C505 OFFONSUM[0x000:0x3FE] + CFGW & 0xFFF

Legend: CFGW = Configuration Word

Code

Protect

SUM[0x000:0x03F] + CFGW & 0xFFF + SUM(IDS)

SUM[a:b] = [Sum of locations a through b inclusive]
SUM_ID = ID locations masked by 0xF then made into a 16-bit value with ID0 as the most significant nibble.
For example,
ID0 = 0x12, ID1 = 0x37, ID2 = 0x4, ID3 = 0x26, then SUM_ID = 0x2746.
*Checksum = [Sum of all the individual expressions] MODULO [0xFFFF]
+ = Addition
& = Bitwise AND

Checksum*

The following table describes how to calculate the
checksum for each devi ce. Note that the check sum cal­culation differs, depending on the code protect setting.
Since the program memory locations read out differ­ently, depending on the code protect setting, the table
describes how to m ani pu late the ac tua l p r ogra m mem ­ory values to simulate the values that would be read
from a protected dev ice. W hen c alcul ating a check sum
by reading a device, the entire program memory can
simply be read and summed. The configuration word
and ID locations can always be read.

The oscillator calibration value location is not used in
the above checksums.

Blank
Value

FC00
FBEF

0x723 at

0 and Max

Address

EA48
E15B

 2001 Microchip Technology Inc. DS30603B-page 9

PIC16C50X

5.0 PROGRAM/VERIFY MODE ELECTRICAL CHARACTERISTICS

TABLE 5-1: AC/DC CHARACTERISTICS

TIMING REQUIREMENTS FOR PROGRAM/VERIFY MODE

Standard Operatin g Conditions

Operating Temperature: +10°C ≤ T
Operating Voltage: 4.5V ≤ V

A ≤ +40°C, unless otherwise stated, (20°C recommended)

DD ≤ 5.5V, unless otherwise stated.

Parameter

No.

Sym. Characteristic Min. Typ. Max. Units Conditions

General

PD1 V
PD2 I

DDP Supply voltage during programming 4.75 5.0 5.25 V

DDP Supply current (from VDD)

20 mA

during programming
PD3 V
PD4 V

DDV Supply voltage during verify VDDMIN VDDMAX V (Note 1)

IHH1 Voltage on MCLR/VPP during

12.75 13.25 V (Note 2)

programming
PD5 VIHH2 Voltage on MCLR/VPP during verify VDD + 4.0 13.5
PD6 I

PD9 V
PD8 V

PP Programming supply current (from

PP)

V

IH1 (RB1, RB0) input high level 0.8 VDD V Schmitt Trigger input
IL1 (RB1, RB0) input low level 0.2 VDD V Schmitt Trigger input

50 mA

Serial Program Verify

P1 TR MCLR/VPP rise time (VSS to VHH) 8.0 µs
P2 Tf MCLR

fall time 8.0 µs
P3 Tset1 Data in setup time before clock ↓ 100 ns
P4 Thld1 Data in hold time after clock ↓ 100 ns
P5 Tdly1 Data input not driven to next clock input

1.0 µs
(delay required between
command/data or command/comman d)

P6 Tdly2 Delay between clock ↓ to clock ↑ of

1.0 µs
next command or data

P7 Tdly3 Clock ↑ to date out valid

200 ns

(during read data)

P8 Thld0 Hold time after MCLR

Note 1: Program must be verified at the minimum and maximum V

2: V

IHH must be greater than VDD + 4.5V to stay in Programming/Verify mode.

↑ 2 µs

DD limits for the part.

DS30603B-page 10  2001 Microchip Technology Inc.

FIGURE 5-1: LOAD DATA COMMAND (PROGRAM/VERIFY)

V

IHH

MCLR/VPP

RB1

(Clock)

RB0

(Data)

RESET

P8

100ns

21

P3

}

100ns

min.

100ns

1

P4

}

0

43

5

0

0

0

Program/Verify Mode

6

0

P6

1µs min.

P5

1µs min.

1

0

P3

}

100ns

min.

FIGURE 5-2: READ DATA COMMAND (PROGRAM/VERIFY)

V

IHH

MCLR/VPP

RB1

(Clock)

RB0

(Data)

RESET

P8

100ns

21

100ns

0

0

P4

P3

}

}

100ns

min.

43

5

0

1

6

00

P6

1µs min.

P5

1µs min.

1

P7

Program/Verify Mode

PIC16C50X

5432

15

0

P4

}

5432

15

RB0 = Output

RB0
Input

FIGURE 5-3: INCREMENT ADDRESS COMMAND (PROGRAM/VERIFY)

RB1

(Clock)

RB0

(Data)

RESET

VIHH

P6

1

23

1

1

45

000

0

1µs min.

61

P5

P3

}

100ns

min.

P4

}

1µs min.

Program/Verify Mode

MCLR/VPP

Next Command

2

0

0

 2001 Microchip Technology Inc. DS30603B-page 11

PIC16C50X

NOTES:

DS30603B-page 12  2001 Microchip Technology Inc.

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Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro

devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.

®

8-bit MCUs, KEELOQ

®

code hoppin g

DS30557F - page 15  2001 Microchip Technology Inc.

WORLDWIDE SALES AND SERVICE

AMERICAS

Corporate Office

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: [phone] Fax: [phone]
Technical Support: 480-792-7627
Web Address: http://www.microchip.com

Rocky Mountain

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: [phone] Fax: [phone]

Atlanta

500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Tel : [phone] Fax: [phone]

Austin

Analog Product Sales
8303 MoPac Expressway North
Suite A-201
Austin, TX 78759
Tel : [phone] Fax: [phone]

Boston

2 Lan Drive, Suite 120
Westford, MA 01886
Tel : [phone] Fax: [phone]

Boston

Analog Product Sales
Unit A-8-1 Millbrook Tarry Condominium
97 Lowell Road
Concord, MA 01742
Tel : [phone] Fax: [phone]

Chicago

333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: [phone] Fax: [phone]

Dallas

4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel : [phone] Fax: [phone]

Dayton

Two Prestige Place, Suite 130
Miamisburg, OH 45342
Tel : [phone] Fax: [phone]

Detroit

Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: [phone] Fax: [phone]

Los Angeles

18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel : [phone] Fax: [phone]

Mountain View

Analog Product Sales
1300 Terra Bella Avenue
Mountain View, CA 94043-1836
Tel : [phone] Fax: [phone]

New York

150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: [phone] Fax: [phone]

San Jose

Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: [phone] Fax: [phone]

Toronto

6285 Northam Drive, Suite 108
Mississa uga, Ontario L4V 1X5, Canada
Tel: [phone] Fax: [phone]

ASIA/PACIFIC

Australia

Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: [phone] Fax: [phone]

China - Beij ing

Microchip Technology Beijing Office
Unit 915
New China Hong Kong Manhattan Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: [phone] Fax: [phone]

China - Shanghai

Microchip Technology Shanghai Office
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: [phone] Fax: [phone]

Hong Kong

Microchip Asia Pacific
RM 2101, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: [phone] Fax: [phone]

India

Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: [phone] Fax: [phone]

Japan

Microchip Technology Intl. Inc.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: [phone] Fax: [phone]

ASIA/PACIFIC (continued)

Korea

Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea
Tel: [phone] Fax: [phone]

Singapore

Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: [phone] Fax: [phone]

Taiwan

Microchip Technology Taiwan
11F-3, No . 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: [phone] Fax: [phone]

EUROPE

Denmark

Microchip Technology Denmark ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: [phone] Fax: [phone]

France

Arizona Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: [phone] - 20 Fax: [phone]

Germany

Arizona Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: [phone] Fax: [phone]

Germany

Analog Product Sales
Lochhamer Strasse 13
D-82152 Martinsried, Germany
Tel: [phone] Fax: [phone]

Italy

Arizona Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: [phone] Fax: [phone]

United Kingdom

Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: [phone] Fax: [phone]

01/30/01

All rights reserved. © 2001 Microchip Technology Incorporated. Printed in the USA. 2/01 Printed on recycled paper.

Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by
updates. It is your respo nsibilit y to en sure t hat you r app licatio n mee ts with y our sp ecifica tions . No re presen tation or warra nty is given and n o liability is
assumed by Micro chip Technology Incorporate d with re spect t o the accur acy or use of such infor mation, o r infrin gemen t of patents or other intellectua l
property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec­tual property righ ts. The Microchip lo go and name are registered tradema rks of Microchip Technology Inc. in the U.S.A. and other countries. All rights
reserved. All other trademarks mentioned herein are the property of their respective companies.

DS30557F-page 16  2001 Microchip Technology Inc.