MICROCHIP PIC16C50X Technical data
PIC16C50X
EPROM Memory Programming Specification
This document includes the programming
specifications for the following devices:
• PIC16C505
1.2 Programming Mode
The Programming mode for the PIC16C50X allows
programming of user pr ogra m memory, and the confi guration word for the PIC16C50X.
1.0 PROGRAMMING THE PIC16C50X
Pin Diagram
PDIP, SOIC, Windowed CERDIP
The PIC16C50X can be programmed using a serial
method. Due to this serial programming, the
PIC16C50X can be programmed while in the user’s
system, increasin g d esi gn flexibility. Thi s pr ogra mm in g
specification applies to PIC16C50X devices in all
packages.
RB5/OSC1/CLKIN
RB4/OSC2/CLKOUT
RB3/MCLR
VDD
/VPP
RC5/T0CKI
RC4
RC3
1.1 Hardware Requirements
The PIC16C50X requires two programmable power
supplies, one for V
one for V
PP (12V to 14V). Both supplies shoul d have a
minimum resolution of 0.25V.
TABLE 1-1: PIN DESCRIPTIONS (DURING PROGRAMMING): PIC16C50X
Pin Name
RB3/MCLR
Legend: I = Input, O = Output, P = Power
DD (2.0V to 6.5V recommended) and
During Programming
Pin Name Pin Type Pin Description
RB1 CLOCK I Clock Input
RB0 DATA I/O Data Input/Output
/VPP VPP P Programming Power
VDD VDD P Power Supply
SS VSS PGround
V
1
2
3
4
5
6
7
14
PIC16C505
13
12
11
10
9
8
SS
V
RB0
RB1
RB2
RC0
RC1
RC2
2001 Microchip Technology Inc. DS30603B-page 1
PIC16C50X
2.0 PROGRAM MODE ENTRY
The Program/Verify Test mode is entered by holding
pins RB0 and RB1 low , w hile raisin g MCLR
to VIHH. Once in this Test mode, the user program
memory and the test program memory can be
accessed and programmed in a serial fashion. The first
selected memory location is the configuration word.
RB0 and RB1 are Schmitt Trigger inputs in this
mode.
Incrementing the PC once (using the increment
address command) selects location 0x000 of the regular program memory. Afterwards, all other memory
locations from 0x0 01-03FF can be add resse d by inc rementing the PC.
If the program counter has reached the last user program location and is incremented again, the o n-chip special EPROM area will be addressed. (See Figure 2-2 to
determine where the special EPR OM area is located for
the various PIC16C50X devices.)
2.1 Programming Method
The programming technique is described in the following section. It is designed to guarantee good programming margins. It does, however, require a variable
power supply for V
2.1.1 PROGRAMMING METHOD DETAILS
Essentially, this technique includes the followi ng step s:
1. Perform blank check at V
failure. The device may not be properly erased.
2. Program location with pul ses and verify after each
pulse at V
required during progr amming (4.5V - 5.5V).
a) Programming condition:
PP = 12.75V to 13.25V
V
V
DD = VDDP = 4.5V to 5.5V
PP must be ≥ VDD + 7.25V to keep
V
“Programming mode” active.
b) Verify condition:
DD = VDDP
V
VPP ≥ VDD + 7.5V but not to exceed 13.25V
If location fails to program after “N” pulses (suggested maximum program pulses of 8), then
report error as a programm ing failure.
Note: Device must be verified at minimum and
3. Once loca tion pass es ‘Step 2’, apply 11X overprogramming, i.e., apply 11 times the number of
pulses that were required to program the location. This will insure a solid programming margin. The overprogramming should be made
“software programm able” for easy updates.
4. Program all location s .
5. Verify al l l oc ati ons (u sin g Speed Verify mo de) at
DD = VDDMIN.
V
CC.
DD = VDDMIN. Report
DD = VDDP: where VDDP = VDD range
maximum specified operating voltages as
specified in the data sheet.
pin from VIL
6. Verify all locations at VDD = VDDMAX.
DDMIN is the minimum operating voltage spec.
V
for the part. V
DDMAX is the maximum operating
voltage spec. for the part.
2.1.2 SYSTEM REQUIREMENTS
Clearly, to implement this technique, the most stringent
requirements will be that of the power supplies:
V
PP: VPP can be a fixed 13.0V to 13.25V supply . It must
not exceed 14.0V to avoid damage to the pin and
should be current limited to appro xi ma tely 100m A.
DD: 2.0V to 6.5V with 0.25V granularity. Since this
V
method calls f or verifi cation at d ifferent V
programmable V
DD power supply is needed.
DD values, a
Current Requirement: 40 mA maximum
Microchip may releas e devices in the future with differ-
DD ranges which mak e it nece ssary to have a p ro-
ent V
grammable V
DD.
It is important to verify an EPROM at the voltages
specified in this method to remain consistent with
Microchip's test scre ening. For e xample, a PIC16C 50X
specified for 4.5V to 5.5V should be tested for proper
programming from 4.5V to 5.5V.
Note: Any programmer not meeting the program-
mable V
V
DD requirement and the verify at
DDMAX and VDDMIN requirement, may
only be classified as a “prototype” or
“development” programmer, but not a
production programme r.
2.1.3 SOFTWARE REQUIREMENTS
Certain parameters should be programmable (and
therefore, easily modified) for easy upgrade.
a) Pulse width.
b) Maximum number of pulses, present limit 8.
c) Number of over-prog ram ming pulse s: sh ould b e
= (A • N) + B, where N = number of pulses
required in regular programming. In our current
algorithm A = 11, B = 0.
2.2 Programming Pulse Width
Program Memory Cells: When programming one
word of EPROM, a programming pulse width (T
100 µs is recommended.
The maximum number of programming attempts
should be limited to 8 per word.
After the first successful verify , the same location should
be over-programmed with 11X over-programming.
Configuration Word: The configuration word for oscillator selection, WDT (Watchdog Timer) disable and
code protection, and MCLR
programming pulse width (T
enable, requires a
PWF) of 10 ms. A series of
100 µs pulses is preferred over a single 10 ms pulse.
PW) of
DS30603B-page 2 2001 Microchip Technology Inc.
FIGURE 2-1: PROGRAMMING METHOD FLOW CHART
Start
Blank Check
DD = VDDMIN
@ V
Pass?
No
Yes
PIC16C50X
Report Possible Erase Failure
Continue Programming
at user’s option
Report Programming Failure
Yes
Increment PC to p o i n t to
next location, N = 0
Program 1 Location
@ V
PP = 12.75V to 13.25V
V
DD = VDDP
Pass?
Yes
Apply 11N additional
program pulses
All
locations
No
done?
Yes
Verify all locations
@ V
DD = VDDMIN
Pass?
No
No
No
(N = # of program pulses)
N > 8?
N = N + 1
Report verify failure
@ V
DDMIN
Yes
Verify all locations
VDD = VDD max.
@ V
DD = VDDMAX
Pass?
No
Yes
Now program
Configuration Word
Done
2001 Microchip Technology Inc. DS30603B-page 3
Report verify failure
@ V
DDMAX
Verify Configuration Word
@ V
DDMAX & VDDMIN
PIC16C50X
FIGURE 2-2: PIC16C50X SERIES PROGRAM MEMORY MAP IN PROGRAM/VERIFY MODE
Address
(HEX) 000
NNN
TTT
TTT + 1
TTT + 2
TTT + 3
TTT + 3F
11 0
Bit Number
User Program Memory
(NNN + 1) x 12 bit
0 0 ID0
0 0 ID1
0 0 ID2
0 0 ID3
For Customer Use
(4 x 4 bit usable)
For Factory Use
(FFF)
NNN Highest normal EPROM memory address. NNN = 0x3FF for PIC16C505.
Note that some versions will have an oscillator calibration value programmed at NNN.
TTT Start address of special EPROM area and ID locations.
2.3 Special Memory Locations
The highest address of program memory space is
reserved for the intern al RC oscill ator calibra tion valu e.
This location should not be overwritten except when
this location is blank, and it should be verified, when
programmed, that it is a MOVLW XX instruction.
The ID Locations are a is only ena bled if the device i s in
Programming/Verify mode. Thus, in normal operation
mode, only the memory location 0x000 to 0xNNN will
2.3.1 CUSTOMER ID CODE LOCATIONS
Per definition, the first four words (address TTT to
TTT + 3) are reserved for customer use. It is recommended that the customer use on ly the four lower order
bits (bits 0 through 3) of each word and filling the eight
higher order bits with ’0’s.
A user may want to store an identification code (ID) in
the ID locations and still be able to read this code after
the code protection bit wa s programmed.
be accessed and the Progr am Co unter wil l just roll over
from address 0xNNN to 0x000 when incremented.
The configuration word can only be accessed immediately after MCLR
Counter will be set to all ’1’s upon MCLR
, going from VIL to VHH. The Program
=VIL. Thus,
EXAMPLE 2-1: CUSTOMER CODE 0xD1E2
The Customer ID code “0xD1E2” should be stored in
the ID locations 400-403 like this:
it has the value “0xFFF” when access ing the c onfigur a-
tion EPROM. Incrementing the Program Counter once
causes the Program Counter to rollover to all '0's.
Incrementing the Program Counter 4K times after
RESET (MCLR
= VIL) does not allow access to the
configuration EPROM.
Reading these four memory locations, even with the
code protection bit programmed, would still output on
PORTA the bit sequence “1101”, “0001”, “1110”,
“0010” which is “0xD1E2”.
Configuration Word 5 bits
400: 0000 0000 1101
401: 0000 0000 0001
402: 0000 0000 1110
403: 0000 0000 0010
Note: All other loca tion s in PIC mic ro® configura-
tion memory are reserved and should not
be programmed.
DS30603B-page 4 2001 Microchip Technology Inc.
PIC16C50X
2.4 Program/Verify Mode
The Program/Verify mode is entered by holding pins
RB1 and RB0 l ow, while rais ing MC LR
IHH (high voltage). Once in this mode, the user pro-
V
gram memory and the configuration memory can be
accessed and progra mmed in serial fashion. The m ode
of operation is serial, and the me mory tha t is acces sed
is the user program memory. RB0 and RB1 are Schmitt
Trigger inputs in this mode.
The sequence that enters the devi ce into the Programming/V erify mode pla ces al l other logic into the RESET
state (the MCLR
that all I/O are in the RESET state (High impedance
inputs).
Note: The MCLR pin sho uld be raised fro m VIL to
pin was initia lly at VIL). This means
IHH within 9 ms of VDD rise. This is to
V
ensure that the device does not have the
PC incremented while in valid operation
range.
pin from VIL to
2.4.1 PROGRAM/VERIFY OPERATION
The RB1 pin is used as a clock input pin, and the RB0
pin is used for entering command bits and data input/
output during seria l operation. To input a co mmand, the
clock pin (RB1 ) is cy cl e d s ix ti m es. E a ch c om ma nd bi t
is latched on the fall ing edg e of th e cl oc k w ith the l eas t
significant bit (LSb) of the command being input first.
The data on pin RB0 is required to have a minimum
setup and hold time (see AC/DC sp ecs), with respect to
the falling edge o f the cloc k. Comm ands that have dat a
associated w ith them (read and l oad) are specifie d to
have a minimum delay of 1µs between the command
and the data. After this delay the clock pin is cycled 16
times with the first cycle being a START bit and the last
cycle being a STOP bit. Data is also input and output
LSb first. Therefore, during a read operation, the LSb
will be transmitted onto pin RB0 on the rising edge of
the second cycle, a nd du ring a lo ad operation, the LSb
will be latched on the fall ing edge of the second cycle.
A minimum 1 µs delay is also specified between consecutive commands.
All commands are transmit ted LSb first. Data words ar e
also transmitted LSb first. The data is transmitted on
the rising edge and latched on the falling edge of the
clock. To allow for decoding of commands and reversa l
of data pin configuration, a time separation of at least
1µs is required between a command and a data word
(or another command).
The commands that are available are listed in Table 2-1.
TABLE 2-1: COMMAND MAPPING
Command Mapping (MSb ... LSb) Data
Load Data
Read Data
Increment Address
Begin programming
End Programming
Note: The clock must be disabled during in-circuit programming.
000010
000100
000110
001000
001110
0, data(14), 0
0, data(14), 0
2001 Microchip Technology Inc. DS30603B-page 5
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