How it Works
MICROCHIP
Loading...
MCP6281
Technical data
32 pgs594.43 Kb0
Technical data
36 pgs643.96 Kb0
Table of contents
Loading...

MICROCHIP MCP6281, MCP6282, MCP6283, MCP6284, MCP6285 Technical data

MCP6281/2/3/4/5
450 µA, 5 MHz Ra il -to-Rai l Op Amp
Features
• Gain Bandwidth Product: 5 MHz (typ.)
• Supply Current: I
= 450 µA (typ.)
Q
• Supply Voltage: 2.2V to 5.5V
• Extended Temperature Range: -40°C to +125°C
• Available in Single, Dual and Quad Packages
• Single with Chip Select
• Dual with Chip Select
(CS) (MCP6283)
(CS) (MCP6285)
Applications
• Automotive
• Portable Equipment
• Photodiode Amplifier
• Analog Filters
• Notebooks and PDAs
• Battery-Powered Systems
Available Tools
• SPICE Macro Model (at www.microchip.com)
•FilterLab
®
Software (at www.microchip.com)
Description
The Microchip Technology Inc. MCP6281/2/3/4/5 family of opera tio nal a mp lifi ers (o p am p s ) pr ovi de wide bandwidth for the current. This family has a 5 MHz Gain Bandwidth Product (GBWP) and a 65° phase margin. This family also operates from a single supply voltage as low as 2.2V, while drawing 450 µA (typ.) quiescent current. Additionally, the MCP6281/2/3/4/5 supports rail-to-rail input and output swing, with a common mode input v oltage range of V V
– 300 mV. This family of operational amplifiers is
SS
designed with Microchip’s advanced CMOS process. The MCP6285 has a Chip Select
(CS) input for dual op amps in an 8-pin package. This device i s manufactured by cascading the two op amps (the output of op am p A connected to the non-inverting inp ut of op amp B). The
input puts the device in Low-power mode.
CS The MCP6281/2/3/4/5 family operates over the
Extended Temperature Range of -40°C to +125°C. It also has a power supply range of 2.2V to 5.5V.
+ 300 mV to
DD
Package Types
MCP6281
PDIP, SOIC, MSOP
1
NC
_
2
V
IN
+
V
3
IN
V
4
SS
8
NC
7
-
+
V
DD
V
6
OUT
5
NC
MCP6283
PDIP, SOIC, MSOP
NC
1
_
V
2
IN
SS
+
3 4
VIN+
V
2004 Microchip Technology Inc. DS21811D-page 1
8
CS
V
OUT
-
V
7
DD
V
OUT
SS
VIN+
V
6 5
NC
V
OUT
V
SS
VIN+
MCP6283
SOT-23-6
1 2 3
MCP6281
SOT-23-5
1
+
2 3
+
-
MCP6281R
SOT-23-5
V
5
­VIN–
4
DD
V
V
VIN+
OUT
DD
1 2
+
3
V
5
­VIN–
4
V
SS
MCP6284
PDIP, SOIC, TSSOP
V
1
DD
IN
OUTA
_
V
2
-
INA
V
INA
_
V
DD
V
INB
V
INB
V
OUTB
+
3
+
4 5
+
_
-
+
6 7
V
6
CS
5
V
4
V
14
OUTD
V
OUTA/VINB
_
V
13
+
-
IND
12
V
+
IND
11
V
SS
10
V
+
INC
-
+
_
9
V
INC
V
8
OUTC
MCP6282
PDIP, SOIC, MSOP
OUTA
1
_
V
2
-
INA
V
INA
V
SS
+
+
3
+
-
4
MCP6285
PDIP, SOIC, MSOP
+
1
_
V
2
SS
-+
+
+
3 4
-
INA
V
INA
V
V
8
DD
7
V
OUTB
_
6
V
INB
5
V
+
INB
V
8
DD
V
7
OUTB
_
V
6
INB
5
CS
MCP6281/2/3/4/5

1.0 ELECTRICAL CHARACTERISTICS

† Notice: Stresses above those listed under “Maximum Rat-
ings” may cause permanent damage to the devic e. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
Absolute Maximum Ratings †
VDD – VSS........................................................................7.0V
All Inputs and Outputs ................... V
Difference Input Voltage ......................................|V
– 0.3V to VDD + 0.3V
SS
– VSS|
DD
operational listings of this specification is not implied. Expo­sure to maximum rating conditions for extended periods m ay affect device reliability.
Output Short Circuit Current .................................Continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage Temperature.....................................-65°C to +150°C
Junction Temperature (T
) ..........................................+150°C
J
ESD Protection On All Pins (HBM;MM)................≥ 4 kV;400V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND,
V
= VDD/2, RL = 10 kΩ to VDD/2 and V
CM
Parameters Sym Min Typ Max Units Conditions
Input Offset
Input Offset Voltage V Input Offset Voltage
(Extended Temperat ure) Input Offset Temperature Drift ∆V
Power Supply Rejection Ratio PSRR 70 90 — dB V
Input Bias, Input Offset Cur r e nt an d Im pe da nce
Input Bias Current I
At Temperature I
At Temperature I Input Offset Current I Common Mode Input Impedance Z Differential Input Impedance Z
Common Mode (Note 4)
Common Mode Input Range V Common Mode Rejection Ratio CMRR 70 85 — dB V Common Mode Rejection Ratio CMRR 65 80 — dB V
Open-Loop Gain
DC Open-Loop Gain (Large Signal) A
Output
Maximum Output Voltage Swing V Output Short Circuit Current I
Power Supply
Supply Voltage V Quiescent Current per Amplifier I Note 1: The MCP6285’s V
for op amp B (pins V
CM
2: The current at the MCP6285’s V 3: This specification does not apply to the MCP6285’s V 4: The MCP6285’s V
The MCP6285’s V
– pin (op amp B) has a c om m on mode range (V
INB OUTA/VINB
≈ VDD/2.
OUT
OS
V
OS
/∆T
OS
B B B
OS
CM
DIFF
CMR
OL
, VOHV
OL
SC
DD Q
– pin is specified by IB only.
INB
+ pin (op amp B) has a vo ltag e range specified by VOH and VOL.
-3.0 — +3.0 mV VCM = VSS (Note 1)
-5.0 — +5.0 mV TA= -40°C to +125°C, V
CM
—±1.7—µV/°CT
A
= -40°C to +125°C,
A
V
CM CM
— ±1.0 — pA Note 2 — 50 200 pA TA= +85°C (Note 2) —2 5nAT
= +125°C (Note 2)
A
— ±1.0 — pA Note 3 —1013||6 — Ω||pF Note 3 —1013||3 — Ω||pF Note 3
V
− 0.3 — V
SS
90 110 — dB V
+ 15 — V
SS
+ 0.3 V
DD
– 15 mV
DD
CM CM
OUT
V
CM=VSS
—±25—mA
2.2 — 5.5 V
300 450 570 µA IO = 0
OUTA/VINB
+ and V
OUTA/VINB
–) is VSS + 100 mV.
INB
+ pin.
) of VSS + 100 m V to VDD – 100 mV.
CMR
= V
(Note 1)
SS
= VSS (Note 1) = VSS (Note 1)
= -0.3V to 2.5V, V = -0.3V to 5.3V, V
DD DD
= 0.2V to VDD – 0.2V,
(Note 1)
= 5V = 5V
DS21811D-page 2 2004 Microchip Technology Inc.
MCP6281/2/3/4/5
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND,
V
= VDD/2, V
CM
AC Response
Gain Bandwidth Product GBWP — 5.0 — MHz Phase Margin at Unity-Gain PM — 65 — ° Slew Rate SR — 2.5 — V/µs
Noise
Input Noise Voltage E Input Noise Voltage Density e Input Noise Current Density i
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, V
Temperature Ranges
Operating Temperature Range T Storage Temperature Range T
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23 θ Thermal Resistance, 6L-SOT-23 θ Thermal Resistance, 8L-PDIP θ Thermal Resistance, 8L-SOIC θ Thermal Resistance, 8L-MSOP θ Thermal Resistance, 14L-PDIP
Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP
Note: The Junction Temperature (T
≈ VDD/2, RL = 10 kΩ to VDD/2 and CL = 60 pF.
OUT
Parameters Sym Min Typ Max Units Conditions
ni
ni
ni
—3.5— µV
P-P
—16—nV/√Hz f = 1 kHz —3—fA/√Hz f = 1 kHz
= +2.2V to +5.5V and VSS = GND.
DD
Parameters Sym Min Typ Max Units Conditions
A A
JA JA JA JA JA
θ
JA
θ
JA
θ
JA
) must not exceed the Absolute Maximum specification of +150°C.
J
-40 — +125 °C Note
-65 — +150 °C
— 256 — °C/W — 230 — °C/W —85—°C/W — 163 — °C/W — 206 — °C/W —
— —
70 120 100
— — —
°C/W °C/W °C/W
f = 0.1 Hz to 10 Hz
2004 Microchip Technology Inc. DS21811D-page 3
MCP6281/2/3/4/5
.)
MCP6283/MCP6285 CHIP SELECT (CS) SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND,
= VDD/2, V
V
CM
CS
Low Specifications
CS
Logic Threshold, Low V Input Current, Low I
CS
CS High Specifications
CS
Logic Threshold, High V Input Current, High I
CS GND Current per Amplifier I Amplifier Output Leakage — — 0.01 — µA CS = V
Dynamic Specifications (Note 1)
Low to Valid Amplifier
CS Output, Turn-on Time
CS
High to Amplifier Output High-Z t
Hysteresis V Note 1: The input condition (V
≈ VDD/2, RL = 10 kΩ to VDD/2 and CL = 60 pF.
OUT
Parameters Sym Min Typ Max Units Conditions
) specified applies to both op amp A and B of the MCP6285. The dynamic specification is tested
at the output of op amp B (V
IN
CSL
CSH
SS
t
ON
OFF
HYST
OUTB
IL
IH
V
SS
—0.01—µACS = V
0.8 V
DD
—0.7 2µACS = V —-0.7—µACS = V
—410µsCS Low ≤ 0.2 VDD, G = +1 V/V,
—0.01—µsCS High ≥ 0.8 VDD, G = +1 V/V,
—0.6—VV
).
—0.2VDDV
—VDDV
V
= VDD/2, V
IN
= 5.0V
V
DD
= VDD/2, V
V
IN
= 5V
DD
SS
DD
DD
DD
= 0.9 VDD/2,
OUT
= 0.1 VDD/2
OUT
CS
V
I
SS
I
CS
OUT
Hi-Z
-0.7 µA (typ.)
0.7 µA (typ.)
V
IL
t
ON
-450 µA (typ.)
V
IH
t
OFF
Hi-Z
-0.7 µA (typ
0.7 µA (typ.)
10 nA (typ.)
FIGURE 1-1: Timing Diagram for the C
hip Select (CS) pin on the MCP6283 and
MCP6285.
DS21811D-page 4 2004 Microchip Technology Inc.
MCP6281/2/3/4/5

2.0 TYPICAL PERFORMANCE CURVES

Note: The gr ap hs and tables provided following this note are a statistical summary based on a l im ite d n um ber of
samples and are prov ided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/2, V
= 10 kΩ to VDD/2 and CL = 60 pF.
R
L
OUT
≈ VDD/2,
14%
832 Samples
= V
V
CM
SS
0.0
0.4
0.8
1.2
-2.8
-2.4
-2.0
-1.6
-1.2
-0.8
-0.4
1.6
Percentage of Occurrences
12%
10%
8%
6%
4%
2%
0%
Input Offset Voltage (mV)

FIGURE 2-1: Input Offset Voltage.

25%
210 Samples
= +85°C
T
A
20%
15%
10%
5%
Percentage of Occurrences
0%
0 102030405060708090100
Input Bias Current (pA)
30%
832 Samples
= V
V
CM
25%
20%
15%
10%
5%
Percentage of Occurrences
2.0
2.4
2.8
0%
SS
TA = -40°C to +125°C
-10-8-6-4-2 0 2 4 6 810
Input Offset Voltage Drift (µV/°C)

FIGURE 2-4: Input Offset Voltage Drift.

35%
210 Samples
= +125°C
T
A
30% 25% 20% 15% 10%
5% 0%
Percentage of Occurrences
0
200
400
800
1200
1600
2000
2400
2800
3200
3600
Input Bias Current (pA)
FIGURE 2-2: Input Bias Cur rent at
=+85 °C.
T
A
300
VDD = 2.2V
250 200 150 100
50
0
-50
Input Offset Voltage (µV)
-100
-0.5 0.0 0.5 1.0 1.5 2.0 2.5
TA = +125°C
= +85°C
T
A
= +25°C
T
A
= -40°C
T
A
Common Mode Input Voltage (V)
FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage at V
= 2.2V.
DD
FIGURE 2-5: Input Bias Current at T
= +125 °C.
A
300
VDD = 5.5V
250 200 150 100
Input Offset Voltage (µV)
-50
-100
50
0
0.0
0.5
-0.5
1.0
1.5
TA = +125°C
= +85°C
T
A
= +25°C
T
A
= -40°C
T
A
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Common Mode Input Voltage (V)
FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage at V
= 5.5V.
DD
5.5
6.0
2004 Microchip Technology Inc. DS21811D-page 5
MCP6281/2/3/4/5
5
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/2, V
= 10 kΩ to VDD/2 and CL = 60 pF.
R
L
OUT
≈ VDD/2,
300 250 200 150 100
50
0
VDD = 2.2V
-50
Input Offset Voltage (µV)
-100
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VCM = V
SS
Representative Part
VDD = 5.5V
Output Voltage (V)

FIGURE 2-7: Input Offset Voltage vs. Output Voltage.

110
PSRR-
100
90
PSRR+ 80 70 60 50
CMRR, PSRR (dB)
40 30 20
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
1 10k 100k 1M10010 1k
CMRR
Frequency (Hz)
10,000
VCM = V
DD
VDD = 5.5V
1,000
Input Bias Current
100
(pA)
Input Bias, Offset Currents
Input Offset Current
10
1
25 35 45 55 65 75 85 95 105 115 125
Ambient Temperature (°C)

FIGURE 2-10: Input Bias, Input Offset Currents vs. Ambient Temperature.

120
110
100
90
80
PSRR, CMRR (dB)
70
60
-50-250 25507510012
Ambient Temperature (°C)
CMRR
PSRR V
CM
= V
SS

FIGURE 2-8: CMRR, PSRR vs. Frequency.

55 45 35 25 15
(pA)
5
-5 TA = +85°C
-15
V
Input Bias, Offset Currents
= 5.5V
DD
-25
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Bias Current
Input Offset Curre nt
Common Mode Input Voltage (V)
FIGURE 2-9: Input Bias, Offset Currents vs. Common Mode Input Voltage at T
=+85°C.
A

FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature.

2.5 TA = +125°C
= 5.5V
V
DD
2.0
1.5
1.0
0.5
(nA)
0.0
-0.5
Input Bias, Offset Currents
-1.0
0.00.51.01.52.02.53.03.54.04.55.05.5
Input Bias Current
Input Offset Current
Common Mode Input Voltage (V)

FIGURE 2-12: Input Bias, Offset Currents vs. Common Mode Input Voltage at TA= +125°C.

DS21811D-page 6 2004 Microchip Technology Inc.
MCP6281/2/3/4/5
5.5
Maximum Output Voltage
Gain Bandwidth Product
Gain Bandwidth Product
Phase Margin
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/2, V
= 10 kΩ to VDD/2 and CL = 60 pF.
R
L
OUT
≈ VDD/2,
600
500
400
300
200
(µA/amplifier)
Quiescent Current
100
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
TA = +125°C
= +85°C
T
A
= +25°C
T
A
= -40°C
T
A
Power Supply Voltage (V)

FIGURE 2-13: Quiescent Current vs. Power Supply Voltage.

120
100
80
60
40
20
Open-Loop Gain (dB)
0
-20
1.E-01
0.1
Phase
1.E+00
1.E+01
1 10 100 1k 10k 100k 1M 10M 100M
Gain
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
Frequency (Hz)
0
-30
-60
-90
-120
-150
-180
-210
1.E+07
1.E+08
Open-Loop Phase (°)
1000
100
10
1
Ouput Voltage Headroom (mV)
0.01 0.1 1 10
VOL - V
SS
VDD - V
OH
Output Current Magnitude (mA)

FIGURE 2-16: Output Voltage Headroom vs. Output Current Magnitude.

6
5
4
3
(MHz)
2
1
0
-50 -25 0 25 50 75 100 125
VDD = 2.2V
VDD = 5.5V
VDD = 2.2V
VDD = 5.5V
Ambient Temperature (°C)
90
85
80
75
70
65
60
Phase Margin (°)

FIGURE 2-14: Open-Loop Gain, Phase vs. Frequency.

10
VDD = 5.5V
)
P-P
VDD = 2.2V
1
Swing (V
0.1
1.E+03
1k 10k 100k 1M
1.E+04
1.E+05
1.E+06
10M
1.E+07
Frequency (Hz)

FIGURE 2-15: Maximum Output Voltage Swing vs. Frequency.

FIGURE 2-17: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature.

4.5
4.0
Falling Edge, VDD = 5.5V
3.5
3.0
2.5
2.0
1.5
Slew Rate (V/µs)
1.0
0.5
0.0
-50 -25 0 25 50 75 100 125
Falling Edge, VDD = 2.2V
Rising Edge, VDD = 2.2V
Rising Edge, VDD = 5.5V
Ambient Temperature (°C)

FIGURE 2-18: S lew Rate vs . Ambi en t Temperature.

2004 Microchip Technology Inc. DS21811D-page 7
MCP6281/2/3/4/5
Ouptut Short Circuit Current
Quiescent Current
Channel-to-Channel Separation
Quiescent Current
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/2, V
= 10 kΩ to VDD/2 and CL = 60 pF.
R
L
OUT
≈ VDD/2,
1,000
Hz)
100
(nV/
Input Noise Voltage Density
10
1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
0.1 10010 1k 100k10k 1M1
Frequency (Hz)

FIGURE 2-19: Input Noise Voltage Density vs. Frequency.

35
30
25
20
15
(mA)
10
5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
TA = +125°C T
= +85°C
A
T
= +25°C
A
= -40°C
T
A
Power Supply Voltage (V)
30
f = 1 kHz
= 5.0V
V
DD
25
20
15
(nV/¥Hz)
10
5
Input Noise Voltage Density
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Common Mode Input Voltage (V)

FIGURE 2-22: Input Noise Voltage Density vs. Common Mode Input Voltage at 1 kHz.

140
130
120
(dB)
110
100
1 10 100
Frequency (kHz)

FIGURE 2-20: Output Short Circuit Current vs. Power Supply Voltage.

500 450
Op-Amp turns on here
400 350 300 250 200 150
(µA/Amplifier)
CS swept high to low
100
50
VDD = 2.2V
0
0.00.20.40.60.81.01.21.41.61.82.02.2
Chip Select Voltage (V)
Op-Amp shuts off here
Hysteresis
CS swept low to high
FIGURE 2-21: Quiescent Current vs.
hip Select (CS) Voltage at VDD = 2.2V
C (MCP6283 and MCP6285 only).

FIGURE 2-23: Channel-to-Channel Separation vs. Frequency (MCP6282 and MCP6284 only).

1000
VDD = 5.5V
900 800 700 600 500 400
(µA/Amplifier)
300 200 100
0
0.00.51.01.52.02.53.03.54.04.55.05.5
CS swept
Op Amp toggles On/Off here
Hysteresis
CS swept low to high
high to low
Chip Select Voltage (V)
FIGURE 2-24: Quiescent Current vs. C
hip Select (CS) Voltage at VDD = 5.5V
(MCP6283 and MCP6285 only).
DS21811D-page 8 2004 Microchip Technology Inc.
MCP6281/2/3/4/5
Chip Select, Output Voltages
Chip Select, Output Voltages
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/2, V
= 10 kΩ to VDD/2 and CL = 60 pF.
R
L
OUT
≈ VDD/2,
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
Output Voltage (V)
1.0
0.5
0.0
0.E+00 2.E-06 4.E-06 6.E-06 8.E-06 1.E-05 1.E-05 1.E-05 2.E-05 2.E-05 2.E-05
G = +1V/V V
= 5.0V
DD
Time (2 µs/div )

FIGURE 2-25: Large-Signal, Non-inverting Pulse Response.

G = +1V/V
Output Voltage (10 mV/div)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
Output Voltage (V)
1.0
0.5
0.0
0.E+00 2.E-06 4.E-06 6.E-06 8.E-06 1.E-05 1.E-05 1.E-05 2.E-05 2.E-05 2.E-05
G = -1V/V V
= 5.0V
DD
Time (2 µs/div)

FIGURE 2-28: Large-Signal, Inverting Pulse Response.

G = -1V/V
Output Voltage (10 mV/div)
Time (500 ns/div)

FIGURE 2-26: Sm all- Si gna l, Non-inverting Pulse Response.

2.5
2.0
1.5
(V)
1.0
0.5
0.0
0.0E+00 5.0 E-06 1. 0E-05 1. 5E-05 2. 0E-05 2 .5E-05 3.0E-05 3. 5E-05 4. 0E-05 4.5E -05 5 .0E-05
CS Voltage
V
OUT
Output High-Z
Time (5 µs/div)
FIGURE 2-27: C
hip Select (CS) to
Amplifier Output Response Time at V
VDD = 2.2V
G = +1V/V
V
= V
IN
Output On
= 2.2V
DD
SS
(MCP6283 and MCP6285 only).
Time (500 ns/div)

FIGURE 2-29: Sm al l- S ignal, Inverting Pulse Response.

6.0
5.5
5.0
4.5
4.0
3.5
3.0
(V)
2.5
2.0
1.5
1.0
0.5
0.0
0.E+00 5 .E-06 1 .E-05 2.E-05 2.E-05 3.E-05 3.E-05 4.E-05 4.E-05 5.E-05 5. E-05
CS Voltage
V
OUT
Time (5 µs/div)
FIGURE 2-30: C
hip Select (CS) to
Amplifier Output Response Time at V
VDD = 5.5V G = +1V/V V
= V
IN
Output OnOutput High-Z
= 5.5V
DD
SS
(MCP6283 and MCP6285 only).
2004 Microchip Technology Inc. DS21811D-page 9
MCP6281/2/3/4/5

3.0 PIN DESCRIPTIONS

Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps).

TABLE 3-1: PIN FUNCTION TABLE FOR SINGLE OP AMPS

MCP6281
(PDIP , SOIC,
MSOP)
MCP6281
(SOT-23-5)
MCP6271R
(SOT-23-5)
611 6 1V 244 2 4V 333 3 3V 752 7 6V 425 4 2V
——— 8 5CSChip Select
1,5,8 — — 1,5 — NC No Internal Connection

TABLE 3-2: PIN FUNCTION TABLE FOR DUAL AND QUAD OP AMPS

MCP6282 MCP6284 MCP6285 Symbol Description
MCP6283
(PDIP , SOIC,
MSOP)
MCP6283
(SOT-23-6)
Symbol Description
Analog Outp ut
OUT
– Inverting Input
IN
+ Non-inverting Input
IN
Positive Power Supply
DD
Negative Power Supply
SS
11—V 222V 333V 848 V 55—V 666V
777V —8—V —9—V —10— V
4114 V —12— V —13— V —14—V —— 1V
OUTA
– Inverting Input (op amp A)
INA
+ Non-inverting Input (op amp A)
INA
DD
+ Non-inverting Input (op amp B)
INB
– Inverting Input (op amp B)
INB OUTB OUTC
– Inverting Input (op amp C)
INC
+ Non-inverting Input (op amp C)
INC
SS
+ Non-inverting Input (op amp D)
IND
– Inverting Input (op amp D)
IND OUTD
OUTA/VINB
+ Analog Output (op amp A)/Non-inverting Input (op amp B)
—— 5 CS

3.1 Analog Outputs

The output pins are low-impedance voltage sources.

3.2 Analog Inputs

The non-inverting and inverting inputs are high­impedance CMOS inputs with low bias currents.
3.3 MCP6285’s V
OUTA/VINB
For the MCP6285 only, the output of op amp A is connected directly to the non-inverting input of op amp B; this is the V
OUTA/VINB
makes it possible to provide a Chip Select in 8-pin packages.
+ Pin
+ pin. This connection
pin for duals
Analog Output (op amp A)
Positive Power Supply
Analog Output (op amp B) Analog Output (op amp C)
Negative Power Supply
Analog Output (op amp D)
Chip Select

3.4 CS Digital Input

This is a CMOS, Schmitt-triggered input that places the part into a low-power mode of operation.

3.5 Power Supply (VSS and VDD)

The positive powe r s upp ly (VDD) is 2.2V to 5.5V h igh er than the negative power supply (V operation, the other pins are between V
Typically, these parts are used in a single (positive) supply configuration. In this case, V ground and V need a local bypass capacitor (typically 0.01 µF to
0.1 µF) within 2 mm of the V to use a bulk capacitor (within 100 mm), which can be shared with nearby analog parts.
DD
). For normal
SS
and VDD.
SS
is connected to
SS
is connected to the supply. VDD will
pin. These parts need
DD
DS21811D-page 10 2004 Microchip Technology Inc.
Loading...
+ 22 hidden pages
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use