MCP616/7/8/9
2.3V to 5.5V Micropower Bi-CMOS Op Amps
Features
• Low Input Offset Voltage: ±150µV (max.)
• Low Noise: 2.2 µV
(typ., 0.1 Hz to 10 Hz)
P-P
• Rail-to-Rail Output
• Low Input Offset Current: 0.3 nA (typ.)
• Low Quiescent Current: 25 µA (max.)
• Power Sup ply Voltage: 2.3V to 5.5V
• Unity Gain Stable
• Chip Select
(CS) Capability: MCP618
• Industrial Temperature Range: -40°C to +85°C
• No Phase Reversal
• Available in Single, Dual and Quad Packages
Typical Applications
• Battery Power Instruments
• Weight Scales
• Strain Gauges
• Medical Instruments
• Test Equipment
Available Tools
• SPICE Macro Models (at www .m ic rochi p.c om )
•FilterLab® Software (at www.microchip.com)
Input Offset Volt age
14%
598 Samples
Percentage of Occurrences
12%
10%
8%
6%
4%
2%
0%
V
-100
= 5.5V
DD
-80
-60
-40
Input Offset Voltage (µV)
0
20
40
60
-20
80
100
Description
The MCP616/7/8/9 family of operational amplifiers (op
amps) from Microchip Technology Inc. are capable of
precision, low-power, single-supply operation. These
op amps are unity-gain stable, have low input offset
voltage (±150 µV, max.), rail-to-rail output swing and
low input offset current (0.3 nA, typ.). These features
make this family of op amps well suited for batterypowered applications.
The single MCP616, the single MCP618 with Chip
Select (CS) and the dual MCP617 are all available in
standard 8-lead PD IP, SOIC and MSOP pac kages. The
quad MCP619 is offered in standard 14-lead PDIP,
SOIC and TSSOP packages. All devices are fully
specified from -40°C to +85°C, with power supplies
from 2.3V to 5.5V.
Package Types
MCP616
PDIP, SOIC, MSOP
NC
VIN–
VIN+
V
SS
1
2
3
4
8
7
6
5
MCP618
PDIP, SOIC, MSOP
NC
VIN–
VIN+
V
SS
1
2
3
4
8
7
6
5
NC
V
V
NC
CS
V
V
NC
DD
OUT
DD
OUT
V
V
V
V
OUTA
V
V
V
V
V
OUTB
MCP617
PDIP, SOIC, MSOP
OUTA
INA
INA
V
SS
1
2
–
3
+
4
8
7
6
5
MCP619
PDIP, SOIC, TSSOP
INA
INA
V
INB
INB
DD
1
2
–
3
+
4
5
+
6
–
7
14
13
12
11
10
9
8
V
V
V
V
V
V
V
V
V
V
V
DD
OUTB
INB
INB
OUTD
IND
IND
SS
INC
INC
OUTC
–
+
–
+
+
–
© 2005 Microchip Technology Inc. DS21613B-page 1
MCP616/7/8/9
1.0 ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
Absolute Maximum Ratings †
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
VDD–VSS .......................................................................7.0V
All Inputs and Outputs ................... V
Difference Input Voltage ......................................|V
– 0.3V to VDD+0.3V
SS
DD–VSS
|
periods may affect device reliability.
Output Short Circuit Current .................................Continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
Maximum Junction Temperature (T
) .........................+150°C
J
ESD protection on all pins (HBM;MM) ...................4 kV; 200V
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, V DD= +2.3V to +5.5V, VSS=GND, TA= 25°C, VCM=VDD/2, V
and R
= 100 kΩ to VDD/2.
L
Parameters Sym Min Typ Max Units Conditions
Input Offset
Input Offset Voltage V
Input Offset Drift with Temperature ΔV
OS
/Δ T
OS
Power Supply Rejection PSRR 86 105 — dB
Input Bias Current and Impeda nc e
Input Bias Current I
At Temperat ure I
At Temperature I
Input Offset Current I
Common Mode Input Impedance Z
Differential Input Impedance Z
B
B
B
OS
CM
DIFF
Common Mode
Common Mode Input Voltage Range V
CMR
Common Mode Rejection Ratio CMRR 80 100 — dB V
Open-Loop Gain
DC Open-Loop Gain (large signal) A
DC Open-Loop Gain (large signal) A
OL
OL
Output
Maximum Output Voltage Swing V
Linear Output Voltage Range V
Output Short Circuit Current I
, V
OL
V
, V
OL
OUT
V
OUT
SC
I
SC
Power Supply
Supply Voltage V
Quiescent Current per Amplifier I
DD
Q
–150 — +150 µV
— ±2.5 — µV/°C TA = -40°C to +85°C
A
-35 -15 -5 nA
-70 -21 — nA TA = -40°C
—- 1 2— n A T
= +85°C
A
— ±0.15 — nA
— 600||4 — MΩ ||pF
—3 | | 2—MΩ||pF
V
SS
VDD–0.9 V
= 5.0V,
DD
= 0.0V to 4.1V
V
CM
100 120 — dB RL = 25 kΩ to VDD/2,
= 0.05V to VDD– 0.05V
V
OUT
95 115 — dB RL = 5 kΩ to VDD/2,
= 0.1V to VDD–0.1V
V
OUT
OHVSS
OHVSS
+15 — VDD–20 mV RL = 25 kΩ to VDD/2,
0.5V output overdrive
+45 — VDD–60 mV RL = 5 kΩ to VDD/2,
0.5V output overdrive
VSS+50 — VDD–50 mV RL = 25 kΩ to VDD/2,
A
≥ 100 dB
OL
VSS+ 100 — VDD– 100 mV RL = 5 kΩ to VDD/2,
≥ 95 dB
A
—± 7—m A V
OL
DD
= 2.3V
—± 1 7— m A VDD = 5.5V
2.3 — 5.5 V
12 19 25 µA IO = 0
OUT
≈ VDD/2
DS21613B-page 2 © 2005 Microchip Technology Inc.
MCP616/7/8/9
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, V DD= +2.3V to +5.5V, VSS= GND, TA= 25°C, VCM=VDD/2, V
= 100 kΩ to VDD/2 and CL=60pF.
R
L
Parameters Sym Min Typ Max Units Conditions
AC Response
Gain Bandwidth Product GBWP — 190 — kHz
Phase Margin PM — 57 — ° G = +1
Slew Rate SR — 0.08 — V/µs
Noise
Input Noise Voltage E
Input Noise Voltage Density e
Input Noise Current Density i
ni
ni
ni
—2 . 2— µ V
—3 2—n V /√Hz f = 1 kHz
—7 0— f A /√Hz f = 1 kHz
MCP618 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, V
= 100 kΩ to VDD/2 and CL=60pF.
R
L
Parameters Sym Min Typ Max Units Conditions
CS Low Specifications
CS
Logic Threshold, Low V
CS
Input Current, Low I
CS High Specifications
CS
Logic Threshold, High V
CS
Input Current, High I
GND Current I
Amplifier Output Leakage I
CS Dynamic Specifications
CS
Low to Amplifier Output Turn-on Time t
CS High to Amplifier Output High-Z t
CS Hysteresis V
IL
CSL
IH
CSH
SS
O(LEAK)
ON
OFF
HYST
= +2.3V to +5.5V, VSS=GND, TA= 25°C, VCM=VDD/2, V
DD
V
—0 . 2 VDDV
SS
–1.0 0.01 — µA CS = V
0.8 V
—VDDV
DD
—0 . 0 12 µ AC S = V
-2 -0.05 — µA CS = V
—1 0—n AC S = V
— 9 100 µs CS = 0.2VDD to V
G = +1 V/V, R
—0 . 1— µ sC S = 0.8VDD to V
G = +1 V/V, R
—0 . 6— VVDD = 5.0V
f = 0.1 Hz to 10 Hz
P-P
SS
DD
DD
DD
= 0.9(VDD/2),
OUT
= 1 kΩ to V
L
= 0.1(VDD/2),
OUT
= 1 kΩ to V
L
OUT
OUT
SS
SS
≈ V DD/2,
≈ V DD/2,
V
t
IL
ON
-19 µA (typ.)
CS
V
High-Z High-Z
OUT
-50 nA (typ.) -50 n A (typ.)
I
SS
I
10 nA (typ.) 10 nA (typ.)
CS
V
IH
t
OFF
FIGURE 1-1: Timing Diagram for the CS
Pin on the MCP618.
© 2005 Microchip Technology Inc. DS21613B-page 3
MCP616/7/8/9
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, V DD= +2.3V to +5.5V and VSS= GND.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range T
Operating Temperature Range T
Storage Temperature Range T
Thermal Package Resistances
Thermal Resistance, 8L-PDIP θ
Thermal Resistance, 8L-SOIC θ
Thermal Resistance, 8L-MSOP θ
Thermal Resistance, 14L-PDIP θ
Thermal Resistance, 14L-SOIC θ
Thermal Resistance, 14L-TSSOP θ
Note 1: The MCP616/7/8/9 operate over this extended temperature range, but with reduced performance. In any case, the
Junction Temperature (T
) must not exceed the Absolute Maximum specification of +150°C.
J
-40 — +85 °C
A
-40 — +125 °C Note 1
A
-65 — +150 °C
A
—8 5 — ° C / W
JA
— 163 — °C/W
JA
— 206 — °C/W
JA
—7 0 — ° C / W
JA
— 120 — °C/W
JA
— 100 — °C/W
JA
DS21613B-page 4 © 2005 Microchip Technology Inc.
MCP616/7/8/9
2.0 TYPICAL PERFORMANCE CURVES
Note: The graphs and tables p r ov ide d f oll ow in g th is no te a r e a s t ati sti ca l s um ma r y bas ed on a l im ite d n um ber of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD= +2.3V to +5.5V, VSS= GND, TA=25°C, VCM=VDD/2, V
=100kΩ to V DD/2 and CL=60pF.
R
L
14%
598 Samples
12%
10%
Percentage of Occurrences
8%
6%
4%
2%
0%
V
-100
= 5.5V
DD
-80
-60
-40
Input Offset Voltage (µV)
-20
0
20
40
60
80
FIGURE 2-1: Input Offset Voltage at
V
=5.5V.
DD
16%
598 Samples
14%
12%
10%
Percentage of Occurrences
8%
6%
4%
2%
0%
V
-100
= 2.3V
DD
-80
-60
0
-40
-20
Offset Voltage (µV)
20
40
60
100
80
100
20%
598 Samples
18%
16%
14%
12%
10%
Percentage of Occurrences
8%
6%
4%
2%
0%
V
DD
T
A
-10
= 5.5V
= -40°C to +85°C
-8
-6
-4
-2
Input Offset Voltage Drift (µV/°C)
FIGURE 2-4: Input Offset Voltage Drift at
V
=5.5V.
DD
18%
598 Samples
16%
14%
12%
10%
Percentage of Occurrences
8%
6%
4%
2%
0%
V
DD
T
A
-10
= 2.3V
= -40°C to +85°C
-8
-6
-4
Input Offset Voltage Drift (µV/°C)
0
-2
0
OUT
2
2
≈ V DD/2,
4
6
4
6
8
10
8
10
FIGURE 2-2: Input Offset Voltage at
=2.3V.
V
DD
16%
600 Samples
14%
12%
10%
Percentage of Occurrences
8%
6%
4%
2%
0%
V
DD
-22
= 5.5V
-21
-20
-19
-18
Input Bias Current (nA)
-17
-16
-15
-14
-13
-12
FIGURE 2-3: Input Bias Current at
=5.5V.
V
DD
-11
-10
FIGURE 2-5: Input Offset Voltage Drift at
=2.3V.
V
DD
20%
600 Samples
18%
16%
14%
12%
10%
Percentage of Occurrences
8%
6%
4%
2%
0%
V
-0.7
= 5.5V
DD
-0.6
-0.5
-0.4
-0.3
-0.2
Input Offset Current (nA)
-0.1
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
FIGURE 2-6: Input Offset Current at
=5.5V.
V
DD
© 2005 Microchip Technology Inc. DS21613B-page 5
MCP616/7/8/9
Note: Unless otherwise indicated, V DD= +2.3V to +5.5V, VSS= GND, TA=25°C, VCM=VDD/2, V
=100kΩ to V DD/2 and CL=60pF.
R
L
150
Representative Part
100
50
0
-50
-100
Input Offset Voltage (µV)
-150
-50 -25 0 25 50 75 100
VDD = 5.5V
VDD = 2.3V
Ambient Temperature (°C)
FIGURE 2-7: Input Offset Voltage vs.
Ambient Temperature.
24
22
20
VDD = 5.5V
18
16
14
12
10
8
(µA/Amplifier)
6
Quiescent Current
4
2
0
- 5 0- 2 50 2 55 07 51 0
VDD = 2.3V
Ambient Temperature (°C)
FIGURE 2-10: Input Bias, Offset Currents
vs. Ambient Temperature.
0
-5
I
-10
-15
-20
Input Bias Current (nA)
-25
-50 -25 0 25 50 75 100
120
115
110
105
100
95
90
CMRR, PSRR (dB)
85
80
- 5 0- 2 50 2 55 07 51 0 0
Ambient Temperature (°C)
Ambient Temperature (°C)
OS
I
B
PSRR
CMRR
≈ VDD/2,
OUT
VDD = 5.5V
1.0
0.8
0.6
0.4
0.2
0.0
Input Offset Current (nA)
FIGURE 2-8: Quiescent Current vs.
Ambient Temperature.
40
RL = 5 k
35
30
25
20
(mV)
15
10
5
Output Voltage Headroom
0
- 5 0- 2 50 2 55 07 51 0
Ω
VDD = 5.5V
VDD = 2.3V
Ambient Temperature (°C)
VDD – V
VOL – V
OH
SS
FIGURE 2-9: Maximum Output Voltage
Swing vs. Ambient Temperature at R
=5kΩ.
L
FIGURE 2-11: CMRR, PSRR vs. Ambient
Temperature.
9
RL = 25 kΩ
8
7
VDD = 5.5V
6
5
4
(mV)
3
2
1
VDD = 2.3V
Output Voltage Headroom
0
-50 -25 0 25 50 75 10
Ambient Temperature (°C)
VDD – V
VOL – V
OH
SS
FIGURE 2-12: Maximum Output Voltage
Swing vs. Ambient Temperature at RL=25kΩ.
DS21613B-page 6 © 2005 Microchip Technology Inc.
MCP616/7/8/9
Note: Unless otherwise indicated, V DD= +2.3V to +5.5V, VSS= GND, TA=25°C, VCM=VDD/2, V
=100kΩ to V DD/2 and CL=60pF.
R
L
25
I
20
15
(mA)
10
| I
|
SC–
5
Output Short Circuit Current
0
- 5 0- 2 50 2 55 07 51 0
SC+
Ambient Temperature (°C)
VDD = 5.5V
VDD = 2.3V
FIGURE 2-13: Output Short Circuit Current
vs. Ambie nt Temperature.
0.10
0.09
Low-to-High Transition
0.08
0.07
0.06
0.05
0.04
0.03
Slew Rate (V/µs)
0.02
0.01
VDD = 5.0V
0.00
-50 -25 0 25 50 75 10
High-to-Low Transition
Ambient Temperature (°C)
FIGURE 2-16: Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
200
180
GBWP
160
140
120
100
(kHz)
80
60
40
Gain Bandwidth Product
20
0
-50 -25 0 25 50 75 100
Ambient Temperature (°C)
100
VDD = 5.5V
80
60
40
20
Input Offset Voltage (µV)
0
-20
-40
-60
-80
-100
-0.5
TA = +85°C
T
= +25°C
A
T
= -40°C
A
0.0
0.5
1.0
1.5
2.0
Common Mode Input Voltage (V)
2.5
OUT
3.0
≈ V DD/2,
PM
3.5
4.0
4.5
100
90
80
70
60
50
40
30
20
10
0
5.0
Phase Margin (°)
5.5
FIGURE 2-14: Slew Rate vs. Ambient
Temperature.
Input Bias Current (nA)
30
25
20
15
10
TA = +85°C
5
T
= +25°C
0
A
T
= -40°C
-5
A
-10
-15
-20
-25
-30
0.0
0.5
1.0
1.5
Common Mode Input Voltage (V)
2.0
2.5
3.0
I
VDD = 5.5V
3.5
4.0
4.5
5.0
0.30
0.25
0.20
0.15
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
5.5
Input Offset Current (nA)
FIGURE 2-15: Input Bias, Offset Currents
vs. Common Mode Input Voltage.
FIGURE 2-17: Input Offset Voltage vs.
Common Mode Input Voltage.
50
RL = 25 k
40
30
20
10
0
-10
-20
-30
Input Offset Voltage (µV)
-40
-50
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.
Ω
VDD = 5.5V
VDD = 2.3V
Output Voltage (V)
FIGURE 2-18: Input Offset Voltage vs.
Output Voltage.
© 2005 Microchip Technology Inc. DS21613B-page 7
MCP616/7/8/9
Note: Unless otherwise indicated, V DD= +2.3V to +5.5V, VSS= GND, TA=25°C, VCM=VDD/2, V
=100kΩ to V DD/2 and CL=60pF.
R
L
25
20
15
10
(µA/Amplifier)
Quiescent Current
5
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.
TA = +85°C
T
= +25°C
A
T
= -40°C
A
Power Supply Voltage (V)
FIGURE 2-19: Quiescent Current vs.
Power Supply Voltage.
130
125
120
115
110
105
100
95
DC Open-Loop Gain (dB)
90
100 1k 10k 100
0.1 1 10 100
Load Resistance (
VDD = 5.5V
VDD = 2.3V
Ω)
FIGURE 2-22: Output Voltage Headroom
vs. Output Current Magnitude.
1,000
100
10
Output Voltage Headroom (mV)
1
10µ 100µ 1m 10m
0.01 0.1 1 10
125
RL = 25 kΩ
120
115
110
DC Open-Loop Gain (dB)
105
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.
VDD – V
OH
Output Current Magnitude (A)
Power Supply Voltage (V)
≈ VDD/2,
OUT
VDD = 2.3V
VDD = 5.5V
VOL – V
SS
FIGURE 2-20: DC Open-Loop Gain vs.
Load Resistance.
200
180
160
140
120
100
(kHz)
80
60
40
20
0
1k 10k 100k 1M
1 10 100 1,000
Load Resistance (
GBWP
PM
Ω)
100
90
80
70
60
50
40
30
20
10
0
FIGURE 2-21: Gain-Bandwidth Product,
Phase Margin vs. Load Resistance.
Phase Margin (°)
FIGURE 2-23: DC Open-Loop Gain vs.
Power Supply Voltage.
140
130
120
110
100
90
Seperation (dB)
Channel-to-Channel
80
70
100 100k 10k 1k
1.E+02 1.E+03 1.E+04 1.E+0
Frequency (Hz)
Referred to Input
FIGURE 2-24: Channel-to-Channel
Separation vs. Frequency (MCP617 and
MCP619 only).
DS21613B-page 8 © 2005 Microchip Technology Inc.
MCP616/7/8/9
Note: Unless otherwise indicated, VDD= +2.3V to +5.5V, VSS= GND, TA=25°C, VCM=VDD/2, V
=100kΩ to V DD/2 and CL=60pF.
R
L
140
120
100
80
60
40
20
Open-Loop Gain (dB)
0
-20
0.01 0.1 1 10 100 1k 10k 100k 1M
1.E-021.E-011.E+001.E+011.E+021.E+031.E+041.E+051.E+
Gain
Phase
FIGURE 2-25: Open-Loop Gain, Phase vs.
Frequency.
10,000
Hz)
1,000
i
ni
100
Density (nV/
Input Noise Voltage
e
ni
06Frequency (Hz)
10,000
1,000
100
0
-30
-60
-90
-120
-150
-180
Open-Loop Phase (°)
-210
-240
Hz)
Density (fA/
Input Noise Current
FIGURE 2-28: CMRR, PSRR vs.
Frequency.
OUT
≈ VDD/2,
10
0.1 10 1 100 10k 1k
1.E-011.E+001.E+011.E+021.E+031.E+0
Frequency (Hz)
10
4
FIGURE 2-26: Input Noise Voltage, Current
Densities vs. Frequency.
Gain = +1
Output Voltage (20 mV/div)
Time (50 µs/div)
FIGURE 2-27: Small-Signal, Non-Inverting
Pulse Response.
FIGURE 2-29: Maximum Output Voltage
Swing vs. Frequency.
FIGURE 2-30: Small-Signal, Inverting
Pulse Response.
© 2005 Microchip Technology Inc. DS21613B-page 9