MICROCHIP MCP3302, MCP3304 Technical data

M

13-Bit Differential Input, Low Power A/D Converter

MCP3302/04

with SPI™ Serial Interface

Features

• Full Differential Inputs

• MCP3302: 2 Differential or 4 Single ended Inputs

• MCP3304: 4 Differential or 8 Single ended Inputs

• ±1 LSB max DNL

• ±1 LSB max INL (MCP3302/04-B)

• ±2 LSB max INL (MCP3302/04-C)

• Single supply operation: 2.7V to 5.5V

• 100 ksps sampling rate with 5V supply voltage

• 50 ksps sampling rate with 2.7V supply voltage

• 50 nA typical standby current, 1 µA max

•450µA max active current at 5V

• Industrial temp range: -40°C to +85°C

• 14 and 16-pin PDIP, SOIC and TSSOP packages

TM

• MXDEV

Evaluation kit available

Applications

• Remote Sensors

• Battery Operated Systems

• Transducer Interface

Package Types

PDIP, SOIC, TSSOP

14

CH0 CH1 CH2 CH3

NC NC

DGND

1 2 3 4 5

6 7

V 13 12 11 10

DD

V

REF

AGND

CLK

D

OUT

D

9

IN

8

CS

/SHDN

MCP3302

General Description

The Microchip Technology Inc. MCP3302/04 13-bit A/D converters feature full differential inputs and low power consumption in a small package that is ideal for battery powered systems and remote data acquisition applications. The MCP3302 is programmable to provide two differential input pairs or four single ended inputs. The MCP3304 is programmable and provides four differential input pairs or eight single ended inputs.

Incorporating a successive approximation architecture with on-board sample and hold circuitry, these 13-bit A/D converters are specified to have ±1 LSB Differential Nonlinearity (DNL); ±1 LSB Integral Nonlinearity (INL) for B-grade and ±2 LSB for C-grade devices. The industry-standard SPI™ serial interface enables 13-bit A/D converter capability to be added to any PICmicro microcontroller.

The MCP3302/04 devices feature low current design that permits operation with typical standby and active

currents of only 50 nA and 300 µA, respectively. The

devices operate over a broad voltage range of 2.7V to

5.5V and are capable of conversion rates of up to 100 ksps. The reference voltage can be varied from 400 mV to 5V, yielding input-referred resolution

between 98 µV and 1.22 mV.

The MCP3302 is available in 14-pin PDIP, 150 mil SOIC and TSSOP packages. The MCP3304 is available in 16-pin PDIP and 150 mil SOIC packages. The full differential inputs of these devices enable a wide variety of signals to be used in applications such as remote data acquisition, portable instrumentation and battery operated applications.

®

PDIP, SOIC

16

15

MCP3304

14 13 12

11 10

9

V

DD

V

REF

AGND

CLK

D

OUT

D

IN

CS/SHDN

DGND

1

CH0 CH1

2

CH2

3 4

CH3 CH4

5

CH5

6

CH6

7

CH7

8

 2002 Microchip Technology Inc. DS21697B-page 1

MCP3302/04

Functional Block Diagram

V

REF

CH0 CH1

CH7

Input

Channel

Mux

*

Sample

& Hold

Circuits

CDAC

Comparator

-

+

AGND

V

DD

13-Bit SAR

DGND

Control Logic

CS/SHDN

CLK

D

IN

Shift

Register

D

OUT

* Channels 5-7 available on MCP3304 Only

DS21697B-page 2  2002 Microchip Technology Inc.

MCP3302/04

1.0 ELECTRICAL CHARACTERISTICS

Maximum Ratings*

VDD........................................................................ 7.0V

All inputs and outputs w.r.t. V

Storage temperature .......................... -65°C to +150°C

Ambient temp. with power applied ..... -65°C to +125°C

Maximum Junction Temperature ....................... 150°C

ESD protection on all pins (HBM)......................... > 4kV

*Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

.....-0.3V to VDD +0.3V

SS

PIN FUNCTION TABLE

Name Function

CH0-CH7 Analog Inputs

DGND Digital Ground

/SHDN Chip Select / Shutdown Input

CS

D

IN

D

OUT

CLK Serial Clock

AGND Analog Ground

V

REF

V

DD

Serial Data In

Serial Data Out

Reference Voltage Input

+2.7V to 5.5V Power Supply

ELECTRICAL SPECIFICATIONS

Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, and V

input configuration (Figure 3-4) with fixed common mode voltage of 2.5V. All parameters apply over temperature with T

= -40°C to +85°C (Note 7). Conversion speed (F

AMB

Parameter Symbol Min Typ Max Units Conditions

Conversion Rate

Maximum Sampling Frequency F

Conversion Time T

Acquisition Time T

DC Accuracy

Resolution 12 data bits + sign bits

Integral Nonlinearity INL —

Differential Nonlinearity DNL — ±0.5 ±1 LSB Monotonic over temperature

Positive Gain Error -3 -0.75 +2 LSB

Negative Gain Error -3 -0.5 +2 LSB

Offset Error -3 +3 +6 LSB

Note 1: This specification is established by characterization and not 100% tested.

2: See characterization graphs that relate converter performance to V 3: V

= 0.1V to 4.9V @ 1 kHz.

IN

4: V

=5V

DD

5: Maximum clock frequency specification must be met. 6: V

REF

7: TSSOP devices are only specified at 25°C and +85°C. 8: For slow sample rates, see Section 6.2.1 for limitations on clock frequency.

±500 mV @ 1 kHz, see test circuit Figure 3-3.

P-P

= 400 mV, VIN = 0.1V to 4.9V @ 1 kHz

SAMPLE

CONV

ACQ

) is 100 ksps with F

SAMPLE

—— 100kspsNote 8

— — 50 ksps V

13 CLK

1.5 CLK

±0.5

—

±1

±1 ±2

REF

CLK

level.

= 21*F

periods

LSB LSB

SAMPL E

DD

MCP3302/04-B MCP3302/04-C

= 5V. Full differential

REF

= V

= 2.7V, VCM =1.35V

REF

 2002 Microchip Technology Inc. DS21697B-page 3

MCP3302/04

ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, and V

= 5V. Full differential

REF

input configuration (Figure 3-4) with fixed common mode voltage of 2.5V. All parameters apply over temperature with T

= -40°C to +85°C (Note 7). Conversion speed (F

AMB

) is 100 ksps with F

SAMPLE

CLK

= 21*F

SAMPL E

Parameter Symbol Min Typ Max Units Conditions

Dynamic Performance

Total Harmonic Distortion THD — -91 — dB Note 3

Signal to Noise and Distortion SINAD — 78 — dB Note 3

Spurious Free Dynamic Range SFDR — 92 — dB Note 3

Common Mode Rejection CMRR — 79 — dB Note 6

Channel to Channel C rosstalk CT — > -110 — dB Note 6

Power Supply Rejection PSR — 74 — dB Note 4

Reference Input

Voltage Range 0.4 — V

Current Drain —

—

100

0.001

VNote 2

DD

150

3

µA µACS

= VDD = 5V

Analog Inputs

Full Scale Input Span CH0 - CH7 -V

REF

—V

Absolute Input Voltage CH0 - CH7 -0.3 — V

REF

+ 0.3 V

DD

V

Leakage Current — 0.001 ±1 µA

Switch Resistance R

Sample Capacitor C

SAMPLE

S

—1 — kΩ See Figure 6-3

— 25 — pF See Figure 6-3

Digital Input/Output

Data Coding Format Binary Two’s Complement

High Level Input Voltage V

Low Level Input Voltage V

High Level Output Voltage V

Low Level Output Voltage V

Input Leakage Current I

Output Leakage Current I

Pin Capacitance CIN, C

LO

IH

OH

OL

LI

IL

OUT

0.7 V

——0.3 VDDV

4.1 — — V IOH = -1 mA, VDD = 4.5V

—— 0.4 VIOL = 1 mA, VDD = 4.5V

-10 — 10 µAV

—— 10 pFT

—— V

DD

= VSS or V

IN

= VSS or V

OUT

= 25°C, F = 1 MHz, Note 1

AMB

DD

Note 1: This specification is established by characterization and not 100% tested.

2: See characterization graphs that relate converter performance to V 3: V

= 0.1V to 4.9V @ 1 kHz.

IN

4: V

=5V

DD

5: Maximum clock frequency specification must be met. 6: V

REF

7: TSSOP devices are only specified at 25°C and +85°C.

±500 mV @ 1 kHz, see test circuit Figure 3-3.

P-P

= 400 mV, VIN = 0.1V to 4.9V @ 1 kHz

REF

level.

8: For slow sample rates, see Section 6.2.1 for limitations on clock frequency.

DS21697B-page 4  2002 Microchip Technology Inc.

ELECTRICAL SPECIFICATIONS (CONTINUED)

MCP3302/04

Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, and V

= 5V. Full differential

REF

input configuration (Figure 3-4) with fixed common mode voltage of 2.5V. All parameters apply over temperature with T

= -40°C to +85°C (Note 7). Conversion speed (F

AMB

) is 100 ksps with F

SAMPLE

CLK

= 21*F

SAMPL E

Parameter Symbol Min Typ Max Units Conditions

Timing Specifications:

Clock Frequency (Note 8) F

Clock High Time T

Clock Low Time T

Fall To First Rising CLK Edge T

CS

Data In Setup time T

Data In Hold Time T

CLK Fall To Output Data Valid T

CLK Fall To Output Enable T

Rise To Output Disable T

CS

CLK

HI

LO

SUCS

SU

HD

DO

EN

DIS

0.105

0.105——

210 — — ns Note 5

100 — — ns

50 — — ns

—— 50 ns

—— 125

— — 100 ns See test circuits, Figure 3-1

2.1

1.05

200

MHz MHz

VDD = 5V, F V

= 2.7V, F

DD

SAMPLE

= 100 ksps

nsnsVDD = 5V, see Figure 3-1

V

= 2.7V, see Figure 3-1

DD

nsnsVDD = 5V, see Figure 3-1

V

= 2.7V, see Figure 3-1

DD

Note 1

Disable Time T

CS

Rise Time T

D

OUT

CSH

R

475 — — ns

— — 100 ns See test circuits, Figure 3-1

Note 1

Fall Time T

D

OUT

F

— — 100 ns See test circuits, Figure 3-1

Note 1

Power Requirements:

Operating Voltage V

Operating Current I

Standby Current I

DD

DDS

2.7 — 5.5 V

— —

300 200

450

—

µAV

DD

V

DD

—0.05 1 µACS = V

, V , V

= 5V, D

REF

= 2.7V, D

REF

= 5.0V

DD

OUT

Temperature Ranges:

Specified Temperature Range T

Operating Temperature Range T

Storage Temperature Range T

A

-40 — +85 °C

-65 — +150 °C

Thermal Package Resistance: Thermal Resistance, 14L-PDIP θ Thermal Resistance, 14L-SOIC θ Thermal Resistance, 14L-TSSOP θ Thermal Resistance, 16L-PDIP θ Thermal Resistance, 16L-SOIC θ

JA

—70 — °C/W

—108 — °C/W

—100 — °C/W

—70 — °C/W

—90 — °C/W

Note 1: This specification is established by characterization and not 100% tested.

2: See characterization graphs that relate converter performance to V 3: V

= 0.1V to 4.9V @ 1 kHz.

IN

4: V

=5V

DD

5: Maximum clock frequency specification must be met. 6: V

REF

±500 mV @ 1 kHz, see test circuit Figure 3-3.

P-P

= 400 mV, VIN = 0.1V to 4.9V @ 1 kHz

REF

level.

7: TSSOP devices are only specified at 25°C and +85°C. 8: For slow sample rates, see Section 6.2.1 for limitations on clock frequency.

= 50 ksps

unloaded

 2002 Microchip Technology Inc. DS21697B-page 5

MCP3302/04

.

T

CSH

CS

T

SUCS

CLK

T

D

IN

D

OUT

SU

MSB IN

HD

FIGURE 1-1: Timing Parameters

T

LO

HI

T

Null Bit

DO

Sign BIT

T

EN

T

R

T

F

T

DIS

LSB

DS21697B-page 6  2002 Microchip Technology Inc.

MCP3302/04

2.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, V

F

.

1

0.8

0.6

0.4

0.2

0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1

0 50 100 150 200

SAMPLE

= 100 ksps, F

Positive INL

Negative INL

Sample Rate (ksps)

CLK

DD

= 21*F

= V

SAMPLE

REF

FIGURE 2-1: Integral Nonlinearity (INL) vs. Sample Rate

2

1.5

1

0.5

0

INL (LSB)

-0.5

-1

-1.5

-2

012345

Positive INL

Negative INL

V

REF

(V)

= 5V, Full differential input configuration, V

, TA = 25°C.

.

1

VDD=V

=2.7V

REF

0.8

0.6

0.4

0.2

0

INL (LSB)

-0.2

-0.4

-0.6

-0.8

-1

0 10203040506070

Positive INL

Negative INL

Sample Rate (ksps)

FIGURE 2-4: Integral Nonlinearity (INL) vs. Sample Rate (V

.

2

V

= 2.7V

DD

1.5

1

0.5

0

INL(LSB)

-0.5

-1

-1.5

-2

00.511.522.53

= 2.7V)

DD

Positive INL

Negative INL

V

REF

= 0V,

SS

(V)

FIGURE 2-2: Integral Nonlinearity (INL) vs. V

REF.

1

0.8

0.6

0.4

0.2

0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1

-4096 -3072 -2048 -1024 0 1024 2048 3072 4096

Code

FIGURE 2-3: Integral Nonlinearity (INL) vs. Code (Representative Part).

FIGURE 2-5: Integral Nonlinearity (INL) vs. V

REF (VDD

1

0.8

0.6

0.4

0.2

0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1

-4096 -3 072 -204 8 -1 024 0 1024 204 8 3 072 4096

VDD=V F

SAMPLE

= 2.7V)

=2.7V

REF

= 50 ksps

Code

FIGURE 2-6: Integral Nonlinearity (INL) vs. Code (Representative Part, V

= 2.7V).

DD

 2002 Microchip Technology Inc. DS21697B-page 7

MCP3302/04

Note: Unless otherwise indicated, V

F

1

0.8

0.6

0.4

0.2

0

-0.2

INL (LSB)

-0.4

-0.6

-0.8

-1

-50 -25 0 25 50 75 100 125 150

SAMPLE

= 100 ksps, F

Positive INL

Negative INL

Temperature(°C)

CLK

DD

= 21*F

= V

SAMPLE

REF

FIGURE 2-7: Integral Nonlinearity (INL) vs. Temperature.

1

0.8

0.6

0.4

0.2

0

-0.2

DNL (LSB)

-0.4

-0.6

-0.8

-1

0 50 100 150 200

Positive DNL

Negative DNL

Sample Rate (ksps)

= 5V, Full differential input configuration, V

, TA = 25°C.

1

VDD=V

=2.7V

REF

0.8

0.6

0.4

0.2

-0.2

INL (LSB)

-0.4

-0.6

-0.8

= 50 ksps

F

SAMPLE

Positive INL

0

Negative INL

-1

-50-250 255075100125150

Temperature (°C)

FIGURE 2-10: Integral Nonlinearity (INL) vs. Temperature (V

1

VDD=V

=2.7V

REF

0.8

0.6

0.4

0.2

0

-0.2

DNL (LSB)

-0.4

-0.6

-0.8

-1

0 10203040506070

= 2.7V).

DD

Positive DNL

Negative DNL

Sample Rate (ksps)

SS

= 0V,

FIGURE 2-8: Differential Nonlinearity (DNL) vs. Sample Rate.

2

1.5

1

0.5

0

DNL(LSB)

-0.5

-1

-1.5

-2

0123456

Positive DNL

Negative DNL

V

(V)

REF

FIGURE 2-9: Differential Nonlinearity (DNL) vs. V

REF

.

FIGURE 2-11: Differential Nonlinearity (DNL) vs. Sample Rate (V

2

VDD=2.7V

= 50 ksps

F

SAMPLE

1.5

1

0.5

0

DNL (LSB)

-0.5

-1

-1.5

-2

0 0.5 1 1.5 2 2.5 3

Positive DNL

DD

Negative DNL

V

(V)

REF

= 2.7V).

FIGURE 2-12: Differential Nonlinearity (DNL) vs. V

REF (VDD

= 2.7V).]

DS21697B-page 8  2002 Microchip Technology Inc.

MCP3302/04

Note: Unless otherwise indicated, V

F

1

0.8

0.6

0.4

0.2

0

-0.2

DNL (LSB)

-0.4

-0.6

-0.8

-1

-4096 -3072 -2048 -1024 0 1024 2048 3072 4096

SAMPLE

= 100 ksps, F

Code

CLK

DD

= 21*F

= V

SAMPLE

FIGURE 2-13: Differential Nonlinearity (DNL) vs. Code (Representative Part).

1

0.8

0.6

0.4

0.2

0

-0.2

DNL (LSB)

-0.4

-0.6

-0.8

-1

-50 -25 0 25 50 75 100 125 150

Posit ive DNL

Negaitive DNL

Temperature (°C)

= 5V, Full differential input configuration, V

REF

, TA = 25°C.

1

VDD=V

=2.7V

REF

0.8

= 50 ksps

F

SAMPLE

0.6

0.4

0.2

0

-0.2

DNL (LSB)

-0.4

-0.6

-0.8

-1

-4096 -3 072 -204 8 -1024 0 1024 204 8 3072 409 6

FIGURE 2-16: Differential Nonlinearity (DNL) vs. Code (Representative Part, V

= 2.7V).

DD

1

VDD=V

=2.7V

REF

0.8

0.6

0.4

0.2

-0.2

DNL (LSB)

-0.4

-0.6

-0.8

= 50 ksps

F

SAMPLE

0

-1

-50 -25 0 25 50 75 100 125 150

SS

Code

Positive DNL

Negative DNL

Temperature (°C)

= 0V,

FIGURE 2-14: Differential Nonlinearity (DNL) vs. Temperature.

4

3

2

1

0

-1

Positive Gain Error (LSB)

-2

-3

0123456

VDD=5V F

SAMPLE

= 100 ksps

V

REF

(V)

FIGURE 2-15: Positive Gain Error vs.

.

V

REF

FIGURE 2-17: Differential Nonlinearity (DNL) vs. Temperature (V

20

18

16

14

12

10

8

6

Offset Error (LSB)

4

V

= 2.7V

DD

2

F

SAMPLE

0

0123456

= 50 ksps

V F

DD

SAMPLE

= 5V

= 100 ksp s

FIGURE 2-18: Offset Error vs. V

DD

V

REF

= 2.7V).

(V)

REF

.

 2002 Microchip Technology Inc. DS21697B-page 9

MCP3302/04

Note: Unless otherwise indicated, V

F

0

-0.2

-0.4

-0.6

-0.8

-1

-1.2

-1.4

VDD=V

Positive Gain Error (LSB)

F

-1.6

-1.8

-50 0 50 100 150

SAMPLE

=2.7V

REF

= 50 ksps

SAMPLE

= 100 ksps, F

Temperature (°C)

CLK

VDD=V F

SAMPLE

DD

= 21*F

=5V

REF

= 100 ksps

= V

SAMPLE

FIGURE 2-19: Positive Gain Error vs. Temperature.

100

90

80

70

60

50

SNR (db)

40

30

20

10

0

110100

Input Frequency (kHz)

VDD=V F

SAMPLE

VDD=V F

SAMPLE

=5V

REF

= 100 ksp s

=2.7V

REF

= 50 ksps

= 5V, Full differential input configuration, V

REF

, TA = 25°C.

3.5

3

2.5

2

1.5

1

Offset Error (LSB)

0.5

0

-50 0 50 100 150

FIGURE 2-22: Offset Error vs. Temperature.

90

80

70

60

VDD=V

=2.7V

REF

= 50 ksps

F

SAMPLE

50

40

SINAD (dB)

30

20

10

0

110100

= 0V,

SS

VDD=V

REF

F

= 100 ksp s

SAMPLE

VDD=V

=2.7V

REF

F

= 50 ksps

SAMPLE

Temperature (°C)

Input Frequency (kHz)

=5V

VDD=V F

SAMPLE

=5V

REF

= 100 ksps

FIGURE 2-20: Signal to Noise Ratio (SNR) vs. Input Frequency.

0

-10

-20

-30

-40

-50

THD (dB)

-60

-70

-80

-90

-100

VDD=V

=2.7V

REF

F

= 50 ksps

SAMPLE

110100

Input Frequency (kHz)

VDD=V F

SAMPLE

=5V

REF

= 100 ksp s

FIGURE 2-21: Total Harmonic Distortion (THD) vs. Input Frequency.

FIGURE 2-23: Signal to Noise and Distortion (SINAD) vs. Input Frequency.

80

70

60

50

40

VDD=V F

SAMPLE

=2.7V

REF

= 50 ksps

30

SINAD (dB)

20

10

0

-40 -35 -30 -2 5 -20 -15 -10 -5 0

VDD=V F

SAMPLE

=5V

REF

= 100 ksps

Input Signal Level (dB)

FIGURE 2-24: Signal to Noise and Distortion (SINAD) vs. Input Signal Level.

DS21697B-page 10  2002 Microchip Technology Inc.

MCP3302/04

= 21*F

= 100 ksps

SAMPLE

DD

= V

SAMPLE

REF

Note: Unless otherwise indicated, V

F

13

12

11

10

ENOB (rms)

9

8

7

012345

SAMPLE

= 100 ksps, F

VDD=2.7V

= 50 ksps

F

SAMPLE

V

(V)

REF

CLK

VDD=5V F

FIGURE 2-25: Effective Number of Bits (ENOB) vs. V

100

90

80

70

60

50

40

SFDR (dB)

30

20

10

0

110100

REF

VDD=V F

SAMPLE

.

=2.7V

REF

= 50 ksps

Input Frequency (kHz)

VDD=V F

SAMPLE

=5V

REF

= 100 ksps

= 5V, Full differential input configuration, V

, TA = 25°C.

13

12.8

12.6

12.4

12.2

12

ENOB (rms)

11.8

11.6

11.4

11.2

110100

VDD=V

=2.7V

REF

= 50 ksps

F

SAMPLE

Input Frequency (kHz)

FIGURE 2-28: Effective Number of Bits (ENOB) vs. Input Frequency.

-30

-35

-40

-45

-50

-55

PSR(dB)

-60

-65

-70

-75

-80

1 10 100 1000 10000

Ripple Frequency (kHz)

SS

= 0V,

VDD=V

=5V

REF

= 100 ksps

F

SAMPLE

0.1 µF Bypass Capacitor

FIGURE 2-26: Spurious Free Dynamic Range (SFDR) vs. Input Frequency.

0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

Amplitude (dB)

-110

-120

-130

-140

-150

0 10000 20000 30000 40000 50000

Frequency (Hz)

FIGURE 2-27: Frequency Spectrum of 10 kHz Input (Representative Part).

FIGURE 2-29: Power Supply Rejection (PSR) vs. Ripple Frequency.

0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

Amplitude (dB)

-110

-120

-130

-140

-150 0 5000 10000 15000 20000 25000

Frequency (Hz)

FIGURE 2-30: Frequency Spectrum of 1 kHz Input (Representative Part, V

DD

= 2.7V).

 2002 Microchip Technology Inc. DS21697B-page 11

MCP3302/04

Note: Unless otherwise indicated, V

F

450

400

350

300

250

(µA)

200

DD

I

150

100

50

0

22.533.544.555.56

FIGURE 2-31: I

600

500

400

300

(µA)

DD

I

200

100

0

0 50 1 00 150 200

SAMPLE

= 100 ksps, F

VDD (V)

vs. VDD.

DD

VDD=V

=5V

REF

VDD=V

=2.7V

REF

Sample Rate (ksps)

CLK

DD

= 21*F

= V

SAMPLE

= 5V, Full differential input configuration, V

REF

, TA = 25°C.

120

100

80

(µA)

60

REF

I

40

20

0

22.533.544.555.56

FIGURE 2-34: I

120

VDD=V

REF

0 5 0 100 150 200

(µA)

REF

I

100

80

60

40

20

0

SS

VDD (V)

vs. VDD.

REF

=5V

VDD=V

=2.7V

REF

Sample Rate (ksps)

= 0V,

FIGURE 2-32: I

400

350

300

250

200

(µA)

DD

I

150

100

50

0

-50 0 50 100 150

FIGURE 2-33: I

vs. Sample Rate.

DD

VDD=V

=5V

REF

= 100 ksps

F

SAMPLE

VDD=V

=2.7V

REF

F

= 50 ksps

SAMPLE

Temperature (°C)

vs. Temperature.

DD

FIGURE 2-35: I

100

90

80

70

60

(µA)

50

REF

I

40

30

20

10

0

-50 0 50 100 150

FIGURE 2-36: I

vs. Sample Rate.

REF

VDD=V

REF

F

SAMPLE

VDD=V F

SAMPLE

Temperature (°C)

vs. Temperature.

REF

=5V

= 100 ksps

=2.7V

REF

= 50 ksps

DS21697B-page 12  2002 Microchip Technology Inc.

MCP3302/04

Note: Unless otherwise indicated, V

F

80

70

60

50

(pA)

40

DDS

I

30

20

10

0

22.533.544.555.56

FIGURE 2-37: I

100

10

1

(nA)

DDS

0.1

I

0.01

0.001

-50 -25 0 25 50 75 100

FIGURE 2-38: I

4

3.5

3

2.5

2

1.5

1

0.5

0

Negative Gain Error (LSB)

-0.5

-1

0123456

SAMPLE

= 100 ksps, F

V

(V)

DD

vs. VDD.

DDS

Temperature (°C)

vs. Temperature.

DDS

VDD=5V

= 100 ksps

F

SAMPLE

V

(V)

REF

CLK

DD

= 21*F

= V

SAMPLE

= 5V, Full differential input configuration, V

REF

, TA = 25°C.

2

1.5

1

VDD=V

=2.7V

F

SAMPLE

REF

= 50 ksps

0.5

0

-0.5

-1

Negative Gain Error (LSB)

-1.5

-2

-50 0 50 100 150

FIGURE 2-40: Negative Gain Error vs. Temperature.

80

79

78

77

76

75

74

73

72

71

Common Mode Rejection Ration(dB)

70

1 10 100 1000

FIGURE 2-41: Common Mode Rejection vs. Frequency.

= 0V,

SS

VDD=V

=5V

REF

= 100 ksps

F

SAMPLE

Temperature (°C)

Input Frequency (kHz)

FIGURE 2-39: Negative Gain Error vs. Reference Voltage.

 2002 Microchip Technology Inc. DS21697B-page 13