MICROCHIP MCP3004, MCP3008 Technical data
M
2.7V 4-Channel/8-Channel 10-Bit A/D Converters
MCP3004/3008
with SPI™ Serial Interface
Features
• 10-bit resolution
• ± 1 LSB max DNL
• ± 1 LSB max INL
• 4 (MCP3004) or 8 (MCP3008) input channels
• Analog inputs programmable as single-ended or
pseudo-differential pairs
• On-chip sample and hold
• SPI serial interface (modes 0,0 and 1,1)
• Single supply operation: 2.7V - 5.5V
• 200 ksps max. sampling rate at V
• 75 ksps max. sampling rate at V
DD
= 2.7V
DD
= 5V
• Low power CMOS technology
• 5 nA typical standby current, 2 µA max.
• 500 µA max. active current at 5V
• Industrial temp range: -40°C to +85°C
• Available in PDIP, SOIC and TSSOP packages
Applications
• Sensor Interface
• Process Control
• Data Acquisition
• Battery Operated Systems
Package Types
PDIP, SOIC, TSSOP
14
MCP3004
13
12
11
10
9
8
16
15
14
13
12
11
10
9
V
DD
V
REF
AGND
CLK
D
OUT
D
IN
CS
/SHDN
V
DD
V
REF
AGND
CLK
D
OUT
D
IN
CS/SHDN
DGND
PDIP, SOIC
CH0
CH1
CH2
CH3
NC
NC
DGND
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
MCP3008
Description
The Microchip Technology Inc. MCP3004/3008
devices are successive approximation 10-bit Analogto-Digital (A/D) converters with on-board sample and
hold circuitry. The MCP3004 is programmable to provide two pseudo-differential input pairs or four singleended inputs. The MCP3008 is programmable to provide four pseudo-differential input pairs or eight singleended inputs. Differential Nonlinearity (DNL) and Integral Nonlinearity (INL) are specified at ±1 LSB. Communication with the devices is accomplished using a
simple serial interface compatible with the SPI protocol.
The devices are capable of conversion rates of up to
200 ksps. The MCP3004/3008 devices operate over a
broad voltage range (2.7V - 5.5V). Low current design
permits operation with typical standby currents of only
5 nA and typical active currents of 320 µA. The
MCP3004 is offered in 14-pin PDIP, 150 mil SOIC and
TSSOP packages, while the MCP3008 is offered in 16pin PDIP and SOIC packages.
Functional Block Diagram
V
V
SS
V
REF
CH0
CH1
CH7*
* Note: Channels 4-7 available on MCP3008 Only
Input
Channel
Max
Sample
and
Hold
CS/SHDN
DAC
Compar ator
Control Logic
D
IN
CLK D
DD
10-Bit SAR
Shift
Regist er
OUT
2002 Microchip Technology Inc. DS21295B-page 1
MCP3004/3008
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings*
VDD........................................................................7.0V
All inputs and outputs w.r.t. V
Storage temperature .......................... -65°C to +150°C
Ambient temp. with power applied .....-65°C to +125°C
Soldering temperature of leads (10 seconds) .. +300°C
ESD protection on all pins .................................. > 4 kV
*Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
.....-0.6V to VDD +0.6V
SS
PIN FUNCTION TABLE
Name Function
V
DD
DGND Digital Ground
AGND Analog Ground
CH0-CH7 Analog Inputs
CLK Serial Clock
D
IN
D
OUT
/SHDN Chip Select/Shutdown Input
CS
V
REF
+2.7V to 5.5V Power Supply
Serial Data In
Serial Data Out
Reference Voltage Input
ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
T
= -40°C to +85°C, f
AMB
V
= 5V, T
DD
AMB
= 25°C.
= 200 ksps and f
SAMPLE
CLK
= 18*f
. Unless otherwise noted, typical values apply for
SAMPLE
= 5V, V
DD
Parameter Sym Min Typ Max Units Conditions
Conversion Rate
Conversion Time t
CONV
— — 10 clock
cycles
Analog Input Sample Time t
SAMPLE
1.5 clock
cycles
Throughput Rate f
SAMPLE
——20075ksps
ksps
DC Accuracy
Resolution 10 bits
Integral Nonlinearity INL — ±0.5 ±1 LSB
Differential Nonlinearity DNL — ±0.25 ±1 LSB No missing codes over
Offset Error — — ±1.5 LSB
Gain Error — — ±1.0 LSB
Dynamic Performance
Total Harmonic Distortion — -76 dB V
Signal to Noise and Distortion
—61 dBV
(SINAD)
Spurious Free Dynamic Range — 78 dB V
Reference Input
Voltage Range 0.25 — V
Current Drain — 100
0.001
DD
150
3
V Note 2
µA
µA CS
Note 1: This parameter is established by characterization and not 100% tested.
2: See graphs that relate linearity performance to V
REF
levels.
3: Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, especially at elevated temperatures. See Section 6.2, “Maintaining Minimum Clock Speed”,
for more information.
= 5V,
REF
VDD = V
V
= V
DD
REF
REF
= 5V
= 2.7V
temperature
= 0.1V to 4.9V@1 kHz
IN
= 0.1V to 4.9V@1 kHz
IN
= 0.1V to 4.9V@1 kHz
IN
= VDD = 5V
DS21295B-page 2 2002 Microchip Technology Inc.
ELECTRICAL SPECIFICATIONS (CONTINUED)
MCP3004/3008
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
T
= -40°C to +85°C, f
AMB
V
= 5V, T
DD
AMB
= 25°C.
= 200 ksps and f
SAMPLE
CLK
= 18*f
. Unless otherwise noted, typical values apply for
SAMPLE
= 5V, V
DD
REF
= 5V,
Parameter Sym Min Typ Max Units Conditions
Analog Inputs
Input Voltage Range for CH0 or
CH1 in Single-Ended Mode
Input Voltage Range for IN+ in
pseudo-differential mode
Input Voltage Range for IN- in
pseudo-differential mode
V
SS
IN- — V
-100 — VSS+100 mV
V
SS
—V
REF
REF
+IN-
V
Leakage Current — 0.001 ±1 µA
Switch Resistance — 1000 — Ω See Figure 4-1
Sample Capacitor — 20 — pF See Figure 4-1
Digital Input/Output
Data Coding Format Straight Binary
High Level Input Voltage V
Low Level Input Voltage V
High Level Output Voltage V
Low Level Output Voltage V
Input Leakage Current I
Output Leakage Current I
Pin Capacitance
(All Inputs/Outputs)
CIN,
C
IH
IL
OH
OL
LI
LO
OUT
0.7 V
DD
4.1——VI
——0.4VI
-10 — 10 µA VIN = VSS or V
-10 — 10 µA V
— — 10 pF VDD = 5.0V (Note 1)
——V
—0.3 VDDV
OH
OL
OUT
T
AMB
= -1 mA, VDD = 4.5V
= 1 mA, VDD = 4.5V
= VSS or V
= 25°C, f = 1 MHz
Timing Parameters
Clock Frequency f
Clock High Time t
Clock Low Time t
Fall To First Rising CLK Edge t
CS
Fall To Falling CLK Edge t
CS
Data Input Setup Time t
Data Input Hold Time t
CLK Fall To Output Data Valid t
CLK Fall To Output Enable t
Rise To Output Disable t
CS
Disable Time t
CS
Rise Time t
D
OUT
Fall Time t
D
OUT
CLK
HI
LO
SUCS
CSD
SU
HD
DO
EN
DIS
CSH
R
F
——3.6
1.35
MHz
MHz
VDD = 5V (Note 3)
V
= 2.7V (Note 3)
DD
125 — — ns
125 — — ns
100 — — ns
—— 0 ns
— — 50 ns
— — 50 ns
——125
200
——125
200
nsnsVDD = 5V, See Figure 1-2
V
= 2.7V, See Figure 1-2
DD
nsnsVDD = 5V, See Figure 1-2
V
= 2.7V, See Figure 1-2
DD
— — 100 ns See Test Circuits, Figure 1-2
270 — — ns
— — 100 ns See Test Circuits, Figure 1-2
(Note 1)
— — 100 ns See Test Circuits, Figure 1-2
(Note 1)
Note 1: This parameter is established by characterization and not 100% tested.
2: See graphs that relate linearity performance to V
REF
levels.
3: Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, especially at elevated temperatures. See Section 6.2, “Maintaining Minimum Clock Speed”,
for more information.
DD
DD
2002 Microchip Technology Inc. DS21295B-page 3
MCP3004/3008
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
T
= -40°C to +85°C, f
AMB
V
= 5V, T
DD
AMB
= 25°C.
= 200 ksps and f
SAMPLE
CLK
= 18*f
. Unless otherwise noted, typical values apply for
SAMPLE
= 5V, V
DD
REF
= 5V,
Parameter Sym Min Typ Max Units Conditions
Power Requirements
Operating Voltage V
Operating Current I
Standby Current I
DD
DD
DDS
2.7 — 5.5 V
— 425
225
550 µA VDD = V
D
unloaded
OUT
V
= V
DD
D
unloaded
OUT
REF
REF
= 5V,
= 2.7V,
—0.005 2 µACS = VDD = 5.0V
Temperature Ranges
Specified Temperature Range T
Operating Temperature Range T
Storage Temperature Range T
A
A
A
-40 — +85 °C
-40 — +85 °C
-65 — +150 °C
Thermal Package Resistance
Thermal Resistance, 14L-PDIP θ
Thermal Resistance, 14L-SOIC θ
Thermal Resistance, 14L-TSSOP θ
Thermal Resistance, 16L-PDIP θ
Thermal Resistance, 16L-SOIC θ
JA
JA
JA
JA
JA
—70 —°C/W
— 108 — °C/W
— 100 — °C/W
—70 —°C/W
—90 —°C/W
Note 1: This parameter is established by characterization and not 100% tested.
2: See graphs that relate linearity performance to V
REF
levels.
3: Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, especially at elevated temperatures. See Section 6.2, “Maintaining Minimum Clock Speed”,
for more information.
D
CS
CLK
D
OUT
IN
T
SUCS
T
SU
MSB IN
T
HD
FIGURE 1-1: Serial Interface Timing.
T
CSH
THIT
LO
T
T
EN
DO
NULL BIT
T
R
T
F
T
DIS
LSBMSB OUT
DS21295B-page 4 2002 Microchip Technology Inc.
MCP3004/3008
1.4V
3kΩ
D
OUT
C
= 100 pF
L
Voltage Waveforms for tR, t
D
OUT
t
R
Voltage Waveforms for t
CLK
t
DO
D
OUT
FIGURE 1-2: Load Circuit for t
Te s t P o in t
F
V
t
F
DO
, tF, tDO.
R
OH
V
OL
Test P o i n t
V
DD
3kΩ
D
OUT
VDD/2
100 pF
V
SS
Voltage Waveforms for t
t
Waveform 2
DIS
tEN Wave form
Waveform 1
t
DIS
EN
CS
CLK
D
OUT
CS
D
OUT
Waveform 1*
D
OUT
12
Voltage Waveforms for t
V
IH
T
DIS
DIS
3
t
EN
90%
10%
Waveform 2†
* Waveform 1 is for an output with internal
conditions such that the output is high,
unless disabled by the output control.
† Waveform 2 is for an output with internal
conditions such that the output is low,
unless disabled by the output control.
4
B9
FIGURE 1-3: Load circuit for t
and tEN.
DIS
2002 Microchip Technology Inc. DS21295B-page 5
MCP3004/3008
2.0 TYPICAL PERFORMANCE CHARACTERISTICS
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, V
DD
= V
REF
= 5V, f
CLK
= 18* f
SAMPLE
, TA = 25°C.
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
INL (LSB)
-0.4
-0.6
-0.8
-1.0
0 25 50 75 100 125 150 175 200 225 250
Positive I NL
Negative INL
Sample Rate (ksps)
FIGURE 2-1: Integral Nonlinearity (INL) vs. Sample Rate.
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
INL(LSB)
-0.4
-0.6
-0.8
-1.0
0123456
Positive INL
Negative INL
V
REF
(V)
1.0
VDD = V
= 2.7 V
0.8
0.6
0.4
0.2
0.0
-0.2
INL (LSB)
-0.4
-0.6
-0.8
-1.0
REF
Positive I NL
Negative INL
0255075100
Sample Rate (ksps)
FIGURE 2-4: Integral Nonlinearity (INL) vs.
Sample Rate (V
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
INL(LSB)
-0.4
-0.6
-0.8
-1.0
0.0 0.5 1.0 1.5 2. 0 2.5 3.0
= 2.7V).
DD
Positive I NL
Negative INL
V
(V)
REF
VDD = V
f
SAMPLE
= 2.7 V
REF
= 75 ksps
FIGURE 2-2: Integral Nonlinearity (INL) vs.
.
V
REF
0.5
VDD = V
= 5 V
0.4
0.3
0.2
0.1
0.0
-0.1
INL (LSB)
-0.2
-0.3
-0.4
-0.5
REF
f
= 200 ksps
SAMPLE
0 12 8 256 384 512 640 76 8 89 6 1024
Digital Code
FIGURE 2-3: Integral Nonlinearity (INL) vs. Code (Representative Part).
FIGURE 2-5: Integral Nonlinearity (INL) vs.
(VDD = 2.7V).
V
REF
0.5
VDD = V
= 2.7 V
0.4
0.3
0.2
0.1
0.0
-0.1
INL (LSB)
-0.2
-0.3
-0.4
-0.5
REF
f
= 75 ksps
SAMPLE
0 12 8 256 384 512 640 76 8 89 6 1024
Digital Code
FIGURE 2-6: Integral Nonlinearity (INL) vs.
Code (Representative Part, V
= 2.7V).
DD
DS21295B-page 6 2002 Microchip Technology Inc.
MCP3004/3008
Note: Unless otherwise indicated, V
0.6
0.4
0.2
0.0
INL (LSB)
-0.2
-0.4
-0.6
-50-25 0 255075100
Positive I NL
Negative INL
DD
= V
REF
= 5V, f
Temperature (°C)
FIGURE 2-7: Integral Nonlinearity (INL) vs. Temperature.
0.6
0.4
0.2
0.0
DNL (LSB)
-0.2
-0.4
-0.6
Positive D NL
Negative DNL
0 25 50 75 100 125 150 175 200 225 250
Sample Rate (ksps)
CLK
= 18* f
, TA = 25°C.
SAMPLE
0.6
VDD = V
= 2.7 V
REF
f
= 75 ksps
SAMPLE
0.4
0.2
0.0
INL (LSB)
-0.2
-0.4
-0.6
-50-25 0 255075100
Positive I NL
Negative INL
Temperature (°C)
FIGURE 2-10: Integral Nonlinearity (INL) vs.
Temperature (V
0.6
VDD = V
0.4
0.2
0.0
DNL (LSB)
-0.2
-0.4
-0.6
0255075100
= 2.7V).
DD
= 2.7 V
REF
Positive D NL
Negative DNL
Sample Rate (ksps)
FIGURE 2-8: Differential Nonlinearity (DNL) vs. Sample Rate.
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
DNL (LSB)
-0.4
-0.6
-0.8
-1.0
012345
Positive D NL
Negative DNL
V
(V)
REF
FIGURE 2-9: Differential Nonlinearity (DNL)
REF
.
vs. V
FIGURE 2-11: Differential Nonlinearity (DNL)
vs. Sample Rate (V
0.8
0.6
0.4
0.2
0.0
-0.2
DNL (LSB)
-0.4
-0.6
-0.8
-1.0
0.0 0.5 1.0 1.5 2.0 2. 5 3.0
= 2.7V).
DD
Positive D NL
Negative DNL
V
REF
(V)
VDD = V
f
SAMPLE
= 2.7 V
REF
= 75 ksps
FIGURE 2-12: Differential Nonlinearity (DNL)
vs. V
REF (VDD
= 2.7V).
2002 Microchip Technology Inc. DS21295B-page 7
MCP3004/3008
Note: Unless otherwise indicated, V
1.0
VDD = V
= 5 V
0.8
0.6
0.4
0.2
0.0
-0.2
DNL (LSB)
-0.4
-0.6
-0.8
-1.0
REF
f
= 200 ksps
SAMPLE
0 12 8 256 384 512 640 76 8 89 6 10 24
DD
= V
REF
= 5V, f
Digital Code
FIGURE 2-13: Differential Nonlinearity (DNL) vs. Code (Representative Part).
0.6
0.4
0.2
0.0
DNL (LSB)
-0.2
-0.4
-0.6
-50 -25 0 25 50 75 100
Positive D NL
Negative DNL
Temperature (°C)
CLK
= 18* f
SAMPLE
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
DNL (LSB)
-0.4
-0.6
-0.8
-1.0
, TA = 25°C.
VDD = V
= 2.7 V
REF
f
= 75 ksps
SAMPLE
0 12 8 256 384 512 640 76 8 89 6 10 24
Digital Code
FIGURE 2-16: Differential Nonlinearity (DNL)
vs. Code (Representative Part, V
0.6
VDD = V
= 2.7 V
REF
f
= 75 ksps
SAMPLE
0.4
0.2
0.0
DNL (LSB)
-0.2
-0.4
-0.6
-50-25 0 255075100
Positive D NL
Negative DNL
Temperature (°C)
DD
= 2.7V).
FIGURE 2-14: Differential Nonlinearity (DNL) vs. Temperature.
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
Gain Error (LSB)
-1.5
-2.0
012345
FIGURE 2-15: Gain Error vs. V
VDD = 5 V
f
SAMPLE
VDD = 2.7 V
f
= 75 ksps
SAMPLE
= 200 ksps
V
(V)
REF
.
REF
FIGURE 2-17: Differential Nonlinearity (DNL)
VDD = 5 V
f
SAMPLE
V
f
SAMPLE
= 2.7V).
DD
= 200 ksps
= 2.7 V
DD
= 75 ksps
V
REF
(V)
REF
.
vs. Temperature (V
8
7
6
5
4
3
2
Offset Error (LSB)
1
0
0123 45
FIGURE 2-18: Offset Error vs. V
DS21295B-page 8 2002 Microchip Technology Inc.
MCP3004/3008
Note: Unless otherwise indicated, V
0.0
VDD = V
= 2.7 V
f
SAMPLE
VDD = V
f
SAMPLE
REF
= 75 ksps
= 5 V
REF
= 200 ksps
-0.1
-0.2
-0.3
-0.4
Gain Error (LSB)
-0.5
-0.6
-50-25 0 255075100
DD
= V
REF
= 5V, f
Temperature (°C)
FIGURE 2-19: Gain Error vs. Temperature.
80
70
60
50
40
30
SNR (dB)
20
10
0
110100
VDD = V
f
SAMPLE
Input Frequency (kHz)
= 2.7 V
REF
= 75 ksps
VDD = V
f
SAMPLE
= 5 V
REF
= 200 ksps
CLK
= 18* f
, TA = 25°C.
SAMPLE
1.2
VDD = V
= 5 V
f
SAMPLE
REF
= 200 ksps
VDD = V
f
= 75 ksps
SAMPLE
REF
= 2.7 V
1.0
0.8
0.6
0.4
Offset Error (LSB)
0.2
0.0
-50 -25 0 25 50 75 100
Temperature (°C)
FIGURE 2-22: Offset Error vs. Temperature.
80
70
60
50
40
30
SINAD (dB)
20
10
0
110100
VDD = V
= 2.7 V
REF
f
= 75 ksps
SAMPLE
Input Frequency (kHz)
VDD = V
f
SAMPLE
= 5 V
REF
= 200 ksps
FIGURE 2-20: Signal to Noise (SNR) vs. Input Frequency.
0
-10
-20
-30
-40
-50
-60
THD (dB)
-70
-80
-90
-100
110100
VDD = V
f
SAMPLE
= 2.7 V
REF
= 75 ksps
VDD = V
f
SAMPLE
= 5 V
REF
= 200 ksps
Input Frequency (kHz)
FIGURE 2-21: Total Harmonic Distortion (THD) vs. Input Frequency.
FIGURE 2-23: Signal to Noise and Distortion (SINAD) vs. Input Frequency.
70
60
VDD = V
f
SAMPLE
= 5 V
REF
= 200 ksps
VDD = V
REF
f
= 75 ksps
SAMPLE
= 2.7 V
50
40
30
SINAD (dB)
20
10
0
-40 -35 -30 -25 -20 -15 -10 -5 0
Input Signal Level (dB)
FIGURE 2-24: Signal to Noise and Distortion (SINAD) vs. Input Signal Level.
2002 Microchip Technology Inc. DS21295B-page 9
MCP3004/3008
Note: Unless otherwise indicated, V
10.00
9.75
9.50
ENOB (rms)
9.25
9.00
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4. 5 5.0
VDD = V
f
SAMPLE
VDD = V
REF
f
= 75 ksps
SAMPLE
= 5 V
REF
= 200 ksps
= 2.7 V
V
REF
(V)
DD
= V
REF
= 5V, f
FIGURE 2-25: Effective Number of Bits (ENOB)
vs. V
.
REF
100
90
80
70
60
50
40
SFDR (dB)
30
20
10
0
110100
VDD = V
f
SAMPLE
= 2.7 V
REF
= 75 ksps
VDD = V
f
SAMPLE
= 5 V
REF
= 200 ksps
Input Frequency (kHz)
CLK
= 18* f
, TA = 25°C.
SAMPLE
10.0
9.8
9.6
9.4
9.2
9.0
8.8
ENOB (rms)
8.6
8.4
8.2
8.0
110100
VDD = V
f
SAMPLE
= 2.7 V
REF
= 75 ksps
VDD = V
f
SAMPLE
Input Frequency (kHz)
FIGURE 2-28: Effective Number of Bits (ENOB) vs. Input Frequency.
0
VDD = V
= 5 V
REF
f
-10
-20
-30
-40
-50
-60
Power Supply Rejection (dB)
-70
= 200 ksps
SAMPLE
1 10 100 1000 10 000
Ripple Frequency (kHz)
= 5 V
REF
= 200 ksps
FIGURE 2-26: Spurious Free Dynamic Range (SFDR) vs. Input Frequency.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
Amplitude (dB)
-100
-110
-120
-130
0 20000 40000 60000 80000 100000
Frequency (Hz)
VDD = V
REF
F
= 200 ksps
SAMPLE
F
= 10.009 7 kHz
INPUT
4096 poi nts
= 5 V
FIGURE 2-27: Frequency Spectrum of 10 kHz
Input (Representative Part).
FIGURE 2-29: Power Supply Rejection (PSR) vs. Ripple Frequency.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
Amplitude (dB)
-100
-110
-120
-130
0 5000 10000 15000 20000 25000 30000 35000
Frequency (Hz)
VDD = V
REF
f
= 75 ksps
SAMPLE
f
= 1.0070 8 kHz
INPUT
4096 poi nts
= 2.7 V
FIGURE 2-30: Frequency Spectrum of 1 kHz
Input (Representative Part, V
= 2.7V).
DD
DS21295B-page 10 2002 Microchip Technology Inc.
MCP3004/3008
Note: Unless otherwise indicated, V
550
500
450
400
350
300
(µA)
250
DD
I
200
150
100
FIGURE 2-31: I
500
450
400
350
300
250
(µA)
DD
200
I
150
100
V
= V
REF
DD
All points at f
at V
50
0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
REF
= 3.6 MHz exc ept
CLK
= VDD = 2.5 V, f
= 1.35 MHz
CLK
VDD (V)
vs. VDD.
DD
VDD = V
= 5 V
REF
VDD = V
= 2.7 V
REF
50
0
10 100 1000 10000
Clock Frequency (kHz)
DD
= V
REF
= 5V, f
CLK
= 18* f
SAMPLE
FIGURE 2-34: I
, TA = 25°C.
550
500
450
400
350
300
(µA)
250
DD
I
200
150
V
= V
REF
DD
All points at f
100
at V
REF
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
10 100 1000 10000
120
110
100
(µA)
REF
I
50
0
90
80
70
60
50
40
30
20
10
0
= 3.6 MHz exc ept
CLK
= VDD = 2.5 V, f
= 1.35 MHz
CLK
VDD (V)
vs. VDD.
REF
VDD = V
= 5 V
REF
VDD = V
= 2.7 V
REF
Clock Frequency (kHz)
FIGURE 2-32: I
550
500
VDD = V
450
400
350
300
(µA)
250
DD
I
200
150
100
50
0
REF
f
= 3.6 MHz
CLK
VDD = V
f
= 1.35 MHz
CLK
-50-250 255075100
FIGURE 2-33: I
vs. Clock Frequency.
DD
= 5 V
= 2.7 V
REF
Temperature (°C)
vs. Temperature.
DD
FIGURE 2-35: I
140
120
100
80
(µA)
REF
60
I
40
20
VDD = V
f
CLK
0
-50-250 255075100
FIGURE 2-36: I
vs. Clock Frequency.
REF
VDD = V
= 5 V
REF
f
= 3.6 MHz
CLK
= 2.7 V
REF
= 1.35 MHz
Temperature (°C)
vs. Temperature.
REF
2002 Microchip Technology Inc. DS21295B-page 11
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