The MCP1701 is a f amily o f CM OS low d rop out (LDO ),
positive voltage regulators that can deliver up to
250 mA of current while consuming only 2.0 µA of
quiescent current (typ.). The input operating range is
specified up to 10V, making it ideal for lithium-ion (one
or two cells), 9V alkaline and other two and three
primary cell battery-power ed app lic ati on s.
The MCP1701 is capable of delivering 250 mA with an
input-to-output voltage differential (dropout voltage) of
650 mV. The low dropout voltage extends the battery
operating lifetime. It als o perm its high currents in small
packages when operated with minimum V
differentials.
The MCP1701 has a tight tolerance output voltage
regulation of ± 0.5% (typ.) and very good line regula tion
at ±0.2%. The LDO output is stable when using only
1 µF of output capacitance of either tantalum or
aluminum-electrolytic style capacitors. The MCP1701
LDO also incorporates short circuit protec tion to ensure
maximum reliability.
Package options include the 3-pin SOT-23A and 3-pin
SOT-89.
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation
of the device at these or any other conditions above those
Absolute Maximum Ratings †
indicated in the operation sections of the specifications is not
implied. Exposure to Absolute Maximum Rating conditions for
Input Vo ltage ........................................................+12V
Output Current (Continuous)..........PD/(VIN – V
OUT
)mA
Output Current (peak)..................................... 500 mA
Note:The graphs and tables provided following this note ar e a st a tis tic al summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Notes: Unless otherwise specified, V
2.65
2.60
2.55
2.50
A)
µ
Supply Current (
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
1.95
+25°C
0°C
-40°C
2345678910
= 1.8V, 3.0V, 5.0V, TA = +25°C, CIN = 1 µF Tantalum, C
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:PIN FUNCTION TABLE
Pin No.
SOT-23A
11GNDGround Terminal
23V
32V
Pin No.
SOT-89
NameFunction
OUT
IN
Regulated Voltage Output
Unregulated Supply Input
MCP1701
3.1Ground Terminal (GND)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (2 µA, typ.) flows out of this
pin, there is no high current. The LD O output regulatio n
is referenced to this pin. Minimize voltage drops
between this pin and the negative side of the load.
3.2Regulated Voltage Output (V
Connect V
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close as poss ib le to th e LD O V
current flowing out of this pin is equal to the DC load
current.
to the posit ive side of the l oad and the
OUT
OUT
)
OUT
pin. The
3.3Unregulated Supply Input (VIN)
Connect the input supply voltage and the positive side
of the input capacitor to V
regulators, low source impedance is necessary for the
stable operation of the LDO. The amount of
capacitance required to ensure low source impedance
will depend on the proximity of the input source
capacitors or battery type. The input capacitor should
be physically located as close as possible to the V
pin. For most applications, 1 µF of capacitance will
ensure stable opera tion o f t he LDO circ uit. Fo r appl ications that have lo ad curr ents bel ow 100 mA, t he inpu t
capacitance requirement can be lowered. The type of
capacitor used can be ceramic, tantalum or aluminum
electrolytic. The low equivalent series resistence
characteristics of the ce ramic wil l yield better n oise an d
PSRR performance at high fr equency. The current flow
into this pin is equal to the DC load current, plus the
LDO bias current (2 µA, typ.).
The MCP1701 is a low quiescent current, precision,
fixed-output voltage LDO. Unlike bipolar regulators,
the MCP1701 supply current does not increase
proportionally with load current.
4.1Output Capacitor
A minimum of 1 µF output capacitor is required. The
output capacitor should have an ESR greater than
0.1Ω and less than 5Ω, plus a resonant frequency
above 1 MHz. Larger output capacitors can be us ed to
improve supply n oise re jecti on and tr ansie nt respo nse.
Care should be t a ke n w he n i ncreasing C
that the input impedance is not high enough to cause
high input impedance oscillation.
V
IN
to ensure
OUT
Short Circuit
Protection
4.2Input Capacitor
A 1 µF input capacitor is recommended for most
applications when the input impedance is on the order
of 10Ω. Larger in put capacitan ce may be requ ired for
stability when op era ting from a bat tery inp ut, or if there
is a large di stance from the in put source to th e LDO.
When large values of output capacitance are used, the
input capacitance should be increased to prevent high
source impedance oscil lat ion s.
4.3Overcurrent
The MCP1701 interna l circui try monit ors the amount of
current flowing through the P-channel pass transistor.
In the event of a short circuit or excessive output
current, the MCP1701 will a ct to limit the outpu t current.
The amount of power dissipated internal to the LDO
linear regulator is the sum of the power dissipation
within the linear pass devic e (P-channel MOSFET) and
the quiescent current required to bias the internal
reference and error amplifier. The internal linear pass
device power dissipation is calculated as shown in
Equation 5-1.
EQUATION 5-1:
(Pass Device) = (VIN – V
P
D
The internal power dissipat ion, as a res ult of the bias
current for the LDO internal reference and error
amplifier, is calculated as shown in Equation 5-2.
EQUATION 5-2:
PD (Bias) = VIN x I
The total internal power dissipation is the sum of P
(pass device) and PD (bias).
EQUATION 5-3:
P
= PD (Pass Device) + PD (Bias)
TOTAL
OUT
GND
) x I
OUT
T o determine the junction temperature of the device, the
thermal resistance from junction-to-ambient must be
known. The 3-pin SOT-23 thermal resistance from
junction-to-air (R
335° C/W. The SOT-89 R
) is estimated to be approximately
θJA
is estimated to be
θJA
approximately 52° C/W when mounted on 1 square inch
of copper. The R
will vary with physical layout, airflow
θJA
and other application-specific conditions.
The device junction temperature is determined by
calculating the junction temperature rise above
ambient, then adding the rise to the ambient
temperature.
EQUATION 5-5:JUNCTION
TEMPERATURE – SOT-23
EXAMPLE:
TJP
DMAXRθJATA
116.0 milliwatts 335°C/W 5 5°C+×=
T
J
T
93.9°C=
J
+×=
EQUATION 5-6:JUNCTION
D
TEMPERATURE – SOT-89
EXAMPLE:
TJ116.0 milliwatts 52°C/W 55°C+×=
T
61°C=
J
For the MCP1701, the inte rnal quiescent b ias current is
so low (2 µA, typ.) that the P
(bias) term of the power
D
dissipation equation can be ignored. The maximum
power dissipation can be estimated by using the
maximum input voltage and the minimum output
voltage to obtain a maximum voltage differential
between inpu t and output. The ne xt step would be to
multiply the maximum voltage differential by the
maximum output current.
EQUATION 5-4:
Given:
V
V
OUT
I
OUT
T
AMAX
P
MAX
P
MAX
PD = (V
= 3.3V to 4.1V
IN
=3.0V ± 2%
= 1 mA to 100 mA
=55°C
= (4.1V – (3.0V x 0.98)) x 100 mA
= 116.0milliwatts
represen ts first voltage digit
represents first decimal place voltage (x.0 - x.9)
6.0PACKAGING INFORMATION
6.1Package Marking Information
3-Pin SOT-23A3-Pin SOT-8 9
2
112
1
43
4
3
1V, 2V, 3V, 4V, 5V, 6V
Ex: 3.xV =
2
Ex: 3.4V =
3
E
3
SymbolVoltageSymbolVoltage
Ax.0Fx.5
Bx.1Hx.6
Cx.2Kx.7
Dx.3Lx.8
Ex.4Mx.9
3
represents polarity
0 = Positive (fixed)
4
represents assembl y lot numbe r
Legend: XX...XCustomer-specific information*
YYear code (last digit of calendar year)
YYYear code (last 2 digits of calendar year)
WWWeek code (week of January 1 is week ‘01’)
NNNAlphanumer ic traceability code
3
e
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ()
Note:In the event the full Microchip part number ca nnot be m arked o n one line , it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
can be found on the outer packaging for this package.
3
e
3-Lead Plastic Small Outline Transistor (CB) (SOT23)
E
E1
2
MCP1701
B
n
1
c
β
Number of Pins
Pitch
Outside lead pitch (basic)
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
EIAJ SC-59 Equivalent
Drawing No. C04-104
Note the following details of the code protection feature on Microchip devices:
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•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
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mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are com mitted to continuously improving the code protect ion f eatures of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digit al Mill ennium Copyright Act. If such acts
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