- 2.0V to 4.7V in 100 mV increments,
(Contact the local Microchip Sales Office)
• Resets microcontroller in a power-l oss event
• Reset Delay Time Out Option:
- 1.4 ms, 30 ms, 200 ms, or 1.6s (typical)
• Watchdog Timer Input Time Out Options:
- 6.3 ms, 102 ms, 1.6s, or 25.6s (typical)
• Manual Reset (MR
• Single and Complementary Reset output(s)
• Reset Output Options:
- Push-Pull (active-high or active-low)
- Open-Drain (internal or external Pull-up)
• Temperature Range:
- -40°C to +85°C for trip points 2.0 to 2.4V and,
- -40°C to + 125°C for trip points > 2.5V
• Voltage Range: 1.0V to 5.5V
• Lead Free Packaging
) input (active-low)
Description
The MCP131X/2X are voltage supervisor devices
designed to keep a microcontroller in Reset until the
system voltage has reached and stabilized at the
proper level for reliable system operation. The table
below shows the available features for these devices.
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), T
ParametersSymMinTypMaxUnitsConditions
= -40°C to +125°C.
A
Operating Voltage RangeV
Specified VDD Value to V
LowV
OUT
Operating Current:I
DD
DD
DD
1.0—5.5V
1.0——VI
= 10 µA, V
RST
RST
—510µAWatchdog Timer Active
—12µAWatchdog Timer Inactive
—12µAVDD < V
TRIP
—510µAReset Delay Timer Active
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: Hyster ysis is minimum = 1%, maximum = 6% at +25°C.
4: This specification allows this device to be used in PIC
®
microcontroller applications that require the In-Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage
requirements). The total time that the RST pin can be above the maximum device operational voltage
(5.5V) is 100s. Current into the RST
pin should be limited to 2 mA. It is recommended that the device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information,
refer to Figure 2-35.
5: This parameter is established by characterization and is not 100% tested.
6:Custom ordered voltage trip point; min imum ord er volume requ irement . Informati on avai labl e upo n reque st.
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), T
ParametersSymMinTypMaxUnitsConditions
= -40°C to +125°C.
A
VDD Trip PointMCP13XX-20V
(Note 6)1.9502.002.050VTA = -40°C to +85°C (Note 2)
MCP13XX-212.0692.102.132VTA = +25°C (Note 1)
(Note 6)2.0482.102.153VTA = -40°C to +85°C (Note 2)
MCP13XX-222.1672.202.233VTA = +25°C (Note 1)
(Note 6)2.1452.202.255VTA = -40°C to +85°C (Note 2)
MCP13XX-232.2662.302.335VTA = +25°C (Note 1)
(Note 6)2.2432.302.358VTA = -40°C to +85°C (Note 2)
MCP13XX-242.3642.402.436VTA = +25°C (Note 1)
(Note 6)2.3402.402.460VTA = -40°C to +85°C (Note 2)
MCP13XX-252.4632.502.538VTA = +25°C (Note 1)
(Note 6)2.4382.502.563VTA = -40°C to +125°C (Note 2)
MCP13XX-262.5612.602.639VTA = +25°C (Note 1)
(Note 6)2.5352.602.665VTA = -40°C to +125°C (Note 2)
MCP13XX-272.6602.702.741VTA = +25°C (Note 1)
(Note 6)2.6332.702.768VTA = -40°C to +125°C (Note 2)
MCP13XX-282.7582.802.842VTA = +25°C (Note 1)
(Note 6)2.7302.802.870VTA = -40°C to +125°C (Note 2)
MCP13XX-292.8572.902.944VT
MCP13XX-302.9553.003.045VTA = +25°C (Note 1)
(Note 6)2.9253.003.075VTA = -40°C to +125°C (Note 2)
MCP13XX-313.0543.103.147VTA = +25°C (Note 1)
(Note 6)3.0233.103.178VTA = -40°C to +125°C (Note 2)
MCP13XX-323.1523.203.248VTA = +25°C (Note 1)
(Note 6)3.1203.203.280VTA = -40°C to +125°C (Note 2)
MCP13XX-333.2513.303.350VTA = +25°C (Note 1)
(Note 6)3.2183.303.383VTA = -40°C to +125°C (Note 2)
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: Hyster ysis is minimum = 1%, maximum = 6% at +25°C.
4: This specification allows this device to be used in PIC
cuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage
requirements). The total time that the RST
(5.5V) is 100s. Current into the RST
ational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information,
refer to Figure 2-35.
5: This parameter is established by characterization and is not 100% tested.
6:Custom ordered voltage trip point; min imum ord er volume requ irement . Informati on avai labl e upo n reque st.
TRIP
1.9702.002.030VTA = +25°C (Note 1)
= +25°C (Note 1)
A
2.8282.902.973VTA = -40°C to +125°C (Note 2)
®
microcontroller applications that require the In-Cir-
pin can be above the maximum device operational voltage
pin should be limited to 2 mA. It is recommended that the device oper-
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), T
ParametersSymMinTypMaxUnitsConditions
= -40°C to +125°C.
A
VDD Trip Point (Con’t) MCP13XX-34V
TRIP
3.3493.403.451VTA = +25°C (Note 1)
(Note 6)3.3153.403.385VTA = -40°C to +125°C (Note 2)
MCP13XX-353.4483.503.553VTA = +25°C (Note 1)
(Note 6)3.4133.503.588VTA = -40°C to +125°C (Note 2)
MCP13XX-363.5463.603.654VTA = +25°C (Note 1)
(Note 6)3.5103.603.690VTA = -40°C to +125°C (Note 2)
MCP13XX-373.6453.703.756VTA = +25°C (Note 1)
(Note 6)3.6083.703.793VTA = -40°C to +125°C (Note 2)
MCP13XX-383.7433.803.857VTA = +25°C (Note 1)
(Note 6)3.7053.803.895VTA = -40°C to +125°C (Note 2)
MCP13XX-393.8423.903.959VTA = +25°C (Note 1)
(Note 6)3.8033.903.998VTA = -40°C to +125°C (Note 2)
MCP13XX-403.9404.004.060VTA = +25°C (Note 1)
(Note 6)3.9004.004.100VTA = -40°C to +125°C (Note 2)
MCP13XX-414.0394.104.162VTA = +25°C (Note 1)
(Note 6)3.9984.104.203VTA = -40°C to +125°C (Note 2)
MCP13XX-424.1374.204.263VTA = +25°C (Note 1)
(Note 6)4.0954.204.305VTA = -40°C to +125°C (Note 2)
MCP13XX-434.2364.304.365VTA = +25°C (Note 1)
(Note 6)4.1934.304.408VTA = -40°C to +125°C (Note 2)
MCP13XX-444.3344.404.466VTA = +25°C (Note 1)
(Note 6)4.2904.404.510VTA = -40°C to +125°C (Note 2)
MCP13XX-454.4334.504.568VTA = +25°C (Note 1)
(Note 6)4.3884.504.613VTA = -40°C to +125°C (Note 2)
MCP13XX-464.5314.604.669VT
4.4854.604.715VT
= +25°C (Note 1)
A
= -40°C to +125°C (Note 2)
A
MCP13XX-474.6304.704.771VTA = +25°C (Note 1)
(Note 6)4.5834.704.818VTA = -40°C to +125°C (Note 2)
V
Trip Point Tempco
DD
T
TPCO
—±40—ppm/°C
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: Hyster ysis is minimum = 1%, maximum = 6% at +25°C.
4: This specification allows this device to be used in PIC
®
microcontroller applications that require the In-Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage
requirements). The total time that the RST
(5.5V) is 100s. Current into the RST
pin can be above the maximum device operational voltage
pin should be limited to 2 mA. It is recommended that the device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information,
refer to Figure 2-35.
5: This parameter is established by characterization and is not 100% tested.
6:Custom ordered voltage trip point; min imum ord er volume requ irement . Informati on avai labl e upo n reque st.
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), T
ParametersSymMinTypMaxUnitsConditions
= -40°C to +125°C.
A
Threshold HysteresisMCP13XX-20V
(Note 3)(Note 6)(Note 6)VTA = -40°C to +85°C
MCP13XX-210.021—0.126VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +85°C
MCP13XX-220.022—0.132VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +85°C
MCP13XX-230.023—0.138VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +85°C
MCP13XX-240.024—0.144VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +85°C
MCP13XX-250.025—0.150VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
MCP13XX-260.026—0.156VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
MCP13XX-270.027—0.162VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
MCP13XX-280.028—0.168VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
MCP13XX-290.029—0.174VT
MCP13XX-300.030—0.180VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
MCP13XX-310.031—0.186VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
MCP13XX-320.032—0.192VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
MCP13XX-330.033—0.198VTA = +25°C (Note 3)
(Note 6)(Note 6)VTA = -40°C to +125°C
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: Hyster ysis is minimum = 1%, maximum = 6% at +25°C.
4: This specification allows this device to be used in PIC
cuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage
requirements). The total time that the RST
(5.5V) is 100s. Current into the RST
ational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information,
refer to Figure 2-35.
5: This parameter is established by characterization and is not 100% tested.
6:Custom ordered voltage trip point; min imum ord er volume requ irement . Informati on avai labl e upo n reque st.
HYS
0.020—0.120VTA = +25°C (Note 3)
= +25°C (Note 3)
A
(Note 6)VTA = -40°C to +125°C
®
microcontroller applications that require the In-Cir-
pin can be above the maximum device operational voltage
pin should be limited to 2 mA. It is recommended that the device oper-
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), T
2: Trip point is ±2.5% from typical value.
3: Hyster ysis is minimum = 1%, maximum = 6% at +25°C.
4: This specification allows this device to be used in PIC
cuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage
requirements). The total time that the RST
(5.5V) is 100s. Current into the RST
ational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information,
refer to Figure 2-35.
5: This parameter is established by characterization and is not 100% tested.
6:Custom ordered voltage trip point; min imum ord er volume requ irement . Informati on avai labl e upo n reque st.
HYS
0.034—0.204VTA = +25°C (Note 3)
= +25°C (Note 3)
A
(Note 6)VT
®
microcontroller applications that require the In-Cir-
pin can be above the maximum device operational voltage
pin should be limited to 2 mA. It is recommended that the device oper-
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), T
2: Trip point is ±2.5% from typical value.
3: Hyster ysis is minimum = 1%, maximum = 6% at +25°C.
4: This specification allows this device to be used in PIC
®
microcontroller applications that require the In-Circuit Serial Programming™ (ICSP™) feature (see device-specific programming specifications for voltage
requirements). The total time that the RST
(5.5V) is 100s. Current into the RST
pin can be above the maximum device operational voltage
pin should be limited to 2 mA. It is recommended that the device operational temperature be maintained between 0°C to +70°C (+25°C preferred). For additional information,
refer to Figure 2-35.
5: This parameter is established by characterization and is not 100% tested.
6:Custom ordered voltage trip point; min imum ord er volume requ irement . Informati on avai labl e upo n reque st.
VDD < 1V is outside the device operating specification. The RST (or RST) output state is
unknown while V
DD
< 1V.
FIGURE 1-1:Device Voltage and Reset Pin Waveforms.
TABLE 1-1:DEVICE VOLTAGE AND RESET PIN TIMINGS
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), T
ParametersSymMinTypMaxUnitsConditions
Falling V
Trip Point Detected
DD
t
RPD
to RST or RST Active
VDD Rise Ratet
Reset active time
(MR
Rising Edge, POR/BOR
t
RST
Inactive, or WDT time out) to RST/
Inactive
RST
RST Rise Time after RST
Active
t
(Push-Pull Outputs only)
RST
Rise Time after RST Inactive
(Push-Pull Outputs only)
RST Fall Time after RST
RST
Fall Time after RST Active —5—µsFor RST 90% to 10% of VDD,
Note 1: These parameters are for design guidance only and are not 100% tested.
Inactive t
2: Custom ordered Reset active time; minimum order volume requirement.
3: Designed to be independent of V
Note 1: The WDI pin was a weak pull-up resistor which is disabled after the 1st falling edge on the WDI pin.
FIGURE 1-2:MR and Reset Pin Waveforms.
MCP131X/2X
TABLE 1-2:MR
AND RESET PIN TIMINGS
Electrical Specifications: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ
(only MCP1320, MCP1321, and MCP1322), TA = -40°C to +125°C.
ParametersSymMinTypMaxUnitsConditions
MR
Pulse Widtht
MR Active to RST/RST Activet
MR
Input Noise filtert
MR
MRD
NF
1— —µs
—235 — nsVDD = 5.0V
—150 — nsVDD = 5.0V
Note 1: These parameters are for design guidance only and are not 100% tested.
FIGURE 1-3:WDI and Reset Pin Waveforms.
TABLE 1-3:WDI AND RESET PIN TIMINGS
Electrical Specifications: Unless otherwise indicated, all limits are specified for V
(only MCP1320, MCP1321, and MCP1322), T
= -40°C to +125°C.
A
ParametersSymMinTypMaxUnitsConditions
WDI Pulse Widtht
Watchdog Time Out Periodt
Note 1: Custom ordered WatchDog Timer time out; minimum order volume requirement.
Note:The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, all limits are specified for VDD = 1V to 5.5V, RPU = 100 kΩ (only MCP1316;
see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-1:IDD vs. Temperature (Reset
Power-up Timer Inactive and Watchdog Timer
Inactive) (MCP1318M-4.6).
FIGURE 2-2:I
vs. Temperature (Reset
DD
Power-up Timer Inactive and Watchdog Timer
Inactive) (MCP1319-2.9).
FIGURE 2-4:I
vs. Temperature (Reset
DD
Power-up Timer Active) (MCP1318M-4.6).
FIGURE 2-5:I
vs. Temperature (Reset
DD
Power-up Timer Active) (MCP1319-2.9).
FIGURE 2-3:I
Power-up Timer Inactive and Watchdog Timer
Inactive) (MCP1316-2.0).
This input allows a push button switch to be directly connected to the MCP131X/2X MR
used to force a system Reset. This input filters (ignores)
noise pulses that occur on the MR pin.
L = Switch is depressed (shorted to ground). This forces
the RST/RST
pins Active.
H = Switch is open (internal pull-up resistor pulls signal
high). State of the RST/RST
other system conditions.
Goes active (High) if one of these conditions occurs:
1.If V
falls below the selected Reset voltage
DD
threshold.
2.If the MR
pin is forced low.
3.If the WDI pin does not detect an edge transition
within the minimum selected time out period.
4.During power-up.
pin, which can then be
pins determined by
4MCP1316,
WDIISTWatchdog Timer Input
MCP1316M,
MCP1317,
MCP1318,
MCP1318M,
MCP1320,
MCP1321
MCP1319,
MR
ISTManual Reset input for a Reset switch.
MCP1319M,
MCP1322
5AllV
DD
—PThe positive supply for the device.
Note 1: Open-Drain output with internal pull-up resistor.
Falling:
V
DD
H = VDD < V
DD
> V
L = V
TRIP
TRIP
VDD Rising:
DD
< V
H = V
L = VDD > V
TRIP
TRIP
+ V
+ V
HYS
HYS
The WDT period is specified at the time of device order.
The Standard WDT period is 1.6s typical.
An edge transition on the WDI pin resets the Watchdog
Timer counter (no time out). A Falling Edge is required to
start the WDT Timer.
This input allows a push button switch to be directly connected to the MCP131X/2X MR
pin, which can then be
used to force a system Reset. This input filters (ignores)
noise pulses that occur on the MR
pin.
L = Switch is depressed (shorted to ground). This forces
the RST/RST
pins Active.
H = Switch is open (internal pull-up resistor pulls signal
high). State of the RST/RST pins determined by
other system conditions.
Some devices have both an active-low and active-high
Reset output.
3.3.1ACTIVE-LOW (RST) - OPEN-DRAIN,
EXTERNAL PULL-UP RESISTOR
The RST open-drain output remains low while VDD is
below the Reset voltage threshold (V
device voltage (VDD) returns to a high level (V
V
), the device will remain in Reset for the Reset
HYS
delay timer (T
). After that time expires, the RST pin
RST
will float, and an external pull-up resistor is required to
bring the output to the high state.
). Once the
TRIP
TRIP
+
3.4Manual Reset Input (MR)
The Manual Reset (MR) input pin allows a push button
switch to easily be connected to the system. When the
push button is depressed, it forces a system Reset.
This pin has circuitry that filters noise that may be
present on the MR
The MR
pin is active-low and has an internal pull-up
signal.
resistor.
3.5Watchdog Input
In some systems, it is desirable to have an external
Watchdog Timer to monitor the operation of the system. This is done by requiring the embedded controller
to “pet” the Watchdog Timer within a predetermined
time frame (T
within this time frame, the MCP131X/2X will force the
Reset pin(s) active.
The embedded controller “pets” the MCP131X/2X by
forcing an edge transition on the WDI pin. The WDT
Timer is activated by the first falling edge on the WDI
pin.
The standard offering devices have a typical Watchdog
Timer period (T
able Watchdog Timer periods.
). If the MCP131X/2X is not “petted”
WD
) of 1.6 s. Table 1-3 shows the avail-
WD
3.3.2ACTIVE-LOW (RST) - OPEN-DRAIN,
INTERNAL PULL-UP RESISTOR
The RST open-drain output remains low while VDD is
below the Reset voltage threshold (V
device voltage (VDD) returns to a high level (V
), the device will remain in Reset for the Reset
V
HYS
delay timer (T
). After that time expires, the RST pin
RST
). Once the
TRIP
TRIP
+
will be pulled high by an internal pull-up resistor (typically 4.7 kΩ).
3.3.3ACTIVE-LOW (RST) - PUSH-PULL
The RST push-pull output remains low while VDD is
below the Reset voltage threshold (V
device voltage (V
), the device will remain in Reset for the Reset
V
HYS
delay timer (T
) returns to a high level (V
DD
). After that time expires, the RST pin
RST
). Once the
TRIP
TRIP
+
will be driven to the high state.
3.3.4ACTIVE-HIGH (RST) - PUSH-PULL
The RST push-pull output remains high while VDD is
below the Reset voltage threshold (V
device voltage (V
MCP1320, MCP1321, or MCP1322 due
to the open-drain output.
Resistor R
PU
may not be required with
the MCP1316M, MCP1318M, or
MCP1319M due to the internal pull-up
resistor.
The MCP1316, MCP1317, MCP1318,
and MCP1319 do not require the
external pull-up resistor.
2: Not all devices offer the active-high
Reset output pin.
0.1
µF
MCP13XX
V
DD
RST
V
SS
RST
(2)
WDI
I/O
To system
device that
requires activehigh resets
Push button
switch
MR
V
DD
Comparator
+
–
Output
Driver
RST
Reference
V
SS
RST
Noise Filter
Watchdog
MR
WDI
Note: Features available depend on the device.
Voltage
4.0OPERATIONAL DESCRIPTION
For many of today’s microcontroller applications, care
must be taken to prevent low-power conditions that can
cause many different system problems. The most
common causes are brown-out conditions, where the
system supply drops below the operating level momentarily. The second most common cause is when a
slowly decaying power supply causes the
microcontroller to begin executing instructions without
sufficient voltage to sustain volatile memory (RAM),
thus producing indeterminate results. Figure 4-1 shows
a typical application circuit.
The MCP131X/2X family is voltage supervisor devices
designed to keep a microcontroller in Reset until the
system voltage has reached and stabilized at the
proper level for reliable system operation. These
devices also operate as protection from brown-out
conditions when the system supply voltage drops
below a safe operating level.
Some MCP131X/2X family members include a Watchdog Timer feature that after being enabled (by a falling
edge on the WDI pin), monitors the WDI pin for falling
edges. If an edge transition is not detected within the
expected timeframe, the MCP131X/2X devices will
force the Reset pin active. This is useful to ensure that
the embedded system’s Host Controller program is
operating as expected.
Some MCP131X/2X family members include a Manual
Reset feature that allows a push button switch to be
directly connected to the MCP131X/2X devices (on the
MR
the external control of the push button switch.
A superset block diagram is shown in Figure 4-2, with
device specific block diagrams shown in Figure 4-3
through Figure 4-12.
pin). This allows the system to easily be reset from
As the device VDD rises, the device’s Reset circuit will
remain active until the voltage rises above the “actual”
trip point (V
) plus the hysteresis (V
TRIP
Figure 4-13 shows a power-up sequence and the
waveform of the RST and RST
pins.
As the device powers up, the voltage will start below
the valid operating voltage of the device. At this voltage, the Reset output value is not valid. Once the voltage is above the minimum operating voltage (1V) and
below the selected V
, the Reset output will be
TRIP
active.
Once the device voltage rises above the “actual” trip
point (V
timer (t
) plus the hysteresis (V
TRIP
) starts. When the Reset delay timer times
RST
HYS
out, the Reset output (RST/RST) is driven inactive.
Note:While the Reset delay timer (t
active, additional system current is consumed.
).
HYS
), the Reset delay
) is
RST
4.1.2POWER-DOWN/BROWN-OUTS
As the device powers-down/brown-outs, the voltage
) falls from a voltage above the devices trip point
(V
DD
(V
). The devices “actual” trip point voltage (V
TRIP
will be between the minimum trip point (V
the maximum trip point (V
TRIPMAX
). Once the device
TRIPMIN
TRIP
) and
voltage (VDD) goes below this voltage, the Reset pin(s)
will be forced to the active state. There is a hysteresis
on this trip point. This is so that noise on the device voltage (V
) does not cause the Reset pin (RST/RST) to
DD
“jitter” (change between driving an active and inactive).
Figure 4-14 shows the waveform of the RST
pin as
determined by the VDD voltage, while Table 4-1 shows
the state of the RST pin.
4.1.2.1Operation of RST pin with Internal
Pull-Up Resistor
Note:Only the MCP1316M, MCP1318M, and
MCP1319M devices have an open-drain
RST output pin with an internal pull-up
resistor.
The internal pull-up resistor has a typical value of
4.7 kΩ. The internal pull-up eliminates the need for an
external resistor.
To reduce the current consumption of the device, when
the RST
The Reset delay timer ensures that the MCP131X/2X
device will “hold” the embedded system in Reset until
the system voltage has stabilized. There are several
time-out options to better meet the requirements of
different applications. These Reset delay timer time
outs are shown in Table 4-2. The S tandard offering time
out is typically 200 ms.
The Reset delay timer (t
age rises above the “actual” trip point (V
hysteresis (V
). When the Reset delay timer times
HYS
out, the Reset output pin (RST/RST
Note:While the Reset delay timer (t
) starts after the device volt-
RST
TRIP
) plus the
) is driven inactive.
RST
) is
active, additional system current is consumed.
TABLE 4-2:RESET DELAY TIMER
TIME OUTS
t
RST
(1)
Units
MinTypMax
1.01.42.0ms
203040ms
140200280ms
11201.62.24sec
↑↑
This is the minimum time that the
Reset delay timer
will “hold” the
Reset pin active
after VDD rises
above
+ V
V
TRIP
HYS
This is the maxi-
mum time that the
Reset delay timer
will “hold” the
Reset pin active
DD
rises
after V
above
+ V
V
TRIP
HYS
Note 1: Shaded rows are custom ordered time
outs.
Figure 4-15 illustrates when the Reset delay timer
(t
) is active or inactive.
RST
FIGURE 4-15:Reset Power-up Timer
Waveform.
4.2.1EFFECT OF TEMPERATURE ON
RESET POWER-UP TIMER (T
The Reset delay timer time out period (t
determines how long the device remains in the Reset
condition. This time out is affected by both the device
and temperature. Typical responses for different
V
DD
VDD values and temperatures are shown in Figures 233, 2-32 and 2-31.
The MR input typically ignores input pulses
of 100 ns.
4.3Negative Going VDD Transients
The minimum pulse width (time) required to cause a
Reset may be an important criteria in the implementation of a Power-on Reset (POR) circuit. This time is
referred to as transient duration. The MCP131X/2X
devices are designed to reject a level of negative-going
transients (glitches) on the power supply line.
Transient duration is the amount of time needed for
these supervisory devices to respond to a drop in V
The transient duration time (t
magnitude of V
– VDD (overdrive). Any combination
TRIP
) is dependant on the
TRAN
of duration and overdrive that lies under the durati on/
overdrive curve will not generate a Reset signal. Generally speaking, the transient duration time decreases
with and increases in the V
– VDD voltage. Combi-
TRIP
nations of duration and overdrive that lies above the
duration/overdrive curve are detected as a brown-out
or power-down condition.
Figure 4-16 shows a typical transient duration vs.
Reset comparator overdrive, for which the MCP131X/
2X will not generate a Reset pulse. It shows that the farther below the trip point the transient pulse goes, the
duration of the pulse required to cause a Reset gets
shorter. Figure 4-16 shows the transient response
characteristics for the MCP131X/2X.
Transient immunity can be improved by adding a
bypass capacitor (typically 0.1 µF) as close as possible
to the V
pin of the MCP131X/2X device.
DD
DD
4.4Manual Reset Input
The Manual Reset input pin (MR) allows the Reset pins
(RST/RST
The MR pin has circuitry to filter noise pulses that may
be present on the pin. Figure 4-17 shows a block dia-
gram for using the MCP131X/2X with a push button
switch. To minimize the required external components,
the MR
.
A mechanical push button or active logic signal can
drive the MR
Once MR
Reset delay time), the Reset output pins are forced
active. The Reset output pins will remain in their active
states for the Reset delay timer timeout period (t
Figure 4-18 shows a waveform for the Manual Reset
switch input and the Reset pins output.
) to be manually forced to their active states.
input has an internal pull-up resistor.
input.
has been low for a time, t
(the Manual
MRD
RST
)
FIGURE 4-16:Example of Typical
Transient Duration Waveform.
The noise filter filters out noise spikes (glitches) on the
Manual Reset pin (MR
(typical) are filtered.
). Noise spikes less than 100 ns
MCP131X/2X
V
CC
GND
RST
WDI
MCLR
+5V
MCP13XX
0.1
10 kΩ
I/O
PIC
®
3-Terminal
Regulator
+5V
µF
MCU
(example:
MCP1700)
4.5Watchdog Timer
The purpose of the Watchdog Timer (WDT) is to
Figure 4-19 shows a block diagram for using the
MCP131X/2X with a PIC
®
microcontroller (MCU) and
the Watchdog input.
increase system reliability. The Watchdog Timer feature can be used to detect when the Host Controller ’s
program flow is not as expected. The Watchdog Timer
monitors for activity on the Watchdog Input pin (WDI).
The WDI pin is expected to be strobed within a given
time frame. When this time frame is exceeded, without
an edge transition on the WDI pin, the Reset pin is
driven active to reset the system. This stops the Host
Controller from continuing its erratic behavior (“runaway” code execution).
The Watchdog Timer is external to the main portion of
the control system and monitors the operation of the
system. This feature is enabled by a falling edge on the
WDI pin (after device POR). Monitoring is then done by
requiring the embedded controller to force an edge
transition (falling or rising) on the WDI pin (“pet the
Watchdog”) within a predetermined time frame (T
WD
If the MCP131X/2X does not detect an edge on the
WDI pin within the expected time frame, the MCP131X/
2X device will force the Reset pin active.
The Watchdog Timer is in the disabled state when:
• The Device Powers up
• A POR event occurred
• A WDT event occurred
• A Manual Reset (MR
) event occurred
When the Watchdog Timer is in the disabled state, the
).
TABLE 4-3:WATCHDOG TIMER
PERIODS
t
WDT
(1)
Units
MinTypMax
4.36.39.3ms
71102153ms
1.121.62.4sec
17.925.638.4sec
↑↑
If the time between
WDI edges is less
than this, it
ensures that the
MCP131X/2X
never forces a
reset
If the time
between WDI
edges is greater
than this, it
ensures that the
MCP131X/2X
always forces a
reset
Note 1: Shaded rows are custom ordered Watch-
dog Timer Periods (t
) time outs. For
WDT
information on ordering devices with
these t
time outs, please contact your
WDT
local Microchip sales office. Minimum
purchase volumes are required.
WDI pin has an internal smart pull-up resistor enabled.
This pull-up resistor has a typical value of 52 kΩ. This
pull-up resistor holds the WDI signal in the high state,
until it is forced to another state.
After the embedded controller has initialized, if the
Watchdog Timer feature is to be used, then the embedded controller can force the WDI pin low (V
). This also
IL
enables the Watchdog Timer feature and disables the
WDI pull-up resistor. Disabling the pull-up resistor
reduces the device’s current consumption. The pull-up
resistor will remain disconnected until the device has a
power-on, a Reset event occurs, or after the WDT time
out.
Once the Watchdog Timer has been enabled, the Host
Contoller must force an edge transition (falling or rising)
on the WDI pin before the minimum Watchdog Timer
time out to ensure that the Watchdog Timer does not
force the Reset pins (RST/RST
) to the active state.
If an edge transition does not occur before the maximum time out occurs, then the MCP131X/2X will force
the Reset pins to their active state.
The MCP131X/2X supports four time outs. The stan-
FIGURE 4-19:Watchdog Timer.
The software routine that strobes WDI is critical. The
code must be in a section of software that is executed
frequently enough so the time between edge transitions is less than the Watchdog time out period. One
common technique controls the Host Controllers I/O
line from two sections of the program. The software
might set the I/O line high while operating in the Foreground mode and set it low while in the Background or
Interrupt modes. If both modes do not execute correctly, the Watchdog Timer issues reset pulses.
dard offering devices have a typical Watchdog Timer
period (T
Watchdog Timer periods. The t
function of the device voltage and temperature.
This section shows application related information that
may be useful for your particular design requirements.
5.1Supply Monitor Noise Sensitivity
The MCP131X/2X devices are optimized for fast
response to negative-going changes in V
with an inordinate amount of electrical noise on V
(such as systems using relays) may require a 0.01 µF
or 0.1 µF bypass capacitor to reduce detection sensitivity. This capacitor should be installed as close to the
MCP131X/2X as possible to keep the capacitor lead
length short.
FIGURE 5-1:Typical Application Circuit
with Bypass Capacitor.
. Systems
DD
DD
5.3Using in PIC® Microcontroller,
ICSP™ Applications
Note:This operation can only be done using the
device with the Open-Drain RST
(MCP1320, MCP1321, and MCP1322).
Devices that have the internal pull-up
resistor are not recommended due to the
current path of the internal pull-up resistor.
Figure 5-4 shows the typical application circuit for using
the MCP132X for voltage superviory function when the
PIC microcontroller will be programmed via the In-Circuit Serial Programming™ (ICSP™) feature. Additional
information is available in TB087, “Using Voltage
Supervisors with PIC
Implement In-Circuit Serial Programming™”,
Although the MCP131X/2X device has a fixed voltage
trip point (V
), it is sometimes necessary to make
TRIP
custom adjustments. This can be accomplished by
connecting an external resistor divider to the
MCP131X/2X V
pin. This causes the V
DD
SOURCE
voltage to be at a higher voltage than when the MCP131X/
2X input equals its V
voltage (Figure 5-5).
TRIP
To maintain detector accuracy, the bleeder current
through the divider should be significantly higher than
the 10 µA maximum operating current required by the
MCP131X/2X. A reasonable value for this bleeder
current is 1 mA (100 times the 10 µA required by the
MCP131X/2X). For example, if V
desired trip point is 2.5V , the value of R
= 2V and the
TRIP
+ R2 is 2.5 kΩ
1
(2.5V/1 mA). The value of R1 + R2 can be rounded to
the nearest standard value and plugged into the equation of Figure 5-5 to calculate values for R
and R2. 1%
1
tolerance resistors are recommended.
5.5MOSFET Low-Drive Protection
Low operating power and small physical size make the
MCP131X/2X series ideal for many voltage detector
applications. Figure 5-6 shows a low-voltage gate drive
protection circuit that prevents overheating of the logiclevel MOSFET due to insufficient gate voltage. When
the input signal is below the threshold of the MCP131X/
2X, its output grounds the gate of the MOSFET.
FIGURE 5-6:MOSFET Low-Drive
Protection.
5.6Low-Power Applications
FIGURE 5-5:Modify Trip-Point using
External Resistor Divider.
In some low-power applications, the longer that the
microcontroller (such as a PIC MCU) can be in the
“Sleep mode”, the lower the average system current
consumption will be.
The WDT feature can be used to “wake-up” the PIC MCU
at a regular interval to service the required tasks before
returning to sleep. This “wake-up” occurs after the PIC
MCU detects a MCLR
reset during Sleep mode (for mid-
range family; POR = ‘1’, BOR = ‘1’, TO = ‘1’, and PD = ‘1’).
MCP131X/2X
MCP13XX
V
DD
RST
GND
MCLR
GND
Buffered Reset
To Other System
Components
MCU
4.7 kΩ
Buffer
PIC
®
MCP13XX
V
DD
V
DD
R
1
100 kΩ
RST
GND
5.7Controllers and Processors With
Bidirectional I/O Pins
Some microcontrollers have bidirectional Reset pins.
Depending on the current drive capability of the controller pin, an indeterminate logic level may result if there
is a logic conflict. This can be avoided by adding a
4.7 kΩ resistor in series with the output of the
MCP131X/2X (Figure 5-7). If there are other components in the system that require a Reset signal, they
should be buffered so as not to load the Reset line. If
the other components are required to follow the Reset
I/O of the microcontroller, the buffer should be connected as shown with the solid line.
5.8RESET Signal Integrity During
Power-Down
The MCP131X/2X Reset output is valid to VDD = 1.0V.
Below this 1.0V, the output becomes an "open circuit"
and does not sink or source current. This means
CMOS logic inputs to the microcontroller will be floating
at an undetermined voltage. Most digital systems are
completely shut down well above this voltage.
However, in situations where the Reset signal must be
maintained valid to V
required.
For devices where the Reset signal is active-low, a pulldown resistor must be connected from the MCP131X/
2X Reset pin(s) to ground to discharge stray capacitances and hold the output low (Figure 5-8).
Similarly for devices where the Reset signal is activehigh, a pull-up resistor to V
valid high Reset signal for V
This resistor value, though not critical, should be
chosen such that it does not appreciably load the Reset
pin(s) under normal operation (100 kΩ will be suitable
for most applications).
= 0V, external circuitry is
DD
is required to ensure a
DD
below 1.0V.
DD
FIGURE 5-7:Interfacing the MCP131X/
2X Push-Pull outputs to a Bidirectional Reset I/O.
FIGURE 5-8:Ensuring a valid active-low
Reset pin output state as V
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NNNAlphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ()
can be found on the outer packaging for this package.
Note:In the event the full Microchip part number cannot be marked on one line, it will
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Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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