Microchip ATSAMA5D2-ICP User Manual

ATSAMA5D2-ICP

SAMA5D2 Industrial Connectivity Platform (ICP) User's

Guide

Scope

This user’s guide describes how to use the SAMA5D2 Industrial Connectivity Platform (SAMA5D2-ICP) kit.

The SAMA5D2-ICP is a hardware and software platform that demonstrates the rich wired and wireless connectivity
solutions around Microchip's SAMA5D2 Arm Cortex-A based microprocessors. It offers customers a starting point for
their applications that include either EtherCAT, Ethernet 10/100 and 10/100/1000, CAN, Wi-Fi®, Bluetooth® or USB
communications, or any combination of these. The board also features three mikroBUS™ click interface headers to
support over 450 MikroElektronika Click boards™.

Figure 1. SAMA5D2-ICP Board

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 1

ATSAMA5D2-ICP

Table of Contents

Scope............................................................................................................................................................. 1

1. Introduction............................................................................................................................................. 3

1.1. Document Layout......................................................................................................................... 3

1.2. Reference Documents..................................................................................................................3

2. Product Overview....................................................................................................................................4

2.1. SAMA5D2-ICP Features.............................................................................................................. 4

2.2. SAMA5D2-ICP Kit Content...........................................................................................................5

2.3. Evaluation Kit Specifications........................................................................................................ 5

2.4. Power Sources............................................................................................................................. 5

3. Board Components................................................................................................................................. 6

3.1. Board Overview............................................................................................................................6

3.2. Function Blocks............................................................................................................................ 8

3.3. External Interfaces..................................................................................................................... 43

3.4. Debugging Capability................................................................................................................. 45

3.5. PIO Usage on Expansion Connectors........................................................................................50

4. Board Layout.........................................................................................................................................55

5. Installation and Operation..................................................................................................................... 57

5.1. System and Configuration Requirements...................................................................................57

5.2. Board Setup............................................................................................................................... 57

6. Revision History.................................................................................................................................... 58

6.1. Rev. A - 02/2020.........................................................................................................................58

The Microchip Website.................................................................................................................................59

Product Change Notification Service............................................................................................................59

Customer Support........................................................................................................................................ 59

Product Identification System.......................................................................................................................60

Microchip Devices Code Protection Feature................................................................................................ 60

Legal Notice................................................................................................................................................. 60

Trademarks.................................................................................................................................................. 60

Quality Management System....................................................................................................................... 61

Worldwide Sales and Service.......................................................................................................................62

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 2

1. Introduction

1.1 Document Layout

The document is organized as follows:

• Introduction

• Product Overview—Important information about the kit

• Board Components—Kit specifications and high-level description of the major components and interfaces

• Board Layout—Drawings

• Installation and Operation—Information on requirements and setup

1.2 Reference Documents

The following reference data sheets are available on www.microchip.com:

Table 1-1. SAMA5D2-ICP Component Data Sheets

Document Title Available Document Ref.

ATSAMA5D2-ICP

Introduction

SAMA5D2 Series https://www.microchip.com/ATSAMA5D27 DS60001476

MCP16502 https://www.microchip.com/MCP16502 DS20006275

PAC1932/3/4 https://www.microchip.com/PAC1934 DS20005850

SST26VF064B/SST26VF064BA https://www.microchip.com/

SST26VF064B

24AA02E48/24AA025E48/24AA02E64/24AA025E64 https://www.microchip.com/24AA025E48 DS20002124

MCP2542FD/4FD, MCP2542WFD/4WFD https://www.microchip.com/MCP2542FD DS20005514

USB2534 https://www.microchip.com/USB2534 DS00001713

MIC2026/2076 https://www.microchip.com/MIC2026 M9999-060410-B

LAN7850 https://www.microchip.com/LAN7850 DS00001993

KSZ8563R https://www.microchip.com/KSZ8563 DS00002418

LAN9252 https://www.microchip.com/LAN9252 DS00001909

24AA512/24LC512/24FC512 https://www.microchip.com/24FC512 DS21754

ATWILC3000-MR110CA https://www.microchip.com/ATWILC3000 DS70005327

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C https://www.microchip.com/93AA66A DS21795

ATECC608A https://www.microchip.com/ATECC608A DS40001977

DS20005119

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 3

2. Product Overview

The SAMA5D2 Industrial Connectivity Platform (SAMA5D2-ICP) provides a versatile Total System Solutions platform
that highlights Microchip’s MPU and connectivity ICs for industrial networking applications.

The board features three mikroBUS click interface headers to support over 450 MikroElektronika Click boards and
provisions to solder a Microchip ATWILC3000-MR110CA or a ATWILC3000-MR110UA WiFi/BT module.

2.1 SAMA5D2-ICP Features

Table 2-1. SAMA5D2-ICP Features

Characteristics Specifications Components

ATSAMA5D2-ICP

Product Overview

Processor

External Clocks

Memory

SD/MMC One standard SD card interface SD card connector

USB

CAN Two CAN interfaces Microchip MCP2542FDT

Ethernet

Wi-Fi/BT

Debug port

SAMA5D27-CU (289-ball BGA), 14x14 mm body, 0.8 mm
pitch

MPU: 12 MHz, 32.768 kHz

Misc osc: 12, 24, 25 MHz

Two 16-bit, 2-Gbit DDR3L (total of 512 Mbytes)

One QSPI Flash

Three EEPROMs

One USB host switch 4 ports with power switch

One USB device type Micro-AB

One Gigabit Ethernet PHY through HSIC

One ETH switchport

One EtherCAT interface

Footprint for IEEE® 802.11 b/g/n Wi-Fi plus Bluetooth
Module (Wi-Fi/BT), suitable for Microchip WILC3000­MR110CA or WILC3000-MR110UA

One J-Link-OB/J-Link-CDC

One JTAG interface

_

Oscillators and optional crystal

Winbond® W632GU6MB

Microchip SST26VF064B

Microchip 24AA025E48

Microchip USB2534

Microchip LAN7850T-I/8JX

Microchip KSZ8563RNXI

Microchip LAN9252I/ML

–

Embedded J-Link-OB and J-Link­CDC (ATSAM3U4C TFBGA100)

One RGB (Red, Green, Blue) LED

Board monitor

Expansion

Power management

Board supply From J16 and from external connector

Power saving SuperCap 220 mF@3.3V

© 2020 Microchip Technology Inc.

DisableBoot, Reset, WakeUp, 2 x User Free push button
switches

One PIOBU/PIO connector

Three mikroBUS sockets

One PMIC

One power consumption measurement device

User Guide

Common anode RGB LED

5 push button switches

–

–

Microchip MCP16502

Microchip PAC1934

µUSB and 2.1mm/5.5mm jack
connector

DS60001592A-page 4

2.2 SAMA5D2-ICP Kit Content

The SAMA5D2-ICP kit includes the following:

• one SAMA5D2-ICP board

• one USB male A to USB male Micro-B cable

2.3 Evaluation Kit Specifications

Table 2-2. Evaluation Kit Specifications

Characteristic Specification

Board SAMA5D2-ICP

Board supply voltage External and USB-powered

ATSAMA5D2-ICP

Product Overview

Temperature

Relative humidity 0 to 90% (non-condensing)

Main board dimensions 150 × 100 × 20 mm

RoHS status Compliant

Board identification SAMA5D2-ICP Industrial Connectivity Platform

2.4 Power Sources

Two options are available to power up the SAMA5D2-ICP board:

• Through an external AC to DC +5V wall adapter connector (J1 – default configuration)

• Through the USB Micro-AB connector on the J-Link-OB Embedded Debugger interface (J16)

Table 2-3. Electrical Characteristics

Operating: 0°C to +70°C
Storage: –40°C to +85°C

Electrical Parameter Value

Input voltage 5VCC

Maximum input voltage (limits) 6VCC

Maximum DC 3.3V current available 1.2A

I/O voltage 3.3V only

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 5

3. Board Components

This section covers the specifications of the SAMA5D2-ICP and provides a high-level description of the board’s major
components and interfaces. This document is not intended to provide a detailed documentation about the processor
or about any other component used on the board. For detailed device documentation, refer to Reference Documents.

3.1 Board Overview

The fully-featured SAMA5D2-ICP board integrates multiple peripherals and interface connectors as shown in the
figure below. J2, indicated in red below, offers current measurement connectivity. J19 and J20, indicated in blue, are
configuration items.

Figure 3-1. Board Overview

ATSAMA5D2-ICP

Board Components

3.1.1 Default Jumper Settings

The following table shows the default jumper settings.

Table 3-1. SAMA5D2-ICP Jumper Settings

Jumper Default Function

J2 Closed VDDBU current measurement

J17 Open

J19 Open Enables JTAG-OB (closed=disables JTAG-OB)

J20 Open Enables JTAG-CDC (closed=disables JTAG-CDC)

© 2020 Microchip Technology Inc.

Erases SAM3U firmware (not populated, reserved for factory configuration, should never be
used by the end user).

User Guide

DS60001592A-page 6

3.1.2 On-Board Connectors

The following table describes the interface connectors on the SAMA5D2-ICP.

Table 3-2. SAMA5D2-ICP Board Interface Connectors

Connector Interfaces to Connector Interfaces to

J1 External power jack J14 EtherCAT RJ45 port B

ATSAMA5D2-ICP

Board Components

J3 PMIC Vout4 J15

J4

J5 Standard SDMMC connector J18 JTAG, 10-pin IDC connector

J6 Dual CAN J21 mikroBUS1 connector

J7 Stacked USB type B (USB hub) J22 mikroBUS2 connector

J8 Stacked USB type B (USB hub) J23 mikroBUS3 connector

J9 USB Micro-AB (USB-A) J24 Tampers and PIOs

J10 Ethernet 10/100/1000 RJ45 (HSIC) J25 WILC3000 UART debug

J11 Ethernet 10/100 RJ45 (Etherswitch Port1) J26 WILC3000 user-free GPIOs

J12 Ethernet 10/100 RJ45 (Etherswitch Port2) J27 ETH switch user-free GPIOs

J13 EtherCAT RJ45 port A –

Used for one-time programming of the
EtherCAT EEPROM

J16 USB Micro-AB J-Link-OB/J-Link-CDC

PCB connector for factory-programming
the J-Link-OB

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 7

3.2 Function Blocks

Memory interface

Power generation

Power M easurement

Clock

Module Wifi

DEBUG connectors

User Interface

EtherCAT

USB Host switch

Dual Ethernet port switch

HSIC to Gigabit ETH

MikroBUS

ATSAMA5D27C-CU

5V input

USB µAB Device

to 4 port USB

QSPI Serial Flash

Serial EEPROM

2x16bit 2Gb DDR3L

SDMMC

Wi-Fi Module

Figure 3-2. SAMA5D2-ICP Block Diagram

ATSAMA5D2-ICP

Board Components

3.2.1 Power Supply Topology and Power Distribution

3.2.1.1 Input Power Options

Two options are available to power up the SAMA5D2-ICP board:

1. an external AC to DC +5V wall adapter connected via a 2.1 mm center-positive plug into the board’s power
jack (J1). The recommended output voltage of the power adapter is 5V at 2A.

2. the USB J-Link-OB port (J16)

The +5V from the wall adapter is protected through an NCP349 positive overvoltage controller switch. The controller
is able to disconnect the system from its output pin when incorrect input operating conditions are detected (5.83V
max).

The USB-powered operation comes from the USB J-Link-OB port connected to a PC or a 5V DC supply. The USB
supply is sufficient to power the board in most applications. It is important to note that when the USB supply is used,
the USB port has limited power. If the USB host port is required for the application, it is recommended to use the
external DC supply.

The red D3 ON LED indicates the presence of a 5V power supply from the wall adapter or from USB.

The figure below shows the input power supply topology.

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 8

2.1mm

2

3

1

J1

10k

R12

100k
0402

R13

GND

1uF
16V
0603

C1

GND

0.1uF
16V

C6

0.1uF
16V
0402

C19

GND

100k
0402

R11

0.1uF
16V
0402

C4

GND

VBUS_JLINK

VDD_MAIN_5V

GND

IN

1

IN_PAD

7

EN

6

GND

2

FLAG

3

OUT2

5

OUT1

4

NCP349MNAETBG

U1

GND

RED

D3

2.2k

R14

220uF
10V
AL-D8

C290

GND

2

71
6

Q1A

SIA923AEDJ-T1-GE3

5

8 4
3

Q1B

SIA923AEDJ-T1-GE3

2

71
6

Q2A

SIA923AEDJ-T1-GE3

5

8 4
3

Q2B

SIA923AEDJ-T1-GE3

180R

FB26

Earth USB GND

VBUS_JLINK

ID

4

VBUS

1

GND

5

D-

2

D+

3

0

0475890001

J16

USB MicroAB

USBD_JLINK_P

USBD_JLINK_N

ATSAMA5D2-ICP

Board Components

Figure 3-3. Input Powering

USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for any project
that requires only a 5V source at up to 500 mA.

Figure 3-4. Power Supply Connector and USB J-Link-OB Port Location

3.2.1.2 Power Supply Requirements and Restrictions

Detailed information on the device power supplies is provided in tables “SAMA5D2 Power Supplies” and “Power
Supply Connections” in the SAMA5D2 Series data sheet.

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 9

3.2.1.3 Power-Up and Power-Down Considerations

Power-up and power-down considerations are described in section “Power Considerations” in the SAMA5D2 Series
data sheet.

3.2.1.4 Power Management

The board power management uses a Microchip PMIC, MCP16502. This is a complete, cost-effective and highly­efficient power management solution, optimized to provide a single-chip power solution and voltage sequencing for
Microchip’s MPU series.

The MCP16502AA features:

• Four DC-DC buck regulators. Each buck channel can support loads up to 1A. Each DC-DC regulator is

optimized for its target load, namely:

– Buck 1: 3.3V for I/Os and other analog loads
– Buck 2: 1.35V for DDR3L voltage
– Buck 3: 1.25V for core voltage
– Buck 4 is unused for this application, can be accessed by users via J3 connector.

• Two 300 mA LDOs, 2.5V for VDDFUSE and 3.3V for RGB LEDs

• Support of Hibernate, Low-Power and High-Performance modes

• Interrupt flag, control PIOs and I2C interface

The default power channel sequencing is built-in, according to the requirements of the MPU. A dedicated pin (LPM)
facilitates the transition to Low-Power modes. The MCP16502 features a low no-load operational quiescent current
and draws less than 10 µA in full shutdown. Active discharge resistors are provided on each output. All buck
channels support safe start-up into pre-biased outputs.

ATSAMA5D2-ICP

Board Components

3.2.1.4.1 Configuration

Buck 2 default voltage is selected by means of the hardwired SELV2 pin and cannot be changed on-the-fly during
operation (high-Z 1.35V DDR3L).

LDO1 default voltage is selected by means of the hardwired SELVL1 pin and cannot be changed on-the-fly during
operation (high-Z 2.5V VDDFUSE).

3.2.1.4.2 Interfacing Signals

The MCP16502 is interfaced to the host MPU by means of the following signals:

• nSTRTO (open-drain output)

• nRSTO (open-drain output)

• nINTO (open-drain output)

• PWRHLD (input)

• LPM (input) and HPM (input)

• SDA and SCL (I2C interface pins)

Note:  The MCP16502 is a slave-only device without clock stretching capability. Therefore, the SCL pin is an input
only.

3.2.1.4.3 nSTRT, nSTRTO, PWRHLD Functionality

The nSTRT (push button input) serves as an external initialization input to the PMIC. nSTRT is internally pulled up to
SVIN and monitored. When the nSTRT is pulled/detected LOW (SW3 pressed), the MCP16502 initiates the turn-on
sequence.

The nSTRTO signal is asserted LOW whenever the nSTRT is detected to be LOW, and it is high-Z otherwise
(nSTRTO has an external pull-up resistor).

While nSTRT is LOW during the power-up sequence, the MCP16502 expects the assertion of the PWRHLD signal
(power-hold) from the MPU to continue the sequence.

PWRHLD may be already HIGH in a typical application using a backup supply. If PWRHLD has NOT been asserted
HIGH by the MPU before completion of the start-up sequence (i.e., when nRSTO is asserted high), the MCP16502
automatically initiates a turn-off sequence.

After the assertion of PWRHLD, nSTRT should be released before the long-press time-out timer expires.

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 10

During run time (PWRHLD=HIGH), the nSTRT (thus nSTRTO) can be asserted LOW again. No automatic action is
taken by the MCP16502 in this case unless the push button interrupt assertion time-out delay expires without any
action from the MPU.

3.2.1.4.4 nSTRT / PWRHLD Typical Use Cases

The MPU can assert the PWRHLD pin via the SHDN command (which is a VDDBU-powered I/O) to shut down all
regulators and enter Backup mode. All regulators are also shut down by the action of the SHDN signal. NRST is
asserted low.

Depending on the presence of a backup supply (supercap populated) and by action on the wakeup signal connected
at nSTRT (SW1 push button), the MCP16502 initiates a turn-on sequence.

3.2.1.4.5 PWRHLD, LPM, HPM and Power States Definitions

PWRHLD, LPM and HPM define different power states.

Other logic combinations of PWRHLD, LPM and HPM (after HPM unmasking) are forbidden.

The initial state is the OFF state (shutdown).

Table 3-3. PMIC Power States for Configurations of PWRHLD, LPM and HPM

PWRHLD LPM HPM Buck1 Buck2 Buck3 Buck4 LDO1 LDO2 nRSTO Power State

0 0 0 OFF OFF OFF OFF OFF OFF LOW OFF

0 1 0 OFF

ON

Auto PFM

OFF OFF OFF OFF LOW HIBERNATE

ATSAMA5D2-ICP

Board Components

1 1 0

1 0 0

1 0 1

ON

Auto PFMONAuto PFMONAuto PFM

ON

FPWMONFPWMONFPWMONFPWM

ON

FPWMONFPWMONFPWMONFPWM

3.2.1.4.6 I2C Interface Description

The figure below depicts MCP16502 power management.

ON

Auto PFM

OFF

Low-Power mode 1 (default Low-Power

mode)

ON OFF High-Z

Low-Power mode 2 (achieved through I2C

programming)

ON OFF High-Z Active

ON OFF High-Z High-Performance Active

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 11

Figure 3-5. Board Power Management

GND

GND

GND

GND

GND

4.7uF
10V
0402

C11

4.7uF
10V
0402

C13

4.7uF
10V
0402

C15

4.7uF
10V
0402

C17

2.2uF
10V
0402

C3

2.2uF
10V
0402

C8

2.2uF
10V
0402

C9

2.2uF
10V
0402

C10

GND

VDD_MAIN_5V

VDD_MAIN_5V

VDD_MAIN_5V

VDD_MAIN_5V

VDD_MAIN_5V

GND

VDD_MAIN_5V

PC28_MCP16502

PC29_MCP16502

0R
0402

R10

DNP

VDD_MAIN_5V

GND

0R
0402

R8

DNP

VDD_MAIN_5V

PC31

PB18

10kR110k

R2

3V3

3V3

WAKE_UP

NRST

180R

FB3

180R

FB4

180R

FB5

180R

FB6

VDDIOP1

VDDIOP0

VDDIOP2

VDDISC

180R

FB7

180R

FB8

180R

FB9

2.2R

R20

2.2R

R21

VDDANA

VDDAUDIOPLL

VDDUTMII

VDDOSC

VDDSDHC

180R

FB1

180R

FB2

2.2R

R19

VDDHSIC

VDDUTMIC

VDDPLLA

1V35

1V25

Vout4

VDD_LED

VDDIODDR

VDDCORE

SENSE1_P

SENSE2_P

SENSE3_P

SENSE4_P

SENSE1_N

SENSE2_N

SENSE3_N

SENSE4_N

SHDN

NSTART

1k

R6

4.7uF
10V
0402

C23

GND

0.1uF
16V
0402

C26

0.1uF
16V
0402

C25

DDR_REF

2.2k
1%

R25

2.2k
1%

R26

LVIN

20

LOUT1

19

LOUT2

21

nINTO

1

PGND2

13

SW2

14

PGND1

12

SW1

11

PVIN1

10

PVIN2

15

EP

33

OUT1

9

OUT2

16

PGND4

29

SW4

30

PGND3

28

SW3

27

PVIN3

26

PVIN4

31

OUT3

25

OUT4

32

nRSTO

2

SGND

3

SVIN

4

SDA

5

SCL

6

nSTRTO

7

PWRHLD

8

LPM

22

HPM

23

nSTRT

24

SELVL1

18

SELV2

17

U2

MCP16502AA

10uH

L6

0.1uF
16V
0402

C2

GND

10uH

L7

10uH

L5

1 2

HDR-2.54 Male 1x2

J3

DNP

GND

0R
0402

R9

DNP

0R
0402

R7

DNP

1 2

3

4

0.01R
12061%

R15

1 2

3

4

0.01R
12061%

R16

1 2

3

4

0.01R
12061%

R17

1 2

3

4

0.01R
12061%

R18

22uF
10V
0805

C12

22uF
10V
0805

C14

22uF
10V
0805

C16

22uF
10V
0805

C18

1.5uH

VLS3012HBX-1R5M

L1

1.5uH

VLS3012HBX-1R5M

L2

1.5uH

VLS3012HBX-1R5M

L3

1.5uH

VLS3012HBX-1R5M

L4

VDDFUSE

PIOBU7

100k
0402
1%

R72

10k

R256

VDDBU

3

1

2

BSS138

Q6

GND

VDD_MAIN_5V

ATSAMA5D2-ICP

Board Components

DS60001592A-page 12

The MCP16502 is a Fast mode Plus device, supporting data transfers at up to 1 Mbit/s as described in the I2C Bus
specification. The MCP16502 is a slave-only device without clock stretching capability. The MCP16502 assumes that
the I2C logic levels on the bus are generated by a device operating from a nominal supply voltage of 3.3V (with ±10%
tolerance). This is typically the I/O voltage generated by Buck1 (VDDIO). Therefore, VIH and VIL are not related to
the SVIN voltage value. The SDA and SCL lines should not be pulled up to the MCP16502 SVIN voltage, but to the
I2C master interface supply voltage (3.3V nominal). The MCP16502 I2C interface is always accessible, even in the
OFF state, as long as the SVIN pin is powered. In the OFF state, the VDDIO voltage from Buck1 is turned off and
therefore the I2C pullup rail must be provided externally.

For more information, refer to the PMIC MCP16502 data sheet.

© 2020 Microchip Technology Inc.

User Guide

Table 3-4. PMIC Signal Descriptions

2.2uF
10V
0402

C20

0.1uF
16V
0402

C21

2.2uF
10V
0402

C22

0.1uF
16V
0402

C24

GND

GND GND

VDD_MAIN_5V3V3

10k

R23

10k

R24

PB17

PC28_PAC1934

PC29_PAC1934

SENSE2+

A1

SENSE1-

A2

SENSE1+

A3

VDD

A4

SENSE2-

B1

VDD I/O

B2

PWRDN

B3

GND

B4

SENSE3-

C1

ADDRSEL

C2

SLOW/ALERT

C3

SM_CLK

C4

SENSE3+

D1

SENSE4-

D2

SENSE4+

D3

SM_DATA

D4

PAC1934

U3

SENSE1_P

SENSE1_N

SENSE4_P

SENSE4_N

SENSE3_P

SENSE3_N

SENSE2_P

SENSE2_N

0R
0402

R22

PIO Mnemonic Shared PIO Signal Description

ATSAMA5D2-ICP

Board Components

PIOBU7 LPM –

PC31 HPM –

SHDN PWRHLD –

PB_NSTRT nSTRT –

PB18 nINT0 – Active low, open-drain interrupt output

NRST nRSTO NRST Active low, open-drain reset output

PC28 TWD POWER TWI TWI interface serial data

PC29 TWCK POWER TWI TWI interface serial clock

3.2.1.5 Current Measurement

The SAMA5D2-ICP board embeds one PAC1934. The PAC1934 is a four-channel DC power/energy monitor with
accumulator. A 16-bit ADC is used to measure voltages across a current sense resistor, connected by a differential
multiplexer to (+) and (-) inputs for each channel.

Four current sense resistors (10 mΩ) are populated on-board for measuring voltage on power rails:

• 3.3V VDDIOP group (SENSE1_P and SENSE1_N)

• 3.3V VDDOSC, VDDUTMII, VDDANA, VDDAUDIOPLL, VDDSDHC (SENSE2_P and SENSE2_N)

• 1.35V VDDIODDR (SENSE4_P and SENSE4_N)

• 1.25V VDDCORE (SENSE3_P and SENSE3_N)

The PAC1934 communicates with the MPU via a TWI bus.

The figure below shows the current measurement.

Figure 3-6. PAC1934 Current Measurement

Low-Power mode input pin. In combination with PWRHLD and HPM, this
pin defines the power mode status of the MCP16502.

High-Performance mode input pin. In combination with PWRHLD and
LPM, this pin defines the power mode status of the MCP16502.

Power hold input. Typically asserted high by the MPU to maintain power
after the initial startup triggered by nSTRT. PWRHLD will be asserted low
by the MPU to initiate a PMIC shutdown sequence.

Start event input. Drive nSTRT low to initiate a start-up sequence. nSTRT
is internally pulled up.

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 13

Table 3-5. PAC1934 Signal Descriptions

PIO Mnemonic Shared PIO Signal Description

PC28 PC28_PAC1934 POWER TWI TWI data

PC29 PC29_PAC1934 POWER TWI TWI clock

PB17 INT_PAC1934 – Interrupt

3.2.2 Processor

The Microchip SAMA5D2 Series is a high-performance, power-efficient embedded MPU based on the Arm® Cortex®­A5 processor running up to 500 MHz, with support for multiple memories such as DDR2, DDR3, DDR3L, LPDDR1,
LPDDR2, LPDDR3, and QSPI Flash. The devices integrate powerful peripherals for connectivity and user interface
applications, and offer advanced security functions (Arm TrustZone®, tamper detection, secure data storage, etc.), as
well as high-performance cryptoprocessors AES, SHA and TRNG.

For more information about the SAMA5D27 MPU, refer to the SAMA5D2 Series data sheet.

3.2.2.1 Supply Group Configuration

The main regulators provide all power supplies required by the SAMA5D27 device:

• 1.25V VDDCORE, VDDPLLA, VDDUTMIC, VDDHSIC

• 1.35V VDDIODDR

• 2.5V VDDFUSE

• 3.3V VDDIOP0, VDDIOP1, VDDIOP2, VDDISC

• 3.3V VDDOSC, VDDUTMI, VDDANA, VDDAUDIOPLL, VDDSDHC

• 3.3V VDDBU

ATSAMA5D2-ICP

Board Components

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 14

Figure 3-7. Processor Power Lines Supplies

GND

GNDUTMII

VDDCORE

VDDIODDR

VDDBU

VDDIOP0

VDDIOP1

VDDIOP2

VDDANA

VDDHSIC

VDDFUSE

VDDAUDIOPLL

VDDUTMIC

VDDUTMII

VDDSDHC

VDDPLLA

VDDOSC

VDDISC

VDDCORE

10uF
16
0805

C29

10uF
16
0805

C32

GNDVDDIODDR

10uF
16
0805

C30

GND

GND

VDDIOP1

GND

VDDANA

GND

VDDIOP0

GND

VDDBU

GND

VDDIOP2

GND

VDDHSIC

GND

VDDFUSE

GND

VDDUTMIC

VDDCORE

VDDIODDR

VDDBU

VDDANA

VDDIOP0 VDDIOP1

VDDIOP2VDDHSIC VDDFUSE

VDDUTMIC

GND

VDDAUDIOPLL

4.7uF
10V
0402

C57

VDDAUDIOPLL

GND

VDDUTMII

VDDUTMII

GND

VDDPLLA

4.7uF
10V
0402

C69

VDDPLLA

1R
0402

R76

GND

VDDOSC

4.7uF
10V
0402

C71

VDDOSC

1R
0402

R77

GND

VDDISC

VDDISC

GND

VDDSDHC

VDDSDHC

VDDCORE_1

D7

VDDCORE_2

D9

VDDCORE_3

H3

VDDCORE_4

K13

VDDCORE_5

N5

VDDCORE_6

N9

VDDDDR_1

D11

VDDDDR_2

D12

VDDDDR_3

D15

VDDDDR_4

E15

VDDDDR_5

H15

VDDDDR_6

J15

VDDDDR_7

L15

VDDBU

N7

VDDANA_1

K3

VDDANA_2

L5

VDDIOP0_1

E6

VDDIOP0_2

F7

VDDIOP1_1

N13

VDDIOP1_2

R14

VDDIOP2

F10

VDDHSIC

R9

VDDFUSE

M12

VDDAUDIOPLL

T3

VDDUTMIC

P7

VDDUTMII

P8

VDDSDMMC

P11

VDDPLLA

U4

VDDISC

F4

VDDOSC

T7

GNDCORE_1

E7

GNDCORE_2

E9

GNDCORE_3

H4

GNDCORE_4

K12

GNDCORE_5

M5

GNDCORE_6

M9

GNDDDR_1

D14

GNDDDR_2

E11

GNDDDR_3

E12

GNDDDR_4

E14

GNDDDR_5

H14

GNDDDR_6

J14

GNDDDR_7

L14

GNDBU

N6

GNDANA_1

L3

GNDANA_2

K5

GNDIOP0_1

F6

GNDIOP0_2

G7

GNDIOP1_1

M13

GNDPIO2

F9

GNDIOP1_2

P14

GNDPLL

T5

GNDAUDIOPLL

T4

GNDUTMIC

R7

GNDUTMII

P9

GNDSDMMC

R11

GNDPLLA

U5

GNDOSC

T6

GNDISC

G4

ATSAMA5D27C

U4G

0.1uF
16V
0201

C35

0.1uF
16V
0201

C39

0.1uF
16V
0201

C42

0.1uF
16V
0201

C44

0.1uF
16V
0201

C48

0.1uF
16V
0201

C53

0.1uF
16V
0201

C36

0.1uF
16V
0201

C40

0.1uF
16V
0201

C43

0.1uF
16V
0201

C45

0.1uF
16V
0201

C49

0.1uF
16V
0201

C54

0.1uF
16V
0201

C31

0.1uF
16V
0201

C34

0.1uF
16V
0201

C37

0.1uF
16V
0201

C41

0.1uF
16V
0201

C46

0.1uF
16V
0201

C50

0.1uF
16V
0201

C56

0.1uF
16V
0201

C64

0.1uF
16V
0201

C65

0.1uF
16V
0201

C55

0.1uF
16V
0201

C47

0.1uF
16V
0201

C38

0.1uF
16V
0201

C61

0.1uF
16V
0201

C66

4.7uF
10V
0402

C62

0.1uF
16V
0201

C33

0.1uF
16V
0201

C72

0.1uF
16V
0201

C70

0R
0201

R79

0.1uF
16V
0201

C73

ATSAMA5D2-ICP

Board Components

3.2.3 Clock Circuitry

© 2020 Microchip Technology Inc.

The embedded MPU generates the necessary clocks based on two oscillators: one slow clock (SLCK) crystal running
at 32.768 kHz and one main clock oscillator running at 12 MHz. An optional 12 MHz crystal is available as an
alternative to the DSC1001DL5-012.0000 oscillator.

Note:  PIOBU0 can be used to disable the 12 MHz main oscillator (Y3).

User Guide

DS60001592A-page 15

Figure 3-8. MPU Clock Circuitry

0.1uF
16V
0402

C52

GND

3V3

32.768kHz

Y1

GND

GND

Xin_32
Xout_32

GND GND

Xout

Xin

0R

R69

0R

R70

DNP

0R

R71

DNP

Xin
Xout

XIN

U7

XOUT

U6

XIN32

P1

XOUT32

P2

SHDN

R1

WKUP

P4

JTAGSEL

T2

NRST

U2

TST

P3

SDCAL

T10

RXD

N4

CLK_AUDIO

U3

ADVREF

M6

HHSDPA

T8

HHSDMA

R8

HHSDPB

U8

HHSDMB

U9

HHSDPDATC

T9

HHSDMSTRC

U10

VBG

R6

COMPN

U1

COMPP

T1

PIOBU0

R3

PIOBU1

N8

PIOBU2

R2

PIOBU3

R5

PIOBU4

R4

PIOBU5

P5

PIOBU6

P6

PIOBU7

M8

ATSAMA5D27C

U4F

18pF
50V
0402

C299

18pF
50V
0402

C51

12Mhz

1 3

CX3225SB12000H0PSTC1

Y4

DNP

18pF
50V
0402

C67

DNP

18pF
50V
0402

C60

DNP

3V3

0R
0402

R185

0R
0402

R166

DNP

PIOUB0

12.00 MHz
DSC1001DL5-012.0000

STB

1

GND2OUT

3

VDD

4

Y3

ATSAMA5D2-ICP

Board Components

3.2.3.1 Reset Circuitry

The reset sources for the SAMA5D2-ICP board are:

© 2020 Microchip Technology Inc.

• Power-on Reset from the PMIC MCP16502

• Push button reset SW1

• External JTAG or J-Link-OB reset from an in-circuit emulator

User Guide

DS60001592A-page 16

Figure 3-9. Reset Circuitry

1 4

2 3

TACT SPST

SW4

1 4

2 3

TACT SPST

SW1

NRST

1 4

2 3

TACT SPST

SW2

DIS_BOOT

100R
04021%

R252

1 4

2 3

TACT SPST

SW3

GND

100R
04021%

R251

100R
04021%

R250

NSTART

1 4

2 3

TACT SPST

SW5

PIOBU1

PD0

100R
04021%

R254

0R
0603

R255

1

2

3

4

5

6

7

8

9

10

FTSH-105-01-F-DV-K

J18

10k

R208

100R
0402

R210

0R

0603

R209

DNP

100k
0402

R211

100k
0402

R212

100k
0402

R213

NRST

GND GND

3V3

3V3

RTCKIN CON_JTAG_TDI

CON_JTAG_TDO

CON_JTAG_TCK

CON_JTAG_TMS

NRST

1 4

2 3

TACT SPST

SW4

1 4

2 3

TACT SPST

SW1

NRST

1 4

2 3

TACT SPST

SW2

DIS_BOOT

100R
04021%

R252

1 4

2 3

TACT SPST

SW3

GND

100R
04021%

R251

100R
04021%

R250

NSTART

1 4

2 3

TACT SPST

SW5

PIOBU1

PD0

100R
04021%

R254

0R
0603

R255

A

3

B0

4

VCC

1

GND

5

B1

2

S

6

NLAS3157MX3TC

U28

NRST

GND

VDD_3V3_JLINK

150R

R215

1k

R216

TRESIN
TRESOUT PA26_3U

0.1uF
16V0402

C273

GND

PA3
PA4

U27

PB18

10kR110k

R2

3V3

WAKE_UP

NRST

10k

R256

VDDBU

nRSTO

nSTRTO

nINTO

U2

RB160M-60TR

D1

1

2

3

BAT54C

D2

220mF

3.3V
P4.6D4.8H1.66

C5

3V3

VDDBU

0.1uF
16V
0402

C7

GND

100R
08055%

R3

GND

12

HDR-2.54 Male 1x2

J2

Shunt 2.54mm 1x2

JP2

ATSAMA5D2-ICP

Board Components

3.2.3.2 Power Backup Supply

The SAMA5D2-ICP board requires a power source in order to permanently power the backup part of the SAMA5D27
device (refer to the SAMA5D2 Series data sheet). A super capacitor sustains such permanent power to VDDBU
when all system power sources are off.

Figure 3-10. VDDBU Powering Option

3.2.4 Push Button Switches

The SAMA5D2-ICP features five push buttons:

• One reset push button (SW1). When pressed and released, it causes a general reset of the board

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 17

1 4

2 3

TACT SPST

SW4

1 4

2 3

TACT SPST

SW1

NRST

1 4

2 3

TACT SPST

SW2

DIS_BOOT

100R
04021%

R252

1 4

2 3

TACT SPST

SW3

GND

100R
04021%

R251

100R
04021%

R250

NSTART

1 4

2 3

TACT SPST

SW5

PIOBU1

PD0

100R
04021%

R254

0R
0603

R255

ATSAMA5D2-ICP

Board Components

• One wake-up push button (SW3) connected to the nSTRT pin of the PMIC, used to signal to the PMIC to initiate

a power-on sequence and to make the processor exit Low-Power mode

• One disable boot push button (SW2) used to invalidate the boot memories (see the section CS Disable)

• Two user push buttons (SW4 and SW5) connected to PIO PD0 and PIOBU1

Figure 3-11. System Push Buttons

3.2.5 Memory

3.2.5.1 Memory Organization

The SAMA5D27 features a DDR/SDR memory interface and an External Bus Interface (EBI) to enable interfacing to
a wide range of external memories and to a wide range of parallel peripherals.

This section describes the memory devices mounted on the SAMA5D2-ICP board:

• Two DDR3L SDRAMs

• One QSPI Flash

• Three serial EEPROMs

Additional memory can be added to the board by:

• Installing an SD or MMC card in the SD/MMC slot

• Using the USB ports

Support is dependent upon driver support in the OS.

3.2.5.2 DDR3L SDRAM

Two DDR3L SDRAMs (W632GU6MB 2 Gbits = 16, 777,216 words x 8 banks x 16 bits) are used as main system
memory, totalling 4 Gbits of SDRAM on the board. The memory bus is 32 bits wide and operates with a frequency of
up to 166 MHz.

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 18

Figure 3-12. DDR3L SDRAM Implementation

DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8

DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13

DDR_BA0
DDR_BA1
DDR_BA2

DDR_CLK_N

DDR_CKE

DDR_RAS
DDR_CAS

DDR_WE

DDR_CLK_P

DDR_DQS1_P

DDR_DQS1_N

DDR_DQS0_P

DDR_DQS0_N

DDR_DQM1
DDR_DQM0

GND

0R
0402

R86

0R
0402

R87

DNP

GND

CK

J7

CK#

K7

CKE

K9

CS#

L2

RAS#

J3

CAS#

K3

WE#

L3

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC#

N7

A13

T3

NC5

T7

BA0

M2

BA1

N8

BA2

M3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

ODT

K1

VSS1

A9

VSS2

B3

VSS3

E1

VSS4

G8

VSSQ4

D8

VSSQ3

D1

VSSQ2

B9

VSSQ1

B1

VSSQ5

E2

VDDQ1

A1

VDDQ2

A8

VDDQ3

C1

VDDQ4

C9

VDDQ5

D2

VDD1

B2

VDD2

G7

DQSU#

B7

DMU

D3

DML

E7

DQSL#

G3

DQSU

C7

DQSL

F3

DQU0

D7

DQU2

C8

DQU3

C2

DQU6

B8

DQU4

A7

DQU7

A3

DQU5

A2

VDD9

D9

VSSQ6

E8

VDDQ6

E9

VDDQ7

F1

VSSQ7

F9

VSSQ8

G1

VSSQ9

G9

VREFDQ

H1

VDDQ8

H2

VDDQ9

H9

NC1

J1

NC2

J9

VSS5

J2

VSS6

J8

VDD4

K2

VDD5

K8

NC3

L1

ZQ

L8

NC4

L9

VSS7

M1

NC6

M7

VREFCA

M8

VSS8

M9

VDD6

N1

VDD7

N9

VSS9

P1

VSS10

P9

VDD8

R1

VDD3

R9

VSS11

T1

RESET#

T2

VSS12

T9

DQU1

C3

W632GU6MB-12

U6

W632GU6MB

DDR_RESETN

240R

0402 1%

R85

DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13

DDR_BA0
DDR_BA1
DDR_BA2

DDR_CLK_N

DDR_CKE

DDR_CS

DDR_RAS
DDR_CAS

DDR_WE

DDR_CLK_P

DDR_DQS3_P

DDR_DQS3_N

DDR_DQS2_P

DDR_DQS2_N

DDR_DQM3
DDR_DQM2

0R
0402

R94

0R
0402

R95

DNP

CK

J7

CK#

K7

CKE

K9

CS#

L2

RAS#

J3

CAS#

K3

WE#

L3

A0

N3

A1

P7

A2

P3

A3

N2

A4

P8

A5

P2

A6

R8

A7

R2

A8

T8

A9

R3

A10/AP

L7

A11

R7

A12/BC#

N7

A13

T3

NC5

T7

BA0

M2

BA1

N8

BA2

M3

DQL0

E3

DQL1

F7

DQL2

F2

DQL3

F8

DQL4

H3

DQL5

H8

DQL6

G2

DQL7

H7

ODT

K1

VSS1

A9

VSS2

B3

VSS3

E1

VSS4

G8

VSSQ4

D8

VSSQ3

D1

VSSQ2

B9

VSSQ1

B1

VSSQ5

E2

VDDQ1

A1

VDDQ2

A8

VDDQ3

C1

VDDQ4

C9

VDDQ5

D2

VDD1

B2

VDD2

G7

DQSU#

B7

DMU

D3

DML

E7

DQSL#

G3

DQSU

C7

DQSL

F3

DQU0

D7

DQU2

C8

DQU3

C2

DQU6

B8

DQU4

A7

DQU7

A3

DQU5

A2

VDD9

D9

VSSQ6

E8

VDDQ6

E9

VDDQ7

F1

VSSQ7

F9

VSSQ8

G1

VSSQ9

G9

VREFDQ

H1

VDDQ8

H2

VDDQ9

H9

NC1

J1

NC2

J9

VSS5

J2

VSS6

J8

VDD4

K2

VDD5

K8

NC3

L1

ZQ

L8

NC4

L9

VSS7

M1

NC6

M7

VREFCA

M8

VSS8

M9

VDD6

N1

VDD7

N9

VSS9

P1

VSS10

P9

VDD8

R1

VDD3

R9

VSS11

T1

RESET#

T2

VSS12

T9

DQU1

C3

W632GU6MB-12

U8

W632GU6MB

DDR_RESETN

240R

0402 1%

R92

DDR_REF

DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31

100k
0402

R89

0R
0402

R184

DDR_CS

100k
0402

R178

0R
0402

R4

GND

DDR_REF

0.1uF
16V
0402

C291

GND

0.1uF
16V
0402

C292

0.1uF
16V
0402

C293

0.1uF
16V
0402

C294

VDDIODDRVDDIODDR

VDDIODDR

VDDIODDR

VDDIODDRVDDIODDR

GND

VDDIODDR

0.1uF
16V
0402

C76

2.2uF
10V
0402

C75

0.1uF
16V
0402

C77

0.1uF
16V
0402

C79

0.1uF
16V
0402

C80

0.1uF
16V
0402

C81

0.1uF
16V
0402

C82

0.1uF
16V
0402

C83

0.1uF
16V
0402

C84

0.1uF
16V
0402

C86

GND

0.1uF
16V
0402

C88

2.2uF
10V
0402

C87

0.1uF
16V
0402

C89

0.1uF
16V
0402

C90

0.1uF
16V
0402

C91

0.1uF
16V
0402

C93

0.1uF
16V
0402

C94

0.1uF
16V
0402

C95

0.1uF
16V
0402

C96

0.1uF
16V
0402

C97

GND

VDDIODDRVDDIODDR

0.1uF
16V
0402

C101

2.2uF
10V
0402

C99

0.1uF
16V
0402

C103

0.1uF
16V
0402

C105

0.1uF
16V
0402

C107

0.1uF
16V
0402

C110

0.1uF
16V
0402

C112

0.1uF
16V
0402

C114

0.1uF
16V
0402

C117

0.1uF
16V
0402

C120

GND

VDDIODDR

0.1uF
16V
0402

C102

2.2uF
10V
0402

C100

0.1uF
16V
0402

C104

0.1uF
16V
0402

C106

0.1uF
16V
0402

C108

0.1uF
16V
0402

C111

0.1uF
16V
0402

C113

0.1uF
16V
0402

C115

0.1uF
16V
0402

C118

0.1uF
16V
0402

C121

GND

VDDIODDR

GND

VDDIODDR

ATSAMA5D2-ICP

Board Components

3.2.5.3 DDR_CAL Analog Input

One specific analog input, DDR_CAL, is used to calibrate all DDR I/Os.

© 2020 Microchip Technology Inc.

User Guide

DS60001592A-page 19