7.1.Rev. A - 10/2019.........................................................................................................................57
The Microchip Web Site............................................................................................................................... 58
The kit comprises a baseboard with a soldered ATSAMA5D27-WLSOM1 module. The module features a
SAMA5D27-LD2G-CU SiP embedding a 2-Gbit LPDDR2 SDRAM. The ATSAMA5D27-WLSOM1 module offers a
reliable and cost-effective embedded platform for building end products, as well as a small form factor,
complemented by many connectivity interfaces. The ATSAMA5D27-WLSOM1 module is a fully-featured industriallycertified single board computer designed for integration into customer applications.
The ATSAMA5D27-WLSOM1 module is a purpose-built small footprint hardware platform equipped with a wide array
of high-speed connectivity engineered to support various applications such as IoT endpoints, wearables, appliances
or industrial equipment.
The ATSAMA5D27-WLSOM1 module integrates a 2-Gbit LPDDR2 SDRAM, a Secure Element device, a Power
Management IC, a Wi-Fi®/Bluetooth® module, a QSPI memory and a 10/100 Mbps Ethernet Phy.
94 GPIO pins are provided by the ATSAMA5D27-WLSOM1 module for general use in the system. All GPIO pins are
independent and can be configured as inputs or outputs, with or without pull-up/pull-down resistors.
The baseboard features a wide range of peripherals, as well as a user interface and expansion options, including two
mikroBUS™ click interface headers to support over 700 MikroElektronika Click boards™.
Table 2-1. Baseboard Features
ATSAMA5D27-WLSOM1-EK1
Product Overview
CharacteristicsSpecificationsComponents
USB Com PortOne USB Device
One USB Host
One USB HSIC
EthernetOne Ethernet interfaceRJ45 connector
VideoOne LCD RGB 18-bit interface
One ISC 12-bit camera interface
StorageOne standard SD card interfaceWith 3.3V/1.8V power switch
This section covers the specifications of the ATSAMA5D27-WLSOM1-EK1 and provides a high-level description of
the baseboard's major components and interfaces. This document is not intended to provide a detailed
documentation about the processor or about any other component used on the baseboard. It is expected that the
user will refer to the appropriate documents of these devices to access detailed information.
3.1 Baseboard Overview
The fully-featured ATSAMA5D27-WLSOM1-EK1 integrates multiple peripherals and interface connectors, as shown
in the figure below.
The figure below shows the default jumper settings. Jumpers in red are configuration items and current measurement
points. The following table describes the functionality of the jumpers.
• 40.8 x 40.8 mm Module, Pitch 0.8mm, Solderable Manually for Prototyping
• 94 I/Os
• Up to 7 Tamper Pins
• One USB Device, one USB Host and one HSIC Interface
• Shutdown and Reset Control Pins
• Operational Specifications:
– Main operating voltage: 3.0V to 5.5V ± 5%
– Temperature range: 0°C to +70°C
– Integrated oscillators, internal voltage regulators
– Multiple interfaces and I/Os for easy application development
3.4.2 Power Supply Topology
3.4.2.1 Input Power
The ATSAMA5D27-WLSOM1-EK1 power source can come through a USB connector (J10) connected to a PC. This
USB power source is sufficient to supply the board in most applications.
Important: In case of an external device connected through the USB-B port, it is recommended to use
the 5V power supply input with an AC/DC wall adapter for the entire system rather than a PC or a USB
hub, which are limited to 500 mA typical.
ATSAMA5D27-WLSOM1-EK1
Baseboard Components
Jumper J16 is used to perform VDD_MAIN current measurements on the baseboard.
The following figure is a schematic of the power source.
Figure 3-4. VDD_MAIN Input Powering
3.4.2.2 Power Supply Requirements and Restrictions
Detailed information on the device power supplies is provided in tables “SAMA5D2 Power Supplies” and “Power
Supply Connections” in the SAMA5D2 Series datasheet.
3.4.2.3 Power-up and Power-down Considerations
Power-up and power-down considerations are described in section “Power Considerations” of the SAMA5D2 Series
datasheet.
Note: The power-up and power-down sequences provided in the SAMA5D2 Series datasheet must be respected for
reliable operation of the device. These are respected by the on-board MCP16502.
3.4.2.3.1 LPDDR2 Power-Off Sequence
The LPDDR2 power-off sequence must be controlled by software to preserve the LPDDR2 device.
In this sequence, the CKE signal should be low during the full period the power rails are powering down.
The power failure can be controlled by the embedded Voltage Supervisor (MIC842) and handled at system level (IRQ
on PD31). The LPDDR2 power-off sequence is applied using the bit LPDDR2_LPDDR3_PWOFF in the MPDDRC
Low-Power register (MPDDRC_LPR).
For more information, refer to the following documents:
JP4
RB160M-60TR
D6
1
2
3
BAT54C
D7
100R
04025%
R92
0.1uF
10V
0402
C15
VDD_MAIN
VIN
1
SHDN
3
GND
2
NC
4
VOUT
5
MCP1711/1.8V
U6
0.1uF
10V
0402
C18
VDDBU
0.22F
5.5V
C13
12
HDR-2.54 Male 1x2
J17
VDD_3V3
1uF
10V
0402
C17
1uF
10V
0402
C14
VDDFUSE
VIN
1
GND
2
EN
3
NC
4
VOUT
5
MIC5366-2.5YC5-TR
U4
• SAMA5D2 Series Data sheet available on https://www.microchip.com/, sections LPDDR2 Power Fail
Management and MPDDRC Low-Power Register
• Jedec Standard Low Power Double Data Rate 2 (LPDDR2), JESD209-2B
Note: An uncontrolled power-off sequence can be applied only up to 400 times in the life of an LPDDR2 device.
3.4.2.4 Backup Power Supply
The ATSAMA5D27-WLSOM1-EK1 features a power source in order to permanently power the backup area of the
SAMA5D2 device (refer to the SAMA5D2 Series datasheet). A super capacitor (C13) sustains such permanent power
to VDDBU when all system power sources are off.
Figure 3-5. VDDBU Powering Options
ATSAMA5D27-WLSOM1-EK1
Baseboard Components
3.4.2.5 VDDFUSE Regulator
The ATSAMA5D27-WLSOM-EK1 board embeds an LDO that delivers 2.5V to VDDFUSE for Fuse box programming
and for Secure Mode switching.
Figure 3-6. VDDFUSE Powering Options
3.4.3 Push Button Switches
The ATSAMA5D27-WLSOM1-EK1 features four push buttons:
• SW1– Wake-up push button connected to the SAMA5D27 WKUP pin, used to exit the processor from Backup
mode.
• SW2 – Reset push button. When pressed and released, the baseboard is reset.
• SW3 – Power-on/off button
• SW4 – User momentary push button connected to PIO PB2
One jumper (J8) controls the selection (CS#) of the bootable memory components (QSPI) using a noninverting 3state buffer.
Figure 3-8. QSPI CS Disable Boot
3.4.5 Secure Digital Multimedia Card (SDMMC) Interface
3.4.5.1 Secure Digital Multimedia Card (SDMMC) Controller
The rule of operation is:
• SW2 (RESET) pressed and J8 open = booting from QSPI on WLSOM1
• SW2 (RESET) pressed and J8 closed = booting from external QSPI. The QSPI on WLSOM1 is disabled.
Refer to the SAMA5D2 Series data sheet for more information on standard boot strategies and sequencing.
The SD (Secure Digital) Card is a non-volatile memory card format used as a mass storage memory in mobile
devices.
The ATSAMA5D27-WLSOM1-EK1 features two Secure Digital Multimedia Card (SDMMC) interfaces that support the
MultiMedia Card (e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0
specification. It is compliant with the SD Host Controller Standard V3.0 Specification.
• The SDMMC0 interface is connected to a standard SD card interface.
GND
i
SDMMC
Matched Net Lengths [Tolerance = 0.25mm]
68k
0402
5%
R81
4.7uF
10V
0402
C5
DAT3
1
CMD
2
VSS1
3
VDD
4
CLK
5
VSS2
6
DAT0
7
DAT1
8
DAT2
9
CD
10
WP
11
SHIELD
12
SD
J9
GND
VDD_3V3
10k
0402
1%
R84
10k
0402
1%
R83
10k
0402
1%
R76
68k
0402
5%
R80
68k
0402
5%
R79
68k
0402
5%
R78
VDDSDHC
SDMMC0_WP_PA12
SDMMC0_DAT2_PA04
SDMMC0_CMD_PA01
SDMMC0_DAT3_PA05
SDMMC0_CLK_PA00
SDMMC0_DAT0_PA02
SDMMC0_DAT1_PA03
SDMMC0_CD_PA13
10000pF
50V
0402
C23
22R0402 1%
R75
22R0402 1%
R94
22R0402 1%
R96
22R0402 1%
R157
22R0402 1%
R158
22R0402 1%
R159
0.1uF
10V
0402
C4
50Ω ± 10% single-ended trace impedance
10k
0402
1%
R93
0.1uF
10V
0402
C16
VDD_3V3
GNDGND
GND
VDD_3V3VDDSDHCVDD_1V8
SDMMC0_VDDSEL_PA11IN
1
VDD
2
GND
3
S1
4
D
5
S2
6
ADG849
U5
1uF
10V
0402
C28
IN=0: S1 Closed
IN=1: S2 Closed
• The SDMMC1 interface is connected to a WILC3000.
3.4.5.2 SDMMC0 Card Connector (J9)
The board provides a standard MMC/SD card connector, connected to SDMMC0. The SDMMC0 communication is
based on an 8-pin interface (clock, command, write protect, power switch and data (4)). A card detection switch is
included.
The figure below illustrates the SDMMC0 interface implementation.
100Ω ±5Ω differential trace impedance
Routing top or bottom
Pin NoMnemonicPIOSignal Description
11WPPA12Write Protect
12SHIELD–GROUND
3.4.6 Communication Interfaces
This section describes the signals and connectors related to the ETH and USB communication interfaces.
3.4.6.1 Ethernet 10/100 (GMAC) Port
The on-board ATSAMA5D27-WLSOM1 module integrates a 10/100 Mbps Ethernet Phy (KSZ8081RNA) allowing
direct connection to any 10/100 Mbps Ethernet-based Local Area Network, for full interaction with local servers and
wide area networks such as the Internet.
ETH signals from the WLSOM1 are connected to a RJ45 MagJack. Additionally, for monitoring and control purposes,
a LED functionality is carried on the RJ45 connector to indicate link status.
90Ω ±10% differential trace impedance
Routing top or bottom
Pin NoMnemonicSignal Description
12GKGreen LED cathode (Not connected)
SHDEARTHGROUND
3.4.6.2 USB Interfaces
The USB (Universal Serial Bus) is a hot-pluggable general-purpose high-speed I/O standard for computer
peripherals. The standard defines connector types, cabling, and communication protocols for interconnecting a wide
variety of electronic devices. The USB 2.0 Specification defines data transfer rates as high as 480 Mbps (also known
as High-Speed USB). A USB host bus connector uses four pins: a power supply pin (5V), a differential pair (D+ and
D- pins) and a ground pin.
The ATSAMA5D27-WLSOM1-EK1 features three USB communication ports named USB-A to USB-C:
• USB-A device interface
– One USB device standard Micro-AB connector
– Offers a VBUS detection function through the R81-R83 resistor ladder
– Used as a secondary power source and as a communication link for the ATSAMA5D27-WLSOM1-EK1, and
derives power from the PC over the USB cable. In most cases, this port is limited to 500 mA.
• USB-B (host port B high- and full-speed interface)
– One USB host type C connector
– Equipped with a 500 mA high-side power switch
• USB-C (High-Speed Inter-Chip/HSIC port)
– One USB high-speed host port with an HSIC interface
– Connected to 2 U.FL connectors
ATSAMA5D27-WLSOM1-EK1
Baseboard Components
3.4.6.3 USB-A Interface
The figure below shows the USB implementation on the USB-A port terminated on a Micro-AB type USB connector.
High-Speed Inter-Chip (HSIC) is a standard for USB chip-to-chip interconnect with a 2-signal (strobe, data) source
synchronous serial interface using 240 MHz DDR signaling to provide only high-speed 480 Mbps data rate.
The interface operates at high speed, 480 Mbps, and is fully compatible with existing USB software stacks. It meets
all data transfer needs through a single unified USB software stack.
The HSIC port is connected to 2 U.FL connectors (not populated by default).
The ATSAMA5D27-WLSOM1-EK1 provides an FPC connector with 18 bits of data and control signals to the LCD
interface.
This connector is used to connect to an LCD display type AC320005-5.
A 50-pin FPC (J21) header is provided on the baseboard to interface the LCD module with the 18-bit parallel RGB
mode and is used to connect to an LCD display type AC320005-5.
The connector provides two PIOs as interrupts, one SPI and a TWI port to interface the MaXTouch® touch controller
or QTouch® button controller embedded on the LCD module.
In order to operate correctly from the processor with various LCD modules, two voltage lines are available: 3.3V and
5VCC (default). Both are selected by 0R resistors R107 and FB9.
47RESETNRSTRESETReset for both display and maXTouch
48Main_5V/3.3V–VCC3.3V or 5V supply (5V by default)
49Main_5V/3.3V–VCC3.3V or 5V supply (5V by default)
50––GNDGround
3.5.2 Image Sensor (ISC) Interface
This section describes the signals and connectors related to the ISC interface.
The Image Sensor Controller (ISC) system manages incoming data from a parallel or serial CSI-2 based CMOS/CCD
sensor. The system supports a single active interface, as well as the ITU-R BT 656/1120 422 protocol with an 8-bit or
10-bit data width and raw Bayer format. The internal image processor includes adjustable white balance, color filter
array interpolation, color correction, gamma correction, 12-bit to 10-bit compression, programmable color space
conversion, as well as horizontal and vertical chrominance subsampling module.
Figure 3-22. Image Sensor Camera Interface Schematic
The ATSAMA5D27-WLSOM1-EK1 features one RGB LED which can be controlled by the user. The three LED
cathodes are controlled via GPIOs or Timer/Counter pins (only for red and green LEDs).
A 20-pin JTAG header is provided on the baseboard to facilitate software development and debugging using various
JTAG emulators. The interface signals have a voltage level of 3.3V.
Figure 3-26. JTAG Interface Schematic
Figure 3-27. JTAG Connector J25 Location
User Guide
The table below describes the pin assignment of JTAG connector J25.
The ATSAMA5D27-WLSOM1-EK1 board has a dedicated serial port for debugging, which is accessible through the
6-pin male header J26. Various interfaces can be used as a USB/Serial DBGU port bridge, such as FTDI TTL-232R
USB to TTL serial cable or basic breakout board for the RS232/USB converter.
Two Tri-State Buffers are available on TX and RX lines in order to protect the system against any leakage when an
FTDI connector is present and when the system is not started yet.
R152 and R154 are optional (not implemented) resistors that can be used for power selection. Power can be
delivered either by the ATSAMA5D27-WLSOM1-EK1 board or by the debug interface tool. To avoid malfunction
between the debug interface (e.g., FTDI) and the on-board power system, ensure that the voltage level selected
corresponds to the application requirements.
The table below describes the pin assignment of FTDI connector J26.
Table 3-11. FTDI Connector Pin Assignment
Pin NoMnemonicPIOSignal Description
1DBGU_CTSRFUHandshake Input
2DBGU_TXDPB27RS232 serial data output signal
3DBGU_RXDPB26RS232 serial data input signal
4VDD–3.3V or 5V Supply
5DBGU_RTSRFUHandshake Output
6GND–GROUND
3.6.3 WILC3000 Debug UART
The ATSAMA5D27-WLSOM1-EK1 has a dedicated serial port for WILC3000 Module debugging, which is accessible
through the 6-pin male header J27 (not populated by default).
The baseboard includes numerous peripherals. Many of these are connected to the GPIO block so that the I/O pins
1
2
3
4
5
6
7
8
9
10
FTS-105-01-L-DV
J22
330R
R108
330R
R109
330R
R110
330R
R111
330R
R127
330R
R128
0R
R112
0R
R129
0R
R130
COMP_N
COMP_P
PIOBU2
PIOBU4
PIOBU6
PIOBU7
PIOBU3
PIOBU5
PIOBU1
can be configured to carry out many alternative functions. This provides great flexibility to select a function
multiplexing scheme for the pins that satisfy the interface need for a particular application.
Note that most pins are configured as GPIO inputs, with a 100 KOhm pull-up resistor, after reset.
3.7.1 Tamper Interface
The ATSAMA5D27-WLSOM1-EK1 features seven tamper pins for static or dynamic intrusion detection and two
analog pins for comparison.
For a description of intrusion detection, refer to the SAMA5D2 data sheet, chapter “Security Module (SECUMOD)”.
Figure 3-32. Tamper Interface Schematic
Figure 3-33. Tamper Connector J22 Location
ATSAMA5D27-WLSOM1-EK1
Baseboard Components
The table below describes the pin assignment of Tamper connector J22.
The ATSAMA5D27-WLSOM1-EK1 hosts two pairs of 8-pin female headers acting as mikroBUS interfaces. The
mikroBUS standard defines the main board sockets and add-on boards, or Click boards, used for interfacing
microprocessors with integrated modules having proprietary pin configuration and silkscreen markings. The pinout
consists of three groups of communication pins (SPI, UART and TWI), four additional pins (PWM, interrupt, analog
input and reset) and two power groups (+3.3V and GND on the left, and 5V and GND on the right 1x8 header).
The ATSAMA5D27-WLSOM1-EK1 can host two connectors to interface with standard Xplained Pro extensions and,
in particular, with QT Xplained Pro Extension boards.
The following QT Xplained Pro Extensions boards are compatible with the interfaces:
The ATSAMA5D27-WLSOM1 module embeds an LDO with capacities of:
• Output voltage @ 1.8V only
• Output current capability up to 900mA
A 2-pin connector (J15), not populated by default, is available on the baseboard to measure output current capability
of the VDD_1V8 regulator.
Note: The maximum current available on VDD_1V8 node is approximately 900mA max @ 1.8V.
Figure 3-41. VDD_1V8 Load Connector
ATSAMA5D27-WLSOM1-EK1
Baseboard Components
3.8.3 VTH Threshold
The ATSAMA5D27-WLSOM1 module mounted on the base board integrates a Voltage Supervisor MIC842.
A resistor ladder is mounted on the ATSAMA5D27-WLSOM1-EK1 board and detects a voltage drop when reduced to
4.64V.
It is possible to change this resistor ladder, values or reference if, for test purposes, another voltage reference is
monitored (e.g. 12V). If the reference voltage is above 5.5V, then R60 should be removed (unsoldered).
Clip the cable onto the U-FL connector placed on the module. Extreme care must be taken to achieve proper
processing during assembly. The U-FL connector is very fragile.
Figure 4-4. Clip the cable to the wireless module
4.2.2 Clip the Antenna
Clip the antenna on the sleeve as shown below. Be sure to respect the orientation
Figure 4-5. Clip the antenna
4.2.3 Reorganize the Antenna Cable
Reorganize the antenna cable as shown below.
Figure 4-6. Reorganize the antenna cable
4.2.4 Antenna Orientation
The antenna has 180° free orientation for ease-of-use. Nonetheless, a 90° rotation is sufficient as shown below, when
mikroBUS clicks and button are used.
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Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today,
when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these
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Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Austin, TX
Tel: 512-257-3370
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800