Not recommended for new designs –
Please use 93AA76C or 93AA86C.
93AA76/86
8K/16K 1.8V Microwire Serial EEPROM
Features:
• Single supply operation down to 1.8V
• Low-power CMOS technology:
- 1 mA active current typical
-5 µA standby current (typical) at 3.0V
• ORG pin selectable memory configuration:
- 1024 x 8 or 512 x 16-bit organization
(93AA76)
- 2048 x 8 or 1024 x 16-bit organization
(93AA86)
• Self-timed erase and write cycles
• Automatic ERAL before WRAL
• Power on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device status signal during erase/write cycles
• Sequential read function
• 1,000,000 erase/write cycles ensured
• Data retention > 200 years
• 8-pin PDIP/SOIC package
• Temperature ranges available:
- Commercial (C): 0°C to +70°C
Description:
Package Types
PDIP Package
CS
CLK
DI
DO
SOIC Package
CS
CLK
DI
DO
Block Diagram
V
CC VSS
93AA76/86
1
2
3
4
1
2
3
4
8
CC
V
7
PE
6
ORG
5
SS
V
93AA76/86
8
VCC
7
PE
6
ORG
SS
V
5
The Microchip Technology Inc. 93AA76/86 are 8K and
16K low voltage serial Electrically Erasable PROMs.
The device memory is configured as x8 or x16 bits
depending on the ORG pin setup. Advanced CMOS
technology makes these devices ideal for low power
nonvolatile memory applications. These devices also
have a Progr am Enable (PE) pin to allow t he user to
write-protect the entire contents of the memory array.
The 93AA76/86 is ava ilable in st andard 8-pi n PDIP and
8-pin surface mount SOIC packages.
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
Soldering temperature of leads (10 seconds).......................................................................................................+300°C
ESD protection on all pins..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stres s ratin g only and func tional operati on of the devic e at thes e or any other co nditio ns abov e thos e
indicated in the operational listings of this specification is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
(†)
SS ........................................................................................................-0.6V to Vcc + 1.0V
1.1 AC Test Conditions
AC Waveform:
VLO = 2.0V
VHI = Vcc - 0.2V(Note 1)
HI = 4.0V for(Note 2)
V
Timing Measurement Reference Level:
Input0.5 V
Output0.5 VCC
Note 1:For VCC< 4.0V
2:For V
CC> 4.0V
CC
DS21130E-page 2 2004 Microchip Technology Inc.
93AA76/86
TABLE 1-1:DC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted:
Note 1:This parameter is periodically sampled and not 100% tested.
VCC = +1.8V to +6.0V
Commercial (C): T
IH12.0VCC + 1VVCC≥ 2.7V
A = 0°C to +70°C
VIH20.7 VCCVCC + 1VVCC < 2.7V
IL1-0.30.8VVCC≥ 2.7V
VIL2-0.30.2 VCC VVCC < 2.7V
OL2—0.2VIOL =100 µA; VCC = VCC Min.
V
VOH2VCC-0.2—VIOH = -100 µA; VCC = VCC Min.
LI-1010µAVIN = 0.1V to VCC
CINT—7pF (Note 1)
T
A = +25°C, FCLK = 1 MHz
ICC read—1
500
mAµAFCLK = 3 MHz; VCC = 5.5V
F
CLK = 1 MHz; VCC = 3.0V
CLK = CS = 0V; V
DI = PE = V
CC = 3.0V
SS
ORG = VSS or VCC
2004 Microchip Technology Inc.DS21130E-page 3
93AA76/86
TABLE 1-2:AC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted:
AC CHARACTERISTICS
ParameterSymbolMin.Max.UnitsConditions
VCC = +1.8V to +6.0V
Commercial (C): T
A = 0°C to +70°C
Clock frequencyF
Clock high timeTCKH200
Clock low timeT
Chip select set up timeT
CLK—3
2
1
—ns
300
500
CKL100
—ns
200
500
CSS50
—ns
100
250
MHz
MHz
Mhz
ns
ns
ns
ns
ns
ns
4.5V ≤ VCC ≤ 6.0 V
2.5V ≤ V
1.8V ≤ V
CC≤ 4.5V
CC < 2.5V
4.5V ≥ VCC ≤ 6.0V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
2.5V ≤ V
1.8V ≤ V
CC < 4.5V
CC < 2.5V
CC ≤ 6.0V
CC < 4.5V
CC < 2.5V
4.5V ≤ VCC ≤ 6.0V, Relative to CLK
2.5V ≤ V
1.8V ≤ V
CC < 4.5V, Relative to CLK
CC < 2.5V, Relative to CLK
Chip select hol d timeTCSH0—ns1.8V ≤ VCC ≤ 6.0V
Chip select low ti meT
Data input setup timeT
Data input hold timeT
Data output delay timeTPD—100
CSL250—ns1.8V ≤ VCC ≤ 6.0V, Relative to CLK
DIS50
100
250
DIH50
100
250
—ns
ns
ns
—ns
ns
ns
ns
250
500
ns
ns
4.5V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ VCC ≤ 6.0V, Relative to CLK
2.5V ≤ V
1.8V ≤ V
4.5V ≤ VCC ≤ 6.0V, CL = 100 pF
2.5V ≤ V
1.8V ≤ V
CC
≤ 6.0V, Relative to CLK
CC <4.5V, Relative to CLK
CC < 2.5V, Relative to CLK
CC < 4.5V, Relative to CLK
CC < 2.5V, Relative to CLK
CC < 4.5V, CL = 100 pF
CC < 2.5V, CL = 100 pF
Data output disable timeT
CZ—100
500
Status valid timeTsv—200
300
500
Program cycle timeT
WC—5msErase/Write mode
EC—15msERAL mode
T
ns
ns
ns
ns
ns
4.5V ≤ VCC ≤ 5.5V (Note 1)
1.8V ≤ V
4.5V ≥ V
2.5V ≤ V
1.8V ≤ V
CC < 4.5V (Note 1)
CC ≤ 6.0V, CL = 100 pF
CC < 4.5V, CL = 100 pF
CC < 2.5V, CL = 100 pF
TWL—30msWRAL mode
Endurance—1M—cycles25°C, V
CC = 5.0V, Block mode (Note 2)
Note 1:This parameter is periodically sampled and not 100% tested.
2:This parameter is not tested but ensured by char acterization. For endurance estimates in a specific
application, please con sult the Total Endurance
™
Model which can be obta ined from Microc hip’s we b site
at: www.microchip.com
DS21130E-page 4 2004 Microchip Technology Inc.
93AA76/86
TABLE 1-3:INSTRUCTION SET FOR 93AA76: ORG = 1 (X16 ORGANIZATION)
InstructionSBOpcodeAddressData In Data OutReq. CLK Cycles
READ110X A8 A7 A6 A5 A4 A3 A2 A1 A0—D15 - D029
EWEN1001 1 X X X X X X X X—High-Z13
ERASE111X A8 A7 A6 A5 A4 A3 A2 A1 A0—(RDY/BSY)13
ERAL1001 0 X X X X X X X X—(RDY/BSY)13
WRITE101X A8 A7 A6 A5 A4 A3 A2 A1 A0D15 - D0 (RDY/BSY)29
WRAL1000 1 X X X X X X X XD15 - D0(RDY/BSY)29
EWDS1000 0 X X X X X X X X—High-Z13
TABLE 1-4:INSTRUCTION SET FOR 93AA76: ORG = 0 (X8 ORGANIZATION)
InstructionSBOpcodeAddressData In Data Out
READ110X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0—D7 - D022
EWEN1001 1 X X X X X X X X—High-Z14
ERASE111 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0—(RDY/BSY)14
ERAL1001 0 X X X X X X X X—(RDY/BSY)14
WRITE101 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0D7 - D0(RDY/BSY)22
WRAL1000 1 X X X X X X X XD7 - D0(RDY/BSY)22
EWDS1000 0 X X X X X X X X—High-Z14
Req. CLK
Cycles
TABLE 1-5:INSTRUCTION SET FOR 93AA86: ORG = 1 (X16 ORGANIZATION)
InstructionSBOpcodeAddressData In Data OutReq. CLK Cycles
READ110A9 A8 A7 A6 A5 A4 A3 A2 A1 A0—D15 - D029
EWEN1001 1 X X X X X X X X —High-Z13
ERASE111A9 A8 A7 A6 A5 A4 A3 A2 A1 A0—(RDY/BSY)13
ERAL1001 0 X X X X X X X X—(RDY/BSY)13
WRITE101A9 A8 A7 A6 A5 A4 A3 A2 A1 A0D15 - D0 (RDY/BSY)29
WRAL1000 1 X X X X X X X XD15 - D0 (RDY/BSY)29
EWDS1000 0 X X X X X X X X—High-Z13
TABLE 1-6:INSTRUCTION SET FOR 93AA86: ORG = 0 (X8 ORGANIZATION)
InstructionSBOpco deAddressData In Data OutReq. CLK Cycles
READ110A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0—D7 - D022
EWEN1001 1 X X X X X X X X—High-Z14
ERASE111A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0—(RDY/BSY)14
ERAL1001 0 X X X X X X X X —(RDY/BSY)14
WRITE101A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0D7 - D0(RDY/BSY)22
WRAL1000 1 X X X X X X X XD7 - D0 (RDY/BSY)22
EWDS1000 0 X X X X X X X X—High-Z14
2004 Microchip Technology Inc.DS21130E-page 5
93AA76/86
2.0PRINCIPLES OF OPERATION
When the ORG pin is connected to VCC, the x16
organization is selected. When it is connected to ground,
the x8 organization is selected. Instructions, addresses
and write data are clocked into the DI pin on the rising
edge of the clock (CLK). The DO pin is normally held in
a high-Z state except when reading data from the
device, or when checking the Ready/Busy
a programming operation. The Ready/Busy
be verified during an erase/write operation by polling the
DO pin; DO low indicates that programming is still in
progress, while DO high indicates the device is ready.
The DO will enter the high-impedance state on the falling
edge of the CS.
2.1Start Condition
The Start bit is detected by the device if CS and DI are
both high with respect to the positive edge of CLK for
the first time.
Before a Start condition is detected, CS, CLK and DI
may change in any combination (except to that of a
Start condition), without resulting in any device operation (Read, Write, Erase, EWEN, EWDS, ERAL and
WRAL). As soon as CS is high, th e de vic e is no long er
in the Standby mode.
An instruction following a Start condition will only be
executed if the required amount of opcode, address
and data bits for any particular instruction are clocked
in.
After exec utio n of a n ins truct io n (i. e., clock in or out of
the last required address or data bit) CLK and DI
become “don't care” bits until a new Start condition is
detected.
status during
status can
2.3Erase/Write Enable and Disable
(EWEN, EWDS)
The 93AA76/86 powers up in the Erase/Write Disable
(EWDS) state. All programming modes must be
preceded by an Erase/Write Enable (EWEN) instruction.
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed
CC is removed from the device. To protect against
or V
accidental data disturb, the EWDS instruction can be
used to disable all erase/write functions and should
follow all programming operati ons. Execution of a READ
instruction is independent of both the EWEN and EWDS
instructions.
2.4Data Protection
During power-up, all programming modes of operation
are inhibited until V
1.4V. During power-down, the source data protection
circuitry acts to inhibit all programming modes w hen
CC has fallen below 1.4V.
V
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWEN instruction must be
performed before any ERASE or WRITE instruction can
be executed.
CC has reache d a leve l greate r than
2.2DI/DO
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the read operation, if A0 is a logic high
level. Under such a condition the voltage level seen at
Data Out is undefine d and will depend upon the rela tive
impedances of Data Out and the signal source driving
A0. The higher the current sourcing capability of A0,
the higher the voltage at the Data Out pin.
DS21130E-page 6 2004 Microchip Technology Inc.
93AA76/86
3.0DEVICE OPERATION
3.1READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 16-bit (x16 organization) or 8-bit
(x8 organization) ou tput s tring. T he output dat a bit s wil l
toggle on the rising edge of the CLK and are stable
after the specified time delay (T
possible when CS is held high and clock transitions
continue. The memory address pointer will automatically increment and output data sequentially.
3.2ERASE
The ERASE instruction forces all data bits of the
specified address to the logical “1” state. The self-timed
programming cycle is initiated on the rising edge of
CLK as the last address bit (A0) is clocked in. At this
point, the CLK, CS and DI inputs beco me “don’t cares”.
The DO pin indicates the Ready/Busy
device if the CS is hig h. Th e R ead y/B usy
displayed on the DO pin until the next Start bit is
received as long as CS is hig h. Bringing t he CS low w ill
place the device in Standby mode and cause the DO
pin to enter the high-impedan ce state . DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the register at the specified
address has been erased and the device is ready for
another instruction.
The erase cycle takes 3 ms per word (typical).
3.3WRITE
The WRITE instruction is followed by 16 bits (or by 8
bits) of data to be written into the specified address.
The self-timed programming cycle is initiated on the
rising edge of CLK as the last data bit (D0) is clocked
in. At this point, the CLK, CS and DI inputs become
“don’t cares”.
The DO pin indicates the Ready/Busy
device if the CS is hig h. Th e R ead y/B usy
displayed on the DO pin until the next Start bit is
received as long as CS is hig h. Bringing t he CS low w ill
place the device in Standby mode and cause the DO
pin to enter the high-impedan ce state . DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the register at the specified
address has been written and the device is ready for
another instruction.
The write cycle takes 3 ms per word (typical).
PD). Sequential read is
status of the
status will be
status of the
status will be
3.4Erase All (ERAL)
The ERAL instruction will erase the entire memory array
to the logical “1” state. The ERAL cycle is identical to
the erase cycle except for the different opcode. The
ERAL cycle is completely self-timed and commences
on the rising edge of the l ast addre ss bit (A0). Note that
the Least Signific ant 8 or 9 address bits ar e “don’t care”
bits, depending on selection of x16 or x8 mode.
Clocking of the CLK pin is not necessary after the
device has entered the self clocking mode. The ERAL
instruction is ensured at Vcc = +4.5V to +6.0V.
The DO pin indicates the Ready/Busy
device if the CS is hig h. Th e Read y/Busy
displayed on the DO pin until the next Start bit is
received as long as C S is hig h. Bringing t he CS low wil l
place the device in Standby mode and cause the DO
pin to enter the high-impedanc e state . DO at logical “ 0”
indicates that programming is still in progress. DO at
logical “1” indicates that the entire device has been
erased and is ready for another instruction.
The ERAL cycle takes 15 ms maximum (8 ms typical).
status of the
status will be
3.5Write All (WRAL)
The WRAL instruction will write the entire me mory array
with the data specified in the command. The WRAL
cycle is completely self-timed and commences on the
rising edge of the last address bit (A0). Note that the
Least Significant 8 or 9 address bits are “don’t cares”,
depending on selecti on of x1 6 or x8 m ode . Clock in g of
the CLK pin is not necessary after the device has
entered the self clocking mode. The WRAL command
does include an automatic ERAL cycle for the device.
Therefore, the WRAL instruction does not require an
ERAL instruction but the chip must be in the EWEN
status. The WRAL instruction is ensured at Vcc = +4.5V
to +6.0V.
The DO pin indicates the Ready/Busy
device if the CS is hig h. Th e Read y/Busy
displayed on the DO pin until the next Start bit is
received as long as C S is hig h. Bringing t he CS low wil l
place the device in Standby mode and cause the DO
pin to enter the high-impedanc e state . DO at logical “ 0”
indicates that programming is still in progress. DO at
logical “1” indicates that the entire device has been
written and is ready for another instruction.
The WRAL cycle takes 30 ms maximum (16 ms
typical).
status of the
status will be
2004 Microchip Technology Inc.DS21130E-page 7
93AA76/86
FIGURE 3-1:SYNCHRONOUS DATA TIMING
IH
V
CS
VIL
DI
VIH
VIL
VIH
TDIS
CLK
VIL
VOH
DO
(Read)
(Program)
DO
VOL
VOH
VOL
The memory automatically cycles to the next register.
FIGURE 3-2:READ
TCSSTCKHTCKL
TDIH
TPD
TSV
Status Valid
TPD
TCSH
TCZ
TCZ
CS
CLK
DI
110A
DO
FIGURE 3-3:EWEN
CS
CLK
DI
ORG = V
ORG = V
11100
CC, 8 X’s
SS, 9 X’s
High-impedance
TCSL
...
N
A
0
0
XX
...
D
N
D
0
CSL
T
...
...
D
N
D
0
DS21130E-page 8 2004 Microchip Technology Inc.
FIGURE 3-4:EWDS
93AA76/86
CS
CLK
DI
10000XX
ORG = VCC, 8 X’s
ORG = V
SS, 9 X’S
FIGURE 3-5:WRITE
CS
CLK
DI
DO
101A
N
High-impedance
TCSL
...
Standby
...
A
0
...
D
N
D
0
T
CZ
Busy
Ready
TWC
FIGURE 3-6:WRAL
CS
CLK
DI
DO
ORG = VCC, 8 X’s
ORG = V
10001X
SS, 9 X’s
High-impedance
Ensured at Vcc = +4.5V to +6.0V.
...
XD
N
Standby
...
D
0
TCZ
Ready
Busy
WL
T
2004 Microchip Technology Inc.DS21130E-page 9
93AA76/86
FIGURE 3-7:ERASE
CS
CLK
DI
DO
111A
FIGURE 3-8:ERAL
CS
CLK
DI
DO
10010XX
N
High-impedance
High-impedance
Standby
...
...
...
A
0
TCZ
Busy
TWC
Busy
Ready
Standby
TCZ
Ready
ORG = V
ORG = V
CC, 8 X’s
SS, 9 X’s
Ensured at VCC = +4.5V to +6.0V.
EC
T
DS21130E-page 10 2004 Microchip Technology Inc.
93AA76/86
4.0PIN DESCRIPTIONS
TABLE 4-1:PIN FUNCTION TABLE
NameFunction
CSChip Select
CLKSerial Data Clock
DISerial Data Input
DOSerial Data Output
SSGround
V
ORGMemory Configuration
PEProgram Enable
CCPower Supply
V
4.1Chip Select (CS)
A high level selects the device. A low level deselects
the device and fo rces it into S t andby mo de. Howev er , a
programming cycle which is already initiated will be
completed, regardless of the CS input signal. If CS is
brought low during a program cycle, the device will go
into Standby mode as soon as the programming cycle
is completed.
CS must be low for 250 ns minimum (T
consecutive instructions. If CS is low, the internal
control logic is held in a Reset status.
4.2Serial Clock (CLK)
The Serial Clock is used to synchronize the communication between a master device and the 93AA76/86.
Opcode, addre ss and data bits are clo cked in on the
positive edge of CLK. D at a bit s are also cloc ked out on
the positive edge of CLK.
CLK can be stopped anywhere in the transmission
sequence (at high or low level) and can be continued
anytime with respect to clock high time (T
clock low time (T
freedom in preparing opcode, address and data.
CLK is a “don't care” if CS is l ow (devic e desele cted). If
CS is high, but Start condition has not been detected,
any number of clock cycles can be received by the
device without chan ging i t s st atus (i.e., waiting for Start
condition).
CLK cycles are not required during the self-timed write
(i.e., auto erase/write) cycle.
CKL). This gives the controlling mas ter
CSL) between
CKH) and
After detection of a S t art condition t he specified numb er
of clock cycles (respectively low-to-high transitions of
CLK) must be provided. These clock cycles are
required to clock in all opcode, address and data bits
before an instruction is executed (see Table 1-2
through Table 1-6 for more details). CLK and DI then
become “don’t care” inputs waiting for a new Start
condition to be detected.
Note:CS must go low between consecutive
instructions, except when performing a
sequential read (Refer to Section 3.1“READ” for more detail on sequential
reads).
4.3Data In (DI)
Data In is used to clock in a Start bit, opcode, address
and data synchronously with the CLK input.
4.4Data Out (DO)
Data Out is used in the Read mode to output data
synchronously with the CLK input (T
positive edge of CLK).
This pin also provides Ready/Busy
during erase and write c ycles. Ready/Bu sy
mation is available when CS is hi gh. It will be displaye d
until the next Start bit occurs as long as C S st ays high.
PD after the
status inf ormation
status infor-
4.5Organization (ORG)
When ORG is connected to VCC, the x16 memory
organization is se lec ted . When ORG is tied to V
x8 memory organization is selected. There is an
internal pull-up resistor on the ORG pin that will select
x16 organization when left unconnected.
SS, the
4.6Program Enable (PE)
This pin allows the user to enable or disable the ability
to write data to the memory array. If the PE pin is
floated or tied to V
If the PE pin is tied to V
inhibited. There is an intern al pull-up on thi s device that
enables programming if this pin is left floating.
CC, the device can be programmed.
SS, programming will be
2004 Microchip Technology Inc.DS21130E-page 11
93AA76/86
5.0PACKAGING INFORMATION
5.1Package Marking Information
8-Lead PDIP
XXXXXXXX
XXXXXNNN
YYWW
8-Lead SOIC (.150”)
XXXXXXXX
XXXXYYWW
NNN
Example
93AA76
017
0410
Example
93AA86
/SN0410
017
DS21130E-page 12 2004 Microchip Technology Inc.
8-Lead Plastic Dual In-line (P) – 300 mil Body (PDIP)
E1
D
2
93AA76/86
n
E
β
eB
Number of Pins
Pitch
Top to Seating PlaneA.140.155.1703.563.944.32
Molded Package ThicknessA2.115.130.1452.923.303.68
Base to Seating PlaneA1.0150.38
Shoulder to Shoulder WidthE.300.313.3257.627.948.26
Molded Package WidthE1.240.250.2606.106.356.60
Overall LengthD.360.373.3859.149.469.78
Tip to Seating PlaneL.125.130.1353.183.303.43
Lead Thickness
Upper Lead WidthB1.045.058.0701.141.461.78
Lower Lead WidthB.014.018.0220.360.460.56
Overall Row Spacing§eB.310.370.4307.879.4010.92
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
Dimension LimitsMINNOMMAXMINNOMMAX
1
α
A
c
UnitsINCHES*MILLIMETERS
n
p
c
α
β
.008.012.0150.200.290.38
A1
B1
B
88
.1002.54
51015 51015
51015 51015
A2
L
p
2004 Microchip Technology Inc.DS21130E-page 13
93AA76/86
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil Body (SOIC)
E
E1
p
D
2
B
Number of Pins
Pitch
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
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Connecting to the Microchip Internet
Web Site
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Micr ochip specific bu siness informatio n is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for p roducts, D evelopment Systems,
technical information and more
• Listing of seminars and events
®
or Microsoft
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
®
Plus, this line provides information on how customers
can receive the most c urrent upgrade kit s. The Hot Line
Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
2004 Microchip Technology Inc.DS21130E-page 17
93AA76/86
READER RESPONSE
It is our intentio n to pro vi de you with the best docu mentation possib le to e ns ure successful use of y ou r M ic roc hip pro duct. If you wish to provid e your c omment s on org anizatio n, clarity, subject matter , a nd ways in whic h our doc umenta tion
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
RE:Reader Response
From:
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
Technical Publications Manager
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Total Pages Sent ________
FAX: (______) _________ - _________
DS21130E93AA76/86
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21130E-page 18 2004 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or ob tain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.X/XXXXX
93AA76/86
Device
Device93AA76/86: Microwire Serial EEPROM
Temperature Range Blank = 0°C to +70°C
PackageP=PDIP
Range
93AA76/86T: Microwire Serial EEPROM (Tape and Reel)
SN=Plastic SOIC (150) mil Body), 8-lead
PatternPackageTemperature
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.Your local Microchip sales office
2.The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3.The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2004 Microchip Technology Inc.DS21130E-page 19
93AA76/86
NOTES:
DS21130E-page 20 2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•Microchip is willing to work with the customer who is concerned about the integrity of their code.
•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are com mitted to continuously improving the code protect ion f eatures of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digit al Mill ennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Tec hnolo gy Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
®
8-bit MCUs, KEELOQ
®
code hopping
2004 Microchip Technology Inc.DS21130E-page 21
WORLDWIDE SALESAND SERVICE
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: www.microchip.com
Atlanta
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071
Fax: 630-285-0075