The Microchip Technology Inc. 25AA320/25LC320/
25C320 (25XX320
Erasable PROMs. The memory is accessed via a
simple Serial Peripheral Interface (SPI™) compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the dev ice is contro lled th rough a C hip
Select (CS
) input.
Communication to the device can be paused via the
hold pin (HOLD
transitions on its inputs will be ignored, with the
exception of Chip Select, allowing the host to service
higher priority interrupts.
*
) are 32 Kbit serial Electrically
). While the device is paused,
Block Diagram
SO
CS
SCK
HOLD
WP
SI
Status
Register
I/O Control
Logic
Memory
Control
Logic
VCC
VSS
XDEC
HV Generator
EEPROM
Array
Page
Latches
Y Decoder
Sense Amp.
R/W Control
Package Types
PDIP, SOIC
1
CS
2
SO
3
WP
4
VSS
*25XX320 is used in this document as a generic part number for the 25AA320/25LC320/25C320 devices.
SS ........................................................................................................ -0.6V to VCC + 1.0V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias............................................................................................................... -40°C to 125°C
ESD protection on all pins..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stres s ratin g only and func tional operati on of the devic e at thos e or any other co nditio ns abov e thos e
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.
HOOutput Hold Time0—ns(Note 1)
DISOutput Disable Time—
—
—
16T
HSHOLD Setup Time100
100
200
17T
HHHOLD Hold Time100
100
200
18T
HZHOLD Low to Output
High-Z
100
150
200
19T
HVHOLD High to Output
Valid
100
150
200
20T
WCInternal Write Cycle
—5ms—
Time
21—Endurance1M—E/W
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but established by characterization. For endurance estimates in a specific application,
please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at: www.microchip.com.
A = -40°C to +85°CVCC = 1.8V to 5.5V
A = -40°C to +125°CVCC = 2.5V to 5.5V
3
2
1
MHz
MHz
MHz
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
150
230
—
200
250
—
—
—
—
—
—
—
—
—
—
—
—
—
Cycles
CC = 4.5V to 5.5V
V
CC = 2.5V to 5.5V
V
CC = 1.8V to 5.5V
V
ns
VCC = 4.5V to 5.5V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CC = 2.5V to 5.5V
V
CC = 1.8V to 5.5V
V
VCC = 4.5V to 5.5V
CC = 2.5V to 5.5V
V
CC = 1.8V to 5.5V
V
VCC = 4.5V to 5.5V
CC = 2.5V to 5.5V
V
V
CC = 1.8V to 5.5V
VCC = 4.5V to 5.5V
CC = 2.5V to 5.5V
V
V
CC = 1.8V to 5.5V
CC = 4.5V to 5.5V
V
CC = 2.5V to 5.5V
V
CC = 1.8V to 5.5V
V
CC = 4.5V to 5.5V
V
CC = 2.5V to 5.5V
V
CC = 1.8V to 5.5V
V
VCC = 4.5V to 5.5V
V
CC = 2.5V to 5.5V
CC = 1.8V to 5.5V
V
CC = 4.5V to 5.5V (Note 1)
V
CC = 2.5V to 5.5V (Note 1)
V
CC = 1.8V to 5.5V
V
VCC = 4.5V to 5.5V
CC = 2.5V to 5.5V
V
CC = 1.8V to 5.5V
V
VCC = 4.5V to 5.5V
CC = 2.5V to 5.5V
V
CC = 1.8V to 5.5V
V
VCC = 4.5V to 5.5V (Note 1)
CC = 2.5V to 5.5V (Note 1)
V
CC = 1.8V to 5.5V
V
VCC = 4.5V to 5.5V
CC = 2.5V to 5.5V
V
V
CC = 1.8V to 5.5V
(Note 2)
2004 Microchip Technology Inc.DS21227E-page 3
25AA320/25LC320/25C320
FIGURE 1-1:HOLD TIMING
CS
17
High-impedance
SCK
SO
161617
n+2n+1nn-1
1918
n
SI
HOLD
n+2n+1n
FIGURE 1-2:SERIAL INPUT TIMING
CS
2
Mode 1,1
Mode 0,0
SCK
65
SI
SO
MSB in
High-impedance
LSB in
5
n
n-1
4
12
11
don’t care
7
8
3
FIGURE 1-3:SERIAL OUTPUT TIMING
CS
9
10
SCK
13
SO
SI
DS21227E-page 4 2004 Microchip Technology Inc.
MSB out
don’t care
14
3
Mode 1,1
Mode 0,0
15
ISB out
25AA320/25LC320/25C320
TABLE 1-3:AC TEST CONDITIONSFIGURE 1-4:AC TEST CIRCUIT
AC Waveform:
VLO = 0.2V—
HI = VCC - 0.2V (Note 1)
V
VHI = 4.0V (Note 2)
Timing Measurement Reference Lev el
Input0.5 V
Output0.5 VCC
Note 1: For VCC≤ 4.0V
2: For V
CC > 4.0V
CC
SO
VCC
2.25 KΩ
1.8 KΩ
100 pF
2004 Microchip Technology Inc.DS21227E-page 5
25AA320/25LC320/25C320
2.0PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:PIN FUNCTION TABLE
NamePDIPSOIC
CS
SO2242Serial Data Output
NC———3,4,5Not Connected
WP
Vss4467Ground
SI5578Serial Data Input
SCK6689Serial Clock Input
NC———10,11,12Not Connected
HOLD
Vcc88214Supply Voltage
1131Chip Select Input
3356Write-Protect Pin
77113Hold Input
8-pin
TSSOP
2.1Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardle ss of
the CS input signal. If CS is brought high during a
program cycle, the de vice wil l go into S t andb y mode as
soon as the programming cycle is complete. When the
device is deselected, SO goes to the high-impedance
state, allowing multiple parts to share the same SPI
bus. A lo w-to-high transiti on on CS
sequence initiates an internal write cycle. After powerup, a low level on CS is r equ ired p r ior to any sequence
being initiated.
after a valid write
2.2Serial Output (SO)
The SO pin is used to transfer data out of the 25XX320.
During a read cycle, data is shifted out on this pin after
the falling edge of the serial clock.
2.3Write-Protect (WP)
This pin is used in conjunction with the WPEN bit in the
Status register to prohibit writes to the nonvolatile bits
in the Status register. When WP is low and WPEN is
high, writing to the no nvolatil e bits in the Status register
is disabled. All other operations function normally.
When WP
nonvolatile bits in the Status register operate normally.
If the WPEN bit is set, WP
write sequence will disable writing to the Status
register. If an internal write cycle has already begun,
WP
is high, all functions, including writes to the
low during a Status register
going low will have no effect on the write.
14-lead
TSSOP
The WP pin function is blocked when the WPEN bit in
the St atus regi ster is low. This allo ws the use r to ins t al l
the 25XX320 in a system with WP
still be able to write to the Status register. The WP
functions will be enabled when the WPEN bit is set
high.
2.4Serial Input (SI)
The SI pin is used to transfer data into the device. It
receives instructions, addresses, and data. Data is
latched on the rising edge of the serial clock.
2.5Serial Clock (SCK)
The SCK is used to synchronize the communication
between a master and the 25XX320. Instructions,
addresses, or data present on the SI pin are latched on
the rising edge of t he c lo ck input, while data on the SO
pin is updated after the falling edge of the clock input.
2.6Hold (HOLD)
The HOLD pin is used to suspend transmission to the
25XX320 while in the middle of a seri al sequ ence wit hout having to re-transmit the entire sequence again. It
must be held high any time this function is not being
used. Once the device is selected and a serial
sequence is underway, the HOLD
low to pause further serial communication without
resetting the serial sequence. The HOLD pin must be
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high-tolow transition. Th e 25XX320 must remain se lected d uring this sequence. The SI, SCK, and SO pins are in a
high-impedance state during the time the device is
paused and transitions on these p ins will be ignored. To
resume serial communication, HOLD
high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
Description
pin grounded and
pin
pin may be pulled
must be brought
DS21227E-page 6 2004 Microchip Technology Inc.
25AA320/25LC320/25C320
3.0FUNCTIONAL DESCRIPTION
3.1Principles Of Operation
The 25XX320 are 4096 byte Serial EEPROMs
designed to interf ace di rec tly with the Serial Peripheral
Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s
PIC16C6X/7X microcontrollers. It may also interface
with microcontroll ers that do not ha ve a built-in SPI port
by using discrete I/O lines programmed properly with
the software.
The 25XX320 conta ins an 8-bit instr uction regi ster . The
device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS
be low and the HOLD
operation.
Table 3-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses and data are transf erred MSB first, LSB last.
Data is sampled on the fir st rising edge of SCK after CS
goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD
mode. After releasing the HOLD
resume from the point when the HOLD
input and place the 25XX320 in ‘HOLD’
pin must be high fo r the entire
pin, operation will
3.2Read Sequence
The device is selected by pulling CS low. The 8-bit
READ instruction is transmitted to the 25XX320 followed by the 16- b it ad dr e s s, wi t h the fo ur MS Bs of t he
address being don’t care bits. After the correct READ
instruction and add res s a re s en t, the data stored in the
memory at the selected address is shifted out on the
SO pin. The data stored in the memory at the next
address can be read sequentially by continuing to provide clock pulses . Th e in tern al a ddress pointer is automatically incremented to the next higher address after
each byte of data is shifted out. When the highest
address is reached (0FFFh), the address counter rolls
over to address 0000h allowing the read cycle to be
continued indefi nitely. The read operat ion is te rminated
by raising the CS
pin (Figure 3-1).
pin must
was asserted.
3.3Write Sequence
Prior to any attempt to write data to the 25XX320, the
write enable latch must be set by issuing the WREN
instruction (Figure3-4). This is done by setting CS
and then clocking out the proper instruction into the
25XX320. After all eight bits of the instruction are
transmitted, the CS
write enable latch. If the write operation is initiated
immediately after the WREN instruction without CS
being brought high, the data will not be written to the
array because the write e nable latc h will not hav e been
properly set.
Once the write enable latch is set, the user may
proceed by setting the CS
instruction, followe d by the 16-bit address, with the four
MSBs of the address being don’t ca re bits, and then the
data to be writ ten. Up to 32 bytes of d ata ca n be sent to
the 25XX320 before a write cycle is necessary. The
only restriction is tha t al l of the byte s must reside in the
same page. A page address begins with
0000 and ends with xxxxxxxxxxx11111.
xxx0
If the internal address counter reaches
xxx1
1111 and the clock continues, the counter will
roll back to the first address of the page and overwrite
any data in the page that may have been written.
For the data to be actually written to the array, the CS
must be brought high after the least significant bit (D0)
of the n
brought high at any other time, the write operation will
not be completed. Refer to Figure 3-2 and Figure 3-3
for more detailed illustrations on the byte write
sequence and the page write sequence respectively.
While the write is in progress, the Status register may
be read to check the status of the WPEN, WIP, WEL,
BP1 and BP0 bits (Figure 3-6). A read attempt of a
memory array location will not be possible during a
write cycle. When the write cycle is completed, the
write enable latch is reset.
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Reset the write enable latch (disable write operations)
Set the write enable latch (enable write operations)
Read Status register
Write Status register
25AA320/25LC320/25C320
FIGURE 3-1:READ SEQUENCE
CS
023456789101121222324252627282930311
SCK
instruction16-bit address
SI
0100000115 14 13 12210
High-impedance
SO
FIGURE 3-2:BYTE WRITE SEQUENCE
CS
910112122232425262728293031
SCK
SI
SO
023456718
instruction16-bit addressdata byte
0000000115 14 13 12
High-impedance
FIGURE 3-3:PAGE WRITE SEQUENCE
CS
023456718
SCK
data out
76543210
Twc
21076543210
9 10112122232425262728293031
instruction16-bit addres sdata byte 1
SI
CS
3234 35 36 37 38 3933
SCK
data byte 2
SI
DS21227E-page 8 2004 Microchip Technology Inc.
76543210
0000000115 14 13 12
41 42 4346 47
40
data byte 3
76543210
21076543210
44 45
data byte n (32 max)
76543210
25AA320/25LC320/25C320
3.4Write Enable (WREN) and Write
Disable (WRDI)
The 25XX320 contains a write enable latch. See
Table 3-3 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation w ill be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.
FIGURE 3-4:WRITE ENABLE SEQUENCE
CS
02345671
SCK
SI
SO
01000001
High-impedance
The following is a list of conditions under which the
write enable latch will be reset:
• Power-up
• WRDI instruction successfully executed
• WRSR instruction successfully executed
• WRITE instruction successfully executed
FIGURE 3-5:WRITE DISABLE SEQUENCE
CS
02345671
SCK
SI
SO
01000001
0
High-impedance
2004 Microchip Technology Inc.DS21227E-page 9
25AA320/25LC320/25C320
3.5Read Status Register Instruction
(RDSR)
The Read Status Register instruction (RDSR) provides
access to the Status register. The Status register may
be read at any time, even during a write cycle. The
Status register is formatted as follows:
76543 2 1 0
WPENXXXBP1BP0WELWIP
The Write-In-Process (WIP) bit indicates whether the
25XX320 is busy with a write operation. When set to a
1’, a write is in progress; when set to a ‘0’, no write is
‘
in progress. This bit is read-only.
The Wri te Enable Lat ch (WEL) bit indicat es the st atus
of the write enable latch. When set to a ‘
allows writes to the array, when set to a ‘
prohibits writes to the array. The state of this bit can
always be updated via the WREN or WRDI comma nds
regardless of the state of write protection on the Status
register. This bit is read-only.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile.
See Figure 3-6 for the RDSR timing sequence.
FIGURE 3-6:READ STATUS REGISTER TIMING SEQUENCE
CS
8
02345671
SCK
instruction
9101112131415
1’, the latch
0’, the latch
SI
SO
High-impedance
11000000
data from Status register
7654210
3
DS21227E-page 10 2004 Microchip Technology Inc.
25AA320/25LC320/25C320
3.6Write Status Register Instruction
(WRSR)
The Write S t atus Regis ter inst ruction (WRSR) all ows the
user to select one of four levels of protection for the
array by writing to the appropriate bits in the Status
register. The array is divided up into four segments.
The user has the ability to write-prote ct none, one , two,
or all four of the segment s of th e array. The partitioning
is controlled as shown in Table 3-2.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bi t for the WP
Write-Protect (WP
(WPEN) bit in the Status register control the programmable hardware write-protect feature. Hardware write
protection is enabled when WP
WPEN bit is high. Hardw are write protec tion is disa bled
when either the WP pin is high or the WPEN bit is low.
) pin and the Write-Protect Enable
pin is low and the
pin. The
When the chip is hardware write-protected, only writes
to nonvolatile bits in the Status register are disabled.
See T abl e 3-3 for a matrix of functionalit y on the WPEN
bit.
See Figure 3-7 for the WRSR timing sequence.
TABLE 3-2:ARRAY PROTECTION
BP1BP0
00
01
10
11
FIGURE 3-7:WRITE STATUS REGISTER TIMING SEQUENCE
CS
Array Addresses
Write-Protected
none
upper 1/4
(0C00h - 0FFFh)
upper 1/2
(0800h - 0FFFh)
all
(0000h - 0FFFh)
SCK
SI
SO
02345671
8
9101112131415
instructiondata to Status register
01000000
High-impedance
7654
210
3
2004 Microchip Technology Inc.DS21227E-page 11
25AA320/25LC320/25C320
3.7Data Protection
The following protection has been implemented to
prevent in advertent writes to the array:
• The write enable latch is reset on power-up
•A WRITE ENABLE instruction must be issued to
set the write enable latch
• After a byte write, page write or Status register
write, the write enable latch is reset
must be set high after the proper number of
•CS
clock cycles to start an internal write cycle
• Access to the array during an internal write cycle
is ignored and programming is continued
YYear code (last digit of calendar year)
YYYear code (last 2 digits of calendar year)
WWWeek code (week of January 1 is week ‘01’)
NNNAlphanumeric traceability code
Note:In the event the full Microchi p pa rt numbe r cannot be marke d on one li ne, it wi ll
be carried over to the next line thus limiti ng the number of available characters
for customer specific information.
*Standard marking consists of Microchip part number, year code, week code, and traceability code. For
device markings beyond this, certain price adders apply. Please check with your Microchip Sales Office.
For QTP devices, any special marking adders are included in QTP price.
Example:
25L32
YYWW
NNN
2004 Microchip Technology Inc.DS21227E-page 13
25AA320/25LC320/25C320
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
E
β
eB
Number of Pins
Pitch
Top to Seating PlaneA.140.155.1703.563.944.32
Molded Package ThicknessA2.115.130.1452.923.303.68
Base to Seating PlaneA1.0150.38
Shoulder to Shoulder WidthE.300.313.3257.627.948.26
Molded Package WidthE1.240.250.2606.106.356.60
Overall LengthD.360.373.3859.149.469.78
Tip to Seating PlaneL.125.130.1353.183.303.43
Lead Thickness
Upper Lead WidthB1.045.058.0701.141.461.78
Lower Lead WidthB.014.018.0220.360.460.56
Overall Row Spacing§eB.310.370.4307.879.4010.92
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
Dimension LimitsMINNOMMAXMINNOMMAX
1
α
A
c
UnitsINCHES*MILLIMETERS
n
p
c
α
β
.008.012.0150.200.290.38
A1
B1
B
88
.1002.54
51015 51015
51015 51015
A2
L
p
DS21227E-page 14 2004 Microchip Technology Inc.
25AA320/25LC320/25C320
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
Number of Pins
Pitch
Standoff §
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
n
B
1
A
c
A1
φ
β
A1
n
p
φ
c
α
β
048048
Number of Pins
Pitch
Standoff §
Foot Angle
Lead Thickne ss
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
n
p
A2
φ
c
α
β
L
MILLIMETERS*INCHESUnits
0.65.026
α
A2A1
MAXNOMMINMAXNOMMINDimension Limits
1414
1.10.043AOverall Height
0.950.900.85.037.035.033
0.150.100.05.006.004.002A1Standoff §
6.506.386.25.256.251.246EOverall Width
4.504.404.30.177.173.169E1M olded Package Width
5.105.004.90.201.197.193DMolded Package Length
0.700.600.50.028.024.020LFoot Length
840840
0.200.150.09.008.006.004
0.300.250.19.012.010.007BLead Width
10501050
10501050
2004 Microchip Technology Inc.DS21227E-page 17
25AA320/25LC320/25C320
APPENDIX A:REVISION HISTORY
Revision D
Corrections to Section 1.0, Electrical Characteristics.
Revision E
Revise Endurance from 100K to 1M.
DS21227E-page 18 2004 Microchip Technology Inc.
25AA320/25LC320/25C320
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2004 Microchip Technology Inc.DS21227E-page 19
25AA320/25LC320/25C320
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DS21227E25AA320/25LC320/25C320
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DS21227E-page 20 2004 Microchip Technology Inc.
25AA320/25LC320/25C320
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.X/XX
Device
Range
Device:25AA320:32 Kbit 1.8V SPI Serial EEPROM
25AA320T:32 Kbit 1.8V SPI Serial EEPROM
25AA320X32-bit 1.8V SPI Serial EEPROM
25AA320XT32-bit 1.8V SPI Serial EEPROM
25LC320:32 Kbit 2.5V SPI Serial EEPROM
25LC320T:32 Kbit 2.5V SPI Serial EEPROM
25LC320X32-bit 2.5V SPI Serial EE PROM
25LC320XT32-bit 2.5V SPI Serial EEPROM
25C320:32 Kbit 5V SPI Serial EEPROM
25C320T:32 Kbit 5V SPI Serial EEPROM
25C320X32-bit 5V SPI Serial EEPROM
25C320XT32-bit 5V SPI Serial EEPROM
PackageTemperature
(Tape and Reel)
in alternate pinout (ST only)
in alternate pinout Tape and Reel
(ST only)
(Tape and Reel)
in alternate pinout (ST only)
in alternate pinout Tape and Reel
(ST only)
(Tape and Reel)
in alternate pinout (ST only)
in alternate pinout Tape and Reel
(ST only)
Examples:
a)25LC320-I/SN: Industrial Temp.,
SOIC package
b)25LC320T-I/SN: Tape and Reel,
Industrial Temp., SOIC package
c)25LC320-E/SN: Extended Temp.,
SOIC package
d)25C320-I/SN: Industrial Temp.,
SOIC package
e)25C320T-I/SN: Tape and Reel,
Industrial Temp., SOIC package
f)25C320-I/ST: Industrial Temp.,
TSSOP package
g)25C320-E/SN: Extended Temp.,
SOIC package
Temperature
Range:
Package:P=Plastic DIP (300 mil body), 8-lead
I= -40°C to +85°C
E= -40°C to +12 5 °C
SN=Plastic SOIC (150 mil body),
8-lead
ST=Plastic TSSOP (4.4 mm body),
8-lead
ST14 =Plastic TSSOP (4.4 mm body),
14-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.Your local Microchip sales office
2.The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3.The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2004 Microchip Technology Inc.DS21227E-page 21
25AA320/25LC320/25C320
NOTES:
DS21227E-page 22 2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•Microchip is willing to work with the customer who is concerned about the integrity of their code.
•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are com mitted to continuously improving the code protect ion f eatures of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digit al Mill ennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
®
8-bit MCUs, KEELOQ
®
code hopping
2004 Microchip Technology Inc.DS21227E-page 23
WORLDWIDE SALESAND SERVICE
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-72 00
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: www.microchip.com
Atlanta
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640- 003 4
Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692- 384 8
Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285- 007 1
Fax: 630-285-0075
Dallas
16200 Addison Road, Suite 255
Addison Plaza
Addison, TX 75001
Tel: 972-818- 742 3
Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538- 225 0
Fax: 248-538-2260
Kokomo
2767 S. Albright Road
Kokomo, IN 46902
Tel: 765-864- 836 0
Fax: 765-864-8387
Los Angeles
25950 Acero St., Suite 200
Mission Viejo, CA 92691
Tel: 949-462- 952 3
Fax: 949-462-9608
San Jose
1300 Terra Bella Avenue
Mountain View, CA 94043
Tel: 650-215- 144 4
Fax: 650-961-0286
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Cana da
Tel: 905-673- 069 9
Fax: 905-673-6509
ASIA/PACIFIC
Australia
Microchip Technology Australia Pty Ltd
Unit 32 41 Rawson Street
Epping 2121, NSW
Sydney, Australia
Tel: 61-2-986 8-6 73 3
Fax: 61-2-9868-6755
China - Beijing
Unit 706B
Wan Tai Bei Hai Bldg.
No. 6 Chaoyangmen Bei Str.
Beijing, 100027, China
Tel: 86-10-85 282 10 0
Fax: 86-10-85282104
China - Chengdu
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86 766 20 0
Fax: 86-28-86766599
China - Fuzhou
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7 503 50 6
Fax: 86-591-7503521
China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401 -12 00
Fax: 852-2401-3431
China - Shanghai
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-62 75- 57 00
Fax: 86-21-6275-5060
China - Shenzhen
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-8 290 13 80
Fax: 86-755-8295-1393