MICROCHIP 25AA160A, 25AA160B, 25LC160A, 25LC160B Technical data

25AA160A/B, 25LC160A/B

16K SPI™ Bus Serial EEPROM

Device Selection Table

Part Number VCC Range Page Size Temp. Ranges Packages

25LC160A 2.5-5.5V 16 Byte I,E P, SN, ST, MS

25AA160A 1.8-5.5V 16 Byte I P, SN, ST, MS

25LC160B 2.5-5.5V 32 Byte I,E P, SN, ST, MS

25AA160B 1.8-5.5V 32 Byte I P, SN, ST, MS

Features

• Max. clock 10 MHz

• Low-power CMOS technology

• 2048 x 8-bit organization

• 16 byte page (‘A’ version devices)

• 32 byte page (‘B’ version devices)

• Write cycle time: 5 ms max.

• Self-timed ERASE and WRITE cycles

• Block write protection

- Protect none, 1/4, 1/2 or all of array

• Built-in write protection

- Power-on/off data protection circuitry

- Write enable latch

- Write-protect pin

• Sequential read

• High reliability

- Endurance: 1,000,000 erase/write cycles

- Data retention: > 200 years

- ESD protection: > 4000V

• Temperature ranges supported;

- Industrial (I): -40°Cto +85°C

- Automotive (E): -40°C to +125°C

Pin Function Table

Name Function

Description

The Microchip Technology Inc. 25AA160A/B,
25LC160A/B (25XX160A/B
Electrically Erasable PROMs. The memory is accessed
via a simple Serial Peripheral Interface™ (SPI™)
compatible serial bus. The bus signals required are a
clock input (SCK) plus separate data in (SI) and data
out (SO) lines. Access to the device is controlled
through a Chip Select (CS

Communication to the device can be paused via the
hold pin (HOLD

). While the device is paused, transi­tions on its inputs will be ignored, with the exception of
chip select, allowing the host to service higher priority
interrupts.

The 25XX160A/B is available in standard packages
including 8-lead PDIP and SOIC, and advanced
packaging including 8-lead MSOP, and 8-lead TSSOP.
Pb-free (Pure Matte Sn) finish is also available.

*

) are 16 Kbit Serial

) input.

Package Types (not to scale)

CS
SO

WP

V

SS

PDIP/SOIC

(P, SN)

1

8

2

7

3

6

4

5

V

CC

HOLD

SCK

SI

TSSOP/MSOP

(ST, MS)

1

CS

2

SO

3

WP

4

V

SS

8

V

CC

7

HOLD

6

SCK

5

SI

CS

Chip Select Input

SPI is a registered trademark of Motorola Semiconductor.

SO Serial Data Output

WP

SS Ground

V

Write-Protect

SI Serial Data Input

SCK Serial Clock Input

HOLD

V

CC Supply Voltage

 2003 Microchip Technology Inc. DS21807B-page 1

Hold Input

*25XX160A/B is used in this document as a generic part
number for the 25AA160A/B, 25LC160A/B devices.

25XX160A/B

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

(†)

VCC.............................................................................................................................................................................7.0V

All inputs and outputs w.r.t. V

SS ......................................................................................................... -0.6V to VCC +1.0V

Storage temperature .................................................................................................................................-65°C to 150°C

Ambient temperature under bias...............................................................................................................-65°C to 125°C

ESD protection on all pins..........................................................................................................................................4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.

TABLE 1-1: DC CHARACTERISTICS

DC CHARACTERISTICS

Param.

No.

D001 V

D002 V

D003 V

D004 V

D005 V

D006 V

D007 V

Sym. Characteristic Min. Max. Units Test Conditions

IH1 High-level input

IH2 0.7 VCC VCC +1 V VCC< 2.7V (Note)

IL1 Low-level input

IL2 -0.3 0.2 VCC VVCC < 2.7V (Note)

OL Low-level output

OL —0.2VIOL = 1.0 mA, VCC < 2.5V

OH High-level output

voltage

voltage

voltage

Industrial (I): T
Automotive (E): T

2.0 VCC +1 V VCC ≥ 2.7V (Note)

-0.3 0.8 V VCC ≥ 2.7V (Note)

—0.4VIOL = 2.1 mA

VCC -0.5 — V IOH = -400 µA

voltage

D008 I

LI Input leakage current ±1 µACS = VCC, VIN = VSS TO VCC

D009 ILO Output leakage

current

D010 CINT Internal Capacitance

— 7 pF T
(all inputs and
outputs)

D011 I

CC Read

—

—
Operating Current

D012 I

D013 I

CC Write — 3 mA VCC = 5.5V

CCS

Standby Current

—

—

Note: This parameter is periodically sampled and not 100% tested.

AMB = -40°C to +85°C VCC = 1.8V to 5.5V
AMB = -40°C to +125°C VCC = 2.5V to 5.5V

±1 µACS = VCC, VOUT = VSS TO VCC

AMB = 25°C, CLK = 1.0 MHz,

CC = 5.0V (Note)

V

6

mAmAVCC = 5.5V; FCLK = 10.0 MHz;

SO = Open

2.5

V

CC = 2.5V; FCLK = 5.0 MHz;

SO = Open

5

1

µAµACS

V
CS
V

= VCC = 5.5V, Inputs tied to VCC or

SS, TAMB = -40°C TO +125°C

= VCC = 2.5V, Inputs tied to VCC or

SS, TAMB = -40°C TO +85°C

DS21807B-page 2  2003 Microchip Technology Inc.

TABLE 1-2: AC CHARACTERISTICS

25XX160A/B

AC CHARACTERISTICS

Param.

No.

1F

Sym. Characteristic Min. Max. Units Test Conditions

CLK Clock Frequency —

Industrial (I): T
Automotive (E): T

—
—

2T

CSS CS Setup Time 50

100
150

3T

CSH CS Hold Time 100

200
250

4T

CSD CS Disable Time 50 — ns —

5 Tsu Data Setup Time 10

20
30

6T

HD Data Hold Time 20

40
50

7T

8T

9T

R CLK Rise Time — 500 ns (Note 1)

F CLK Fall Time — 500 ns (Note 1)

HI Clock High Time 50

100
150

10 T

LO Clock Low Time 50

100
150

11 T

12 T

13 T

CLD Clock Delay Time 50 — ns —

CLE Clock Enable Time 50 — ns —

V Output Valid from Clock

Low

—
—
—

14 T

15 T

HO Output Hold Time 0 — ns (Note 1)

DIS Output Disable Time —

—
—

16 T

HS HOLD Setup Time 20

40
80

AMB = -40°C to +85°C VCC = 1.8V to 5.5V
AMB = -40°C to +125°C VCC = 2.5V to 5.5V

10

5
3

—
—
—

—
—
—

—
—
—

—
—
—

—
—
—

—
—
—

50
100
160

40

80
160

—

—

—

Note 1: This parameter is periodically sampled and not 100% tested.

2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained from our web site:
www.microchip.com.

WC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle is

3: T

complete.

MHz
MHz
MHz

ns
ns
ns

ns
ns
ns

ns
ns
ns

ns
ns
ns

ns
ns
ns

ns
ns
ns

ns
ns
ns

ns
ns
ns

ns
ns
ns

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

CC < 4.5V
CC < 2.5V

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

CC < 4.5V
CC < 2.5V

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

4.5V ≤ V

2.5V ≤ V

1.8V ≤ V

4.5V ≤ V

2.5V ≤ V

1.8V ≤ V

CC < 4.5V
CC < 2.5V

CC ≤ 5.5V
CC < 4.5V
CC < 2.5V

CC ≤ 5.5V
CC < 4.5V
CC < 2.5V

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

CC < 4.5V
CC < 2.5V

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

4.5V ≤ V

2.5V ≤ V

1.8V ≤ V

4.5V ≤ V

2.5V ≤ V

1.8V ≤ V

CC < 4.5V
CC < 2.5V

CC ≤ 5.5V
CC < 4.5V
CC < 2.5V

CC ≤ 5.5V (Note 1)
CC ≤ 4.5V (Note 1)
CC ≤ 2.5V (Note 1)

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

CC < 4.5V
CC < 2.5V

 2003 Microchip Technology Inc. DS21807B-page 3

25XX160A/B

TABLE 1-2: AC CHARACTERISTICS (CONTINUED)

Industrial (I): T
Automotive (E): T

Param.

No.

AC CHARACTERISTICS

Sym. Characteristic Min. Max. Units Test Conditions

17 THH HOLD Hold Time 20

40
80

18 T

HZ HOLD Low to Output

High-Z

30
60

160

19 T

HV HOLD High to Output

Val id

30
60

160

20 T

WC Internal Write Cycle Time — 5 ms (NOTE 3)

AMB = -40°C to +85°C VCC = 1.8V to 5.5V
AMB = -40°C to +125°C VCC = 2.5V to 5.5V

—
—
—

—
—
—

—
—
—

ns
ns
ns

ns
ns
ns

ns
ns
ns

21 — Endurance 1M — E/W

Cycles

Note 1: This parameter is periodically sampled and not 100% tested.

2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained from our web site:
www.microchip.com.

WC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle is

3: T

complete.

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

4.5V ≤ V

2.5V ≤ V

1.8V ≤ V

CC < 4.5V
CC < 2.5V

CC ≤ 5.5V (Note 1)
CC < 4.5V (Note 1)
CC < 2.5V (Note 1)

4.5V ≤ VCC ≤ 5.5V

2.5V ≤ V

1.8V ≤ V

(N

CC < 4.5V
CC < 2.5V

OTE 2)

TABLE 1-3: AC TEST CONDITIONS

AC Waveform:

LO = 0.2V —

V

HI = VCC - 0.2V (Note 1)

V

V

HI = 4.0V (Note 2)

Timing Measurement Reference Level

Input 0.5 V

Output 0.5 VCC

Note 1: For VCC ≤ 4.0V

2: For V

CC > 4.0V

CC

DS21807B-page 4  2003 Microchip Technology Inc.

FIGURE 1-1: HOLD TIMING

CS

SCK

SO

n+2 n+1 n n-1

16

17

18

high-impedance

16

25XX160A/B

17

19

n

SI

HOLD

n+2 n+1 n

FIGURE 1-2: SERIAL INPUT TIMING

CS

2

Mode 1,1

Mode 0,0

SCK

65

SI

SO

MSB in

high-impedance

don’t care

7

8

LSB in

5

n

3

n-1

4

12

11

FIGURE 1-3: SERIAL OUTPUT TIMING

CS

9

10

SCK

13

SO

SI

 2003 Microchip Technology Inc. DS21807B-page 5

MSB out

don’t care

14

3

Mode 1,1

Mode 0,0

15

ISB out

25XX160A/B

2.0 FUNCTIONAL DESCRIPTION

2.1 Principles of Operation

The 25XX160A/B are 2048 byte Serial EEPROMs
designed to interface directly with the Serial Peripheral
Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s
PICmicro
microcontrollers that do not have a built-in SPI port by
using discrete I/O lines programmed properly with the
software.

The 25XX160A/B contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS
be low and the HOLD
operation.

Table 2-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSB first, LSB
last.

Data (SI) is sampled on the first rising edge of SCK
after CS
peripheral devices on the SPI bus, the user can assert
the HOLD
mode. After releasing the HOLD
resume from the point when the HOLD

2.2 Read Sequence

The device is selected by pulling CS low. The 8-bit read
instruction is transmitted to the 25XX160A/B followed
by the 16-bit address, with the five MSBs of the
address being don’t care bits. After the correct read
instruction and address are sent, the data stored in the
memory at the selected address is shifted out on the
SO pin. The data stored in the memory at the next
address can be read sequentially by continuing to
provide clock pulses. The internal address pointer is
automatically incremented to the next higher address
after each byte of data is shifted out. When the highest
address is reached (07FFh), the address counter rolls
over to address 0000h allowing the read cycle to be
continued indefinitely. The read operation is terminated
by raising the CS

®

microcontrollers. It may also interface with

pin must

pin must be high for the entire

goes low. If the clock line is shared with other

input and place the 25XX160A/B in ‘HOLD’

pin, operation will

was asserted.

pin (Figure 2-1).

2.3 Write Sequence

Prior to any attempt to write data to the 25XX160A/B,
the write enable latch must be set by issuing the WREN
instruction (Figure 2-4). This is done by setting CS
and then clocking out the proper instruction into the
25XX160A/B. After all eight bits of the instruction are
transmitted, the CS
write enable latch. If the write operation is initiated
immediately after the WREN instruction without CS
being brought high, the data will not be written to the
array because the write enable latch will not have been
properly set.

Once the write enable latch is set, the user may
proceed by setting the CS
instruction, followed by the 16-bit address, with the five
MSBs of the address being don’t care bits, and then the
data to be written. Up to 16 bytes (25XX160A) or 32
bytes (25XX160B) of data can be sent to the device
before a write cycle is necessary. The only restriction is
that all of the bytes must reside in the same page.

Note: Page write operations are limited to writing

bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and, end at addresses that are
integer multiples of page size - 1. If a Page
Write command attempts to write across a
physical page boundary, the result is that
the data wraps around to the beginning of
the current page (overwriting data
previously stored there), instead of being
written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.

For the data to be actually written to the array, the CS
must be brought high after the Least Significant bit (D0)
of the n
brought high at any other time, the write operation will
not be completed. Refer to Figure 2-2 and Figure 2-3
for more detailed illustrations on the byte write
sequence and the page write sequence respectively.
While the write is in progress, the Status Register may
be read to check the status of the WPEN, WIP, WEL,
BP1 and BP0 bits (Figure 2-6). A read attempt of a
memory array location will not be possible during a
write cycle. When the write cycle is completed, the
write enable latch is reset.

th

data byte has been clocked in. If CS is

must be brought high to set the

low, issuing a WRITE

low

DS21807B-page 6  2003 Microchip Technology Inc.

Block Diagram

25XX160A/B

SO

CS

SCK

HOLD

WP

I/O Control

SI

Status

Register

Logic

Memory

Control

Logic

VCC
VSS

X

Dec

HV Generator

EEPROM

Array

Page Latches

Y Decoder

Sense Amp.
R/W Control

TABLE 2-1: INSTRUCTION SET

Instruction Name Instruction Format Description

READ

WRITE

WRDI
WREN
RDSR
WRSR

0000 0011
0000 0010
0000 0100
0000 0110
0000 0101
0000 0001

Read data from memory array beginning at selected address

Write data to memory array beginning at selected address

Reset the write enable latch (disable write operations)

Set the write enable latch (enable write operations)

Read Status Register

Write Status Register

FIGURE 2-1: READ SEQUENCE

CS

0 2 3 4 5 6 7 8 910 11 21222324252627282930311

SCK

instruction 16-bit address

SI

SO

 2003 Microchip Technology Inc. DS21807B-page 7

0100000 1 15 14 13 12 210

high-impedance

data out

76543210

25XX160A/B

FIGURE 2-2: BYTE WRITE SEQUENCE

CS

8

9 1011 2122232425262728293031

SCK

SI

SO

0 2345671

instruction 16-bit address data byte

0000000 1 15 14 13 12

high-impedance

FIGURE 2-3: PAGE WRITE SEQUENCE

CS

8

SCK

SI

CS

0 2345671

instruction 16-bit address data byte 1

0000000 1 15 14 13 12

Twc

21076543210

9 1011 2122232425262728293031

21076543210

SCK

SI

32 34 35 36 37 38 3933

data byte 2

76543210

41 42 43 46 47

40

data byte 3

76543210

44 45

data byte n (16/32 max)

76543210

DS21807B-page 8  2003 Microchip Technology Inc.

25XX160A/B

2.4 Write Enable (WREN) and Write
Disable (WRDI)

The 25XX160A/B contains a write enable latch. See
Table 2-4 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.

FIGURE 2-4: WRITE ENABLE SEQUENCE (WREN)

CS

0 2345671

SCK

SI

SO

010000 01

high-impedance

The following is a list of conditions under which the
write enable latch will be reset:

• Power-up

• WRDI instruction successfully executed

• WRSR instruction successfully executed

• WRITE instruction successfully executed

FIGURE 2-5: WRITE DISABLE SEQUENCE (WRDI)

CS

02345671

SCK

SI

SO

010000 01

high-impedance

0

 2003 Microchip Technology Inc. DS21807B-page 9

25XX160A/B

2.5 Read Status Register Instruction

(RDSR)

The Read Status Register instruction (RDSR) provides
access to the Status Register. The Status Register may
be read at any time, even during a write cycle. The
Status Register is formatted as follows:

TABLE 2-2: STATUS REGISTER

7 654 3 2 1 0

W/R – – – W/R W/R R R
WPEN X X X BP1 BP0 WEL WIP
W/R = writable/readable. R = read-only.

The Write-In-Process (WIP) bit indicates whether the
25XX160A/B is busy with a write operation. When set

1’, a write is in progress, when set to a ‘0’, no write

to a ‘
is in progress. This bit is read-only.

The Write Enable Latch (WEL) bit indicates the status
of the write enable latch and is read-only. When set to
a ‘

1’, the latch allows writes to the array, when set to a

0’, the latch prohibits writes to the array. The state of

‘
this bit can always be updated via the WREN or WRDI
commands regardless of the state of write protection
on the Status Register. These commands are shown in
Figure 2-4 and Figure 2-5.

The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile, and are shown in Table 2-3.

See Figure 2-6 for the RDSR timing sequence.

FIGURE 2-6: READ STATUS REGISTER TIMING SEQUENCE (RDSR)

CS

8

0 2345671

91011 12131415

SCK

SO

SI

instruction

high-impedance

11000000

data from Status Register

7654 2 10

3

DS21807B-page 10  2003 Microchip Technology Inc.

25XX160A/B

2.6 Write Status Register Instruction

See Figure 2-7 for the WRSR timing sequence.

(WRSR)

The Write Status Register instruction (WRSR) allows the
user to write to the nonvolatile bits in the Status
Register as shown in Table 2-2. The user is able to
select one of four levels of protection for the array by
writing to the appropriate bits in the Status Register.
The array is divided up into four segments. The user
has the ability to write-protect none, one, two or all four
of the segments of the array. The partitioning is
controlled as shown in Table 2-3.

The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP
Write-Protect (WP
(WPEN) bit in the Status Register control the
programmable hardware write-protect feature. Hard­ware write protection is enabled when WP
and the WPEN bit is high. Hardware write protection is
disabled when either the WP
bit is low. When the chip is hardware write-protected,
only writes to nonvolatile bits in the Status Register are
disabled. See Table 2-4 for a matrix of functionality on
the WPEN bit.

) pin and the Write-Protect Enable

pin is high or the WPEN

pin. The

pin is low

FIGURE 2-7: WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)

TABLE 2-3: ARRAY PROTECTION

BP1 BP0

00
01

10

11

Array Addresses

Write-Protected

none

upper 1/4

(0600h - 07FFh)

upper 1/2

(0400h - 07FFh)

all

(0000h - 07FFh)

CS

SCK

SO

SI

0 2345671

8

91011 12131415

instruction data to Status Register

210

01000000

high-impedance

7654

3

 2003 Microchip Technology Inc. DS21807B-page 11

25XX160A/B

2.7 Data Protection

The following protection has been implemented to
prevent inadvertent writes to the array:

• The write enable latch is reset on power-up

• A write enable instruction must be issued to set
the write enable latch

• After a byte write, page write or Status Register
write, the write enable latch is reset

must be set high after the proper number of

•CS
clock cycles to start an internal write cycle

• Access to the array during an internal write cycle
is ignored and programming is continued

2.8 Power-On State

The 25XX160A/B powers on in the following state:

• The device is in low-power Standby mode
(CS

• The write enable latch is reset

• SO is in high-impedance state

• A high-to-low-level transition on CS
enter active state

TABLE 2-4: WRITE-PROTECT FUNCTIONALITY MATRIX

WEL

(SR bit 1)

0xx
10x
1
1

WPEN

(SR bit 7)

1

1

WP

(pin 3)

0 (low)

1 (high)

Protected Blocks Unprotected Blocks Status Register

Protected Protected Protected

Protected Writable Writable

Protected Writable Protected

Protected Writable Writable

x = don’t care

= 1)

is required to

DS21807B-page 12  2003 Microchip Technology Inc.

25XX160A/B

3.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

Name Pin Number Function

CS

SO 2 Serial Data Output

WP

V

SS 4 Ground

SI 5 Serial Data Input

SCK 6 Serial Clock Input

HOLD

CC 8 Supply Voltage

V

3.1 Chip Select (CS)

A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already initi­ated or in progress will be completed, regardless of the

input signal. If CS is brought high during a program

CS
cycle, the device will go into Standby mode as soon as
the programming cycle is complete. When the device is
deselected, SO goes to the high-impedance state,
allowing multiple parts to share the same SPI bus. A
low-to-high transition on CS
sequence initiates an internal write cycle. After power­up, a low level on CS
being initiated.

3.2 Serial Output (SO)

The SO pin is used to transfer data out of the
25XX160A/B. During a read cycle, data is shifted out
on this pin after the falling edge of the serial clock.

1 Chip Select Input

3 Write-Protect Pin

7 Hold Input

after a valid write

is required prior to any sequence

The WP
the Status Register is low. This allows the user to install
the 25XX160A/B in a system with WP
and still be able to write to the Status Register. The WP
pin functions will be enabled when the WPEN bit is set
high.

pin function is blocked when the WPEN bit in

pin grounded

3.4 Serial Input (SI)

The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.

3.5 Serial Clock (SCK)

The SCK is used to synchronize the communication
between a master and the 25XX160A/B. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.

3.6 Hold (HOLD)

The HOLD pin is used to suspend transmission to the
25XX160A/B while in the middle of a serial sequence
without having to retransmit the entire sequence again.
It must be held high any time this function is not being
used. Once the device is selected and a serial
sequence is underway, the HOLD
low to pause further serial communication without
resetting the serial sequence. The HOLD
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high-to­low transition. The 25XX160A/B must remain selected
during this sequence. The SI, SCK and SO pins are in
a high impedance state during the time the device is
paused and transitions on these pins will be ignored. To
resume serial communication, HOLD
high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.

pin may be pulled

pin must be

must be brought

3.3 Write-Protect (WP)

This pin is used in conjunction with the WPEN bit in the
Status Register to prohibit writes to the nonvolatile bits
in the Status Register. When WP
high, writing to the nonvolatile bits in the Status
Register is disabled. All other operations function
normally. When WP
writes to the nonvolatile bits in the Status Register
operate normally. If the WPEN bit is set, WP
a Status Register write sequence will disable writing to
the Status Register. If an internal write cycle has
already begun, WP
write.

 2003 Microchip Technology Inc. DS21807B-page 13

is high, all functions, including

going low will have no effect on the

is low and WPEN is

low during

25XX160A/B

4.0 PACKAGING INFORMATION

4.1 Package Marking Information

8-Lead MSOP (150 mil)

XXXXXXT

YWWNNN

8-Lead PDIP

XXXXXXXX
T/XXXNNN

YYWW

8-Lead SOIC

XXXXXXXX
T/XXYYWW

NNN

Example:

5LABI

3281L7

Example:

25LC160B
I/P 1L7

0328

Example:

25LC160B
I/SN 0328

1L7

MSOP 1st Line Marking Codes

Device

25AA160A
25AA160B
25LC160A
25LC160B

std mark

5AAA
5AAB
5LAA

5LAB

Pb-free

G5AAA
G5AAB

G5LAA

G5LAB

mark

8-Lead TSSOP

XXXX
TYWW
NNN

Legend: XX...X Part number

T Temperature (I, E)
Blank Commercial
YY Year code (last 2 digits of calendar year) except TSSOP
and MSOP which use only the last 1 digit
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code

Note: Custom marking available.

Example:

5LAB
I328

1L7

TSSOP 1st Line Marking Codes

Device

25AA160A
25AA160B
25LC160A
25LC160B

std mark

5AAA

5AAB
5LAA
5LAB

Pb-free

mark
NAAA
NAAB

NLAA
NLAB

DS21807B-page 14  2003 Microchip Technology Inc.

8-Lead Plastic Micro Small Outline Package (MS) (MSOP)

E

E1

p

D

2

B

n 1

25XX160A/B

α

A

c

(F)

β

Units

Dimension Limits
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length

Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom

*Controlling Parameter
Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.

JEDEC Equivalent: MO-187

Drawing No. C04-111

A2

A1

E1

MIN

n
p

A

E

D
L
FFootprint (Reference)

φ

c

B

α

β

.026 BSC

.030
.000

.193 TYP.

.118 BSC
.118 BSC

.016 .024

.037 REF

0° - 8°

.003

.009

5°
5° -

L

INCHES

NOM

.033

.006
.012

φ

A1

MAX

8

--

-

-

.043
.037
.006

.031

.009
.016

15°
15°

MIN

0.75

0.00

0.40

0.08

0.22

MILLIMETERS*

NOM

0.65 BSC

--

0.85

4.90 BSC

3.00 BSC

3.00 BSC

0.60

0.95 REF

0°

MAX

8

-

-

-

-

A2

1.10

0.95

0.15

0.80

8°

0.23

0.40
15°5° ­15°5° -

 2003 Microchip Technology Inc. DS21807B-page 15

25XX160A/B

8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

E1

D

2

n

E

β

eB

Number of Pins
Pitch
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing §
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter

§ Significant Characteristic

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018

Dimension Limits MIN NOM MAX MIN NOM MAX

1

α

A

c

Units INCHES* MILLIMETERS

n
p

c

eB

α

β

.008 .012 .015 0.20 0.29 0.38

.310 .370 .430 7.87 9.40 10.92

A1

B1

B

88

.100 2.54

5 10 15 5 10 15
5 10 15 5 10 15

A2

L

p

DS21807B-page 16  2003 Microchip Technology Inc.

8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)

E

E1

p

D

2

25XX160A/B

B

Number of Pins
Pitch

Standoff §

Molded Package Width

Foot Angle
Lead Thickness

Mold Draft Angle Top
Mold Draft Angle Bottom

* Controlling Parameter

§ Significant Characteristic

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057

n

45°

c

β

n
p

A1

E1

φ

c

α

β

1

h

A

φ

L

048048

A1

MILLIMETERSINCHES*Units

1.27.050

α

A2

MAXNOMMINMAXNOMMINDimension Limits

88

1.751.551.35.069.061.053AOverall Height

1.551.421.32.061.056.052A2Molded Package Thickness

0.250.180.10.010.007.004

6.206.025.79.244.237.228EOverall Width

3.993.913.71.157.154.146

5.004.904.80.197.193.189DOverall Length

0.510.380.25.020.015.010hChamfer Distance

0.760.620.48.030.025.019LFoot Length

0.250.230.20.010.009.008

0.510.420.33.020.017.013BLead Width
1512015120
1512015120

 2003 Microchip Technology Inc. DS21807B-page 17

25XX160A/B

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)

E

E1

p

D

2

n

B

1

A

c

A1

φ

β

A2

E1

n
p

φ

c

α

β

048048

Number of Pins
Pitch

Molded Package Thickness

Molded Package Width

Foot Angle
Lead Thickness

Mold Draft Angle Top
Mold Draft Angle Bottom

* Controlling Parameter

§ Significant Characteristic

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086

L

MILLIMETERS*INCHESUnits

0.65.026

α

A2

MAXNOMMINMAXNOMMINDimension Limits

88

1.10.043AOverall Height

0.950.900.85.037.035.033

0.150.100.05.006.004.002A1Standoff §

6.506.386.25.256.251.246EOverall Width

4.504.404.30.177.173.169

3.103.002.90.122.118.114DMolded Package Length

0.700.600.50.028.024.020LFoot Length

0.200.150.09.008.006.004

0.300.250.19.012.010.007BLead Width
10501050
10501050

DS21807B-page 18  2003 Microchip Technology Inc.

25AA160A/B, 25LC160A/B

ON-LINE SUPPORT

Microchip provides on-line support on the Microchip
World Wide Web site.

The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape
Internet Explorer. Files are also available for FTP
download from our FTP site.

Connecting to the Microchip Internet
Web Site

The Microchip web site is available at the following
URL:

www.microchip.com

The file transfer site is available by using an FTP
service to connect to:

ftp://ftp.microchip.com

The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A
variety of Microchip specific business information is
also available, including listings of Microchip sales
offices, distributors and factory representatives. Other
data available for consideration is:

• Latest Microchip Press Releases

• Technical Support Section with Frequently Asked
Questions

• Design Tips

• Device Errata

• Job Postings

• Microchip Consultant Program Member Listing

• Links to other useful web sites related to
Microchip Products

• Conferences for products, Development Systems,
technical information and more

• Listing of seminars and events

®

or Microsoft

SYSTEMS INFORMATION AND UPGRADE HOT LINE

The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.

®

Plus, this line provides information on how customers
can receive the most current upgrade kits.The Hot Line
Numbers are:

1-800-755-2345 for U.S. and most of Canada, and

1-480-792-7302 for the rest of the world.

042003

 2003 Microchip Technology Inc. DS21807B-page 19

25AA160A/B, 25LC160A/B

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod­uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at [phone].

Please list the following information, and use this outline to provide us with your comments about this document.

To :

RE: Reader Response

From:

Application (optional):

Would you like a reply? Y N

Device: Literature Number:

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

Technical Publications Manager

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

Total Pages Sent ________

FAX: (______) _________ - _________

DS21807B25AA160A/B, 25LC160A/B

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21807B-page 20  2003 Microchip Technology Inc.

25XX160A/B

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. X /XX X

Device

Device 25AA160A

Tape & Reel Blank =

Temperature Range I =

Package MS =

25AA160B
25LC160A
25LC160B

T=

E=

P=
SN =
ST =

16 Kbit, 1.8V, 16 Byte Page SPI Serial EEPROM
16 Kbit, 1.8V, 32 Byte Page SPI Serial EEPROM
16 Kbit, 2.5V, 16 Byte Page SPI Serial EEPROM
16 Kbit, 2.5V, 32 Byte Page SPI Serial EEPROM

Standard packaging
Tape & Reel

-40°C to+85°C

-40°C to+125°C

Plastic MSOP (Micro Small Outline), 8-lead
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
TSSOP, 8-lead

X

–

Temp Range

Lead PackageTape & Reel
Finish

Examples:

a) 25AA160A-I/MS = 16 Kbit, 16-byte page, 1.8V

Serial EEPROM, Industrial temp., MSOP
package

b) 25AA160B-I/STG = 16 Kbit, 32-byte page, 1.8V

Serial EEPROM, Industrial temp., TSSOP
package, Pb-free

c) 25AA160AT-I/SN = 16 Kbit, 16-byte page, 1.8V

Serial EEPROM, Industrial temp., Tape & Reel,
SOIC package

d) 25LC160A-I/MSG = 16 Kbit, 16-byte page,

2.5V Serial EEPROM, Industrial temp., MSOP
package, Pb-free

e) 25LC160BT-I/SN = 16 Kbit, 32-byte page, 2.5V

Serial EEPROM, Industrial temp., Tape & Reel,
SOIC package

f) 25LC160BT-I/ST = 16 Kbit, 32-byte page, 2.5V

Serial EEPROM, Industrial temp., Tape & Reel,
TSSOP package

Lead Finish Blank =

G=

Standard 63% / 37% Sn/Pb
Matte Tin (Pure Sn)

Sales and Support

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: [phone]

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

 2003 Microchip Technology Inc. DS21807B-page 21

25XX160A/B

NOTES:

DS21807B-page 22  2003 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com­ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con­veyed, implicitly or otherwise, under any intellectual property
rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K

EELOQ, MPLAB, PIC, PICmicro, PICSTART,

PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.

AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.

Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.

Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.

Printed on recycled paper.

Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.

®

8-bit MCUs, KEELOQ

®

code hopping

 2003 Microchip Technology Inc. DS21807B-page 23

WORLDWIDE SALES AND SERVICE

AMERICAS

Corporate Office

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: [phone] Fax: [phone]
Technical Support: 480-792-7627
Web Address: http://www.microchip.com

Atlanta

3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: [phone] Fax: [phone]

Boston

2 Lan Drive, Suite 120
Westford, MA 01886
Tel: [phone] Fax: [phone]

Chicago

333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: [phone] Fax: [phone]

Dallas

4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: [phone] Fax: [phone]

Detroit

Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: [phone] Fax: [phone]

Kokomo

2767 S. Albright Road
Kokomo, IN 46902
Tel: [phone] Fax: [phone]

Los Angeles

18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: [phone] Fax: [phone]

Phoenix

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: [phone] Fax: [phone]

San Jose

Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: [phone] Fax: [phone]

Tor ont o

6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: [phone] Fax: [phone]

ASIA/PACIFIC

Australia

Microchip Technology Australia Pty Ltd
Marketing Support Division
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: [phone] Fax: [phone]

China - Beijing

Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: [phone] Fax: [phone]

China - Chengdu

Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: [phone] Fax: [phone]

China - Fuzhou

Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: [phone] Fax: [phone]

China - Hong Kong SAR

Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: [phone] Fax: [phone]

China - Shanghai

Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: [phone] Fax: [phone]

China - Shenzhen

Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: [phone] Fax: [phone]

China - Qingdao

Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: [phone] Fax: [phone]

India

Microchip Technology Inc.
India Liaison Office
Marketing Support Division
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: [phone] Fax: [phone]

Japan

Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: [phone] Fax: [phone]

Korea

Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: [phone] Fax: [phone] or
82-2-558-5934

Singapore

Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: [phone] Fax: [phone]

Tai wan

Microchip Technology (Barbados) Inc.,
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: [phone] Fax: [phone]

EUROPE

Austria

Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Austria
Tel: [phone]
Fax: [phone]

Denmark

Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: [phone] Fax: [phone]

France

Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: [phone] Fax: [phone]

Germany

Microchip Technology GmbH
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: [phone]
Fax: [phone]

Italy

Microchip Technology SRL
Via Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
Tel: [phone] Fax: [phone]

Netherlands

Microchip Technology Netherlands
P. A. De Biesbosch 14
NL-5152 SC Drunen, Netherlands
Tel: [phone] Fax: [phone]

United Kingdom

Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: [phone] Fax: [phone]

07/10/03

DS21807B-page 24  2003 Microchip Technology Inc.