24AA128/24LC128/24FC128
128K I2C™ CMOS Serial EEPROM
Device Selection Table
Part
Number
24AA128 1.8-5.5V 400 kHz
24LC128 2.5-5.5V 400 kHz I, E
24FC128 1.8-5.5V 1 MHz
Note 1: 100 kHz for VCC < 2.5V.
2: 400 kHz for VCC < 2.5V.
VCC
Range
Max. Clock
Frequency
(1)
(2)
Temp.
Ranges
I
I
Features
• Low-power CMOS technology:
- Maximum write current 3mA at 5.5V
- Maximum read current 400 µA at 5.5V
- Standby current 100 nA typical at 5.5V
• 2-wire serial interface bus, I
• Cascadable for up to eight devices
• Self-timed erase/write cycle
• 64-byte Page Write mode available
• 5 ms max write c ycle time
• Hardware write-protect for entire array
• Output slope control to eliminate ground bounce
• Schmitt Trigger inputs for nois e suppression
• 1,000,000 erase/write cycles
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP, SOIC, TSSOP, MSOP and DFN
packages, 14-lead TSSOP package
• Standard and Pb-free finishes available
• Temperature ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
2
C™ compatible
Description
The Microchip Technology Inc. 24AA128/24LC128/
24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial
Electrically Erasable PROM (EEPROM), capable of
operation across a broad voltage range (1.8V to 5.5V).
It has been developed for advanced, low-power
applications such as persona l com mun icati ons o r d at a
acquisition. This device also has a page write capability of up to 64 bytes of data. This device is capable of
both random and sequential reads up to the 128K
boundary. Functional address lines allow up to eight
devices on the same bus, for up to 1 Mbit address
space. This device is available in the standard 8-pin
plastic DIP, SOIC (150 and 208 mil), TSSOP, MSOP,
DFN and 14-lead TSSOP packages.
Block Diagram
I/O
SDA
C
ontrol
Logic
V
VSS
A0 A1 A2
I/O
SCL
CC
Memory
Control
Logic
WP
XDEC
HV Generator
EEPROM
Array
Page Latches
YDEC
Sense Amp.
R/W
Control
Package Types
1
2
3
4
5
6
7
TSSOP
24XX128
DFN
14
V
CC
13
WP
12
NC
11
NC
10
NC
9
SCL
8
SDA
1
A0
2
A1
3
A2
4
V
SS
8
VCC
24XX128
7
WP
6
SCL
5
SDA
PDIP/SOIC TSSOP/MSOP *
1
A0
2
A1
3
A2
SS
4
V
Note: * Pins A0 and A1 are no-connects for the MSOP package only.
24XX128
8
VCC
WP
7
SCL
6
SDA
5
1
A0
2
A1
3
A2
4
V
SS
8
24XX128
7
6
5
CC
V
WP
SCL
SDA
A0
A1
NC
NC
NC
A2
SS
V
*24XX128 is used in this document as a generic part number for the 24AA128/24LC128/24FC128 devices.
2004 Microchip Technology Inc. DS21191M-page 1
24AA128/24LC128/24FC128
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stres s ratin g only and func tional operati on of the devic e at thos e or any other co nditio ns abov e thos e
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1: DC CHARACTERISTICS
Electrical Characteristics:
DC CHARACTERISTICS
Param.
No.
Sym. Characteristic Min. Max. Units Conditions
D1 — A0, A1, A2, SCL, SDA, and
WP pins:
D2 V
D3 V
IH High-level input voltage 0.7 VCC —V—
IL Low-level input voltage — 0.3 VCC
D4 VHYS Hysteresis of Schmitt Trigger
inputs (SDA, SCL pins)
D5 V
D6 I
OL Low-level output voltage — 0.40 V IOL = 3.0 mA @ VCC = 4.5V
LI Input leakage current — ±1 µAVIN = VSS or VCC, WP = VSS
D7 ILO O utput leakage current — ±1 µAVOUT = VSS or VCC
D8 CIN,
OUT
C
Pin capacitance
(all inputs/outpu t s)
D9 ICC Read Operating current — 400 µAVCC = 5.5V, SCL = 400 kHz
CC Write — 3 mA VCC = 5.5V
I
D10 ICCS Standby current — 1 µATA = -40°C to +85°C
Note 1: This parameter is periodically sampled and not 100% tested.
Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C
Automotive (E): V
CC = +2.5V to 5.5V TA = -40°C to 125°C
————
VVVCC ≥ 2.5V
0.2 VCC
CC < 2.5V
V
0.05 VCC —VVCC ≥ 2.5V (Note 1 )
OL = 2.1 mA @ VCC = 2.5V
I
VIN = VSS or VCC, WP = VCC
—10pFVCC = 5.0V (Note 1)
A = 25°C, fC = 1 MHz
T
SCL = SDA = V
A0, A1, A2, WP = V
CC = 5.5V
SS
—5µATA = -40°C to 125° C
SCL = SDA = V
A0, A1, A2, WP = V
CC = 5.5V
SS
DS21191M-page 2 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
TABLE 1-2: AC CHARACTERISTICS
Electrica l Characteristics:
AC CHARACTERISTICS
Param.
No.
1F
Sym. Characteristic Min. Max. Units Conditions
CLK Clock frequency —
2THIGH Clock high time 4000
3TLOW Cloc k low time 4700
4T
R SDA and SCL rise time
(Note 1)
5T
F SDA and SCL fall time
(Note 1)
6THD:STAStart condition hold time 4000
SU:ST
7T
A
Start condition setup time 4 700
8THD:DATData input hold time 0 — ns (Note 2)
Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C
Automotive (E): V
—
—
—
600
600
500
1300
1300
500
—
—
—
—
—
600
600
250
600
600
250
CC = +2.5V to 5.5V TA = -40°C to 125°C
100
400
400
1000
—
—
—
—
—
—
—
—
1000
300
300
300
100
—
—
—
—
—
—
—
—
kHz 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
2.5V ≤ V
ns 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
2.5V ≤ V
ns 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
2.5V ≤ V
ns 1.8V ≤ V
2.5V ≤ V
1.8V ≤ V
ns All except, 24FC128
1.8V ≤ V
ns 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
2.5V ≤ V
ns 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
2.5V ≤ V
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
CC < 2.5V
CC ≤ 5.5V
CC ≤ 5.5V 24FC128
CC ≤ 5.5V 24FC128
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
9T
10 T
11 TSU:WP WP setup time 4000
SU:DA
T
SU:ST
O
Data input setup time 250
100
100
Stop condition setup time 4000
600
600
250
600
600
—
—
—
—
—
—
—
—
—
—
ns 1.8V ≤ V
2.5V ≤ V
1.8V ≤ V
CC < 2.5V
CC ≤ 5.5V
CC ≤ 5.5V 24FC128
ns 1.8 V ≤ VCC < 2.5V
2.5 V ≤ V
1.8V ≤ V
2.5 V ≤ V
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
ns 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
CC ≤ 5.5V
CC ≤ 5.5V 24FC128
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined T
noise spike suppression. This eliminates the need for a T
SP and VHYS specifications are due t o new Schmitt Trigger inputs, whi ch prov ide im proved
I specification for standa rd opera tio n.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, pl ease consu lt the Total En durance™ Model, w hich c an be o btaine d from M icrochip ’s we b site:
www.microchip.com.
2004 Microchip Technology Inc. DS21191M-page 3
24AA128/24LC128/24FC128
TABLE 1-2: AC CHARACTERISTICS (CONTINUED)
Electrica l Characteristics:
AC CHARACTERISTICS
Param.
No.
Sym. Characteristic Min. Max. Units Conditions
12 THD:WP WP hold time 4700
13 T
AA Output valid from clock
(Note 2)
14 TBUF Bus free time: Time the bus
must be free before a new
transmission can start
15 TOF Output fall time from VIH
minimum to VIL maximum
B ≤ 100 pF
C
16 TSP Input filter spike suppression
(SDA and SCL pins)
17 T
WC Write cycle time (byte or
page)
18 — Endurance 1,000,000 — cycles 25°C (Note 4)
Note 1: Not 100% tested. C
B = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined T
SP and VHYS specifications are due to new Schmitt Trigger inputs, whi ch prov ide im proved
noise spike suppression. This eliminates the need for a T
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, pl ease consu lt the Total En durance™ Model, w hich c an be o btaine d from M icrochip ’s we b site:
www.microchip.com.
Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C
Automotive (E): V
1300
1300
—
—
—
—
4700
1300
1300
500
10 + 0.1CB 250
CC = +2.5V to 5.5V TA = -40°C to 125°C
—
—
—
3500
900
900
400
—
—
—
—
ns 1.8V ≤ V
2.5V ≤ V
1.8V ≤ V
ns 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
2.5V ≤ V
ns 1.8V ≤ VCC < 2.5V
2.5V ≤ V
1.8V ≤ V
2.5V ≤ V
CC < 2.5V
CC ≤ 5.5V
CC ≤ 5.5V 24FC128
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
CC ≤ 5.5V
CC < 2.5V 24FC128
CC ≤ 5.5V 24FC128
ns All except, 24FC128 (Note 1)
250
24FC128 (Note 1)
— 50 ns All except, 24FC128 (Notes 1
and 3)
—5ms—
I specification for standard operation.
FIGURE 1-1: BUS TIMING DATA
5
SCL
SDA
IN
SDA
OUT
WP
DS21191M-page 4 2004 Microchip Technology Inc.
16
7
6
3
2
89
13
(protected)
(unprotected)
D4
4
10
14
11
12
24AA128/24LC128/24FC128
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Name
A0 1 1 1 1 — 1 User Configurable Chip Select
A1 2 2 2 2 — 2 User Configurable Chip Select
(NC) — — — 3, 4, 5 1, 2 — Not Connected
A2 3 3 3 6 3 3 User Configurable Chip Select
SS 4 4 4 7 4 4 Ground
V
SDA 5 5 5 8 5 5 Serial Data
SCL 6 6 6 9 6 6 Serial Clock
(NC) — — — 10, 11,12 — — Not Connected
WP 7 7 7 13 7 7 Write-Protect Input
CC 8 8 8 14 8 8 +1.8V to 5.5V (24AA128)
V
8-pin
PDIP
2.1 A0, A1, A2 Chip Address Inputs
The A0, A1 and A2 inputs are used by the 24XX128 for
multiple device operations. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.
For the MSOP pac kage only, pins A0 and A 1 are not
connected.
Up to eight devices (two fo r the MS OP packag e) may
be connected to the same bus by using different Chip
Select bit combi nations. If these p ins are left unconnected, the inputs will be pulled down internally to
SS. If they are tied to VCC or driven high, the internal
V
pull-down circuitr y is disab le d.
In most applications, the chip address inputs A0, A1,
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other pro grammabl e device, the chi p
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed.
2.2 Serial Data (SDA)
This is a bidirectional pin used to transfer addresses
and data into and out of the device. It is an open drain
terminal. Therefore, the SDA bus requires a pull-up
resistor to V
400kHz and 1MHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
CC (typical 10 kΩ for 100 kHz, 2 kΩ for
8-pin
SOIC
8-pin
TSSOP
14-pin
TSSOP
8-pin
MSOP
8-pin
DFN
Function
+2.5V to 5.5V (24LC128)
+1.8V to 5.5V (24FC128)
2.3 Serial Clock (SCL)
This input is used to synchronize the data transfer to
and from the device.
2.4 Write-Protect (WP)
This pin can be connected to either VSS, VCC or left
floating. Internal pull-down circuitry on this pin will keep
the device in the un prot ected state if left floa tin g. If tie d
SS or left floating, normal memory operation is
to V
enabled (read/write the entire memory
If tied to V
operations are not affec ted.
CC, write operations are inhibited. Read
0000-3FFF).
3.0 FUNCTIONAL DESCRIPTION
The 24XX128 supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter and a device
receiving data as a receiver. The bus must be
controlled by a master device which generates the
serial clock (SCL), controls the bus access and
generates the Start and Stop conditions while the
24XX128 works as a sla ve. Both master and slave ca n
operate as a transmitter or receiver, but the master
device determines which mode is activated.
2004 Microchip Technology Inc. DS21191M-page 5
24AA128/24LC128/24FC128
4.0 BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable wheneve r the c lock lin e is high . Changes i n
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1 ).
4.1 Bus not Busy (A)
Both data and clock lines remain high.
4.2 Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3 Stop Data Transfer (C)
A low-to-high transition of the SDA li ne, while the cl ock
(SCL) is high, determines a Stop condition. All
operations must end with a Stop condition.
4.4 Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a S tart condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device.
4.5 Acknowledge
Each receiving device, when addressed, is obliged to
generate an Acknowledge signal after the reception of
each byte. The master device must generate an extra
clock pulse, wh ich i s ass ociat ed with this A cknow ledg e
bit.
Note: The 24XX128 does not generate any
Acknowledge bits if an internal
programming cycle is in progress.
A device that acknowledges must pull down the SDA
line during the acknowledge clock pulse in such a way
that the SDA line is sta ble low d uring the high pe riod of
the acknowledge related clock pulse. Of course, setup
and hold times must be taken into account. During
reads, a master m ust s ignal an end of dat a to the sl ave
by NOT generating an Acknow ledge bit on the las t byte
that has been cl ocke d out o f the slave . In th is ca se , the
slave (24XX128) will leave the data line high to enable
the master to generate the Stop condition.
FIGURE 4-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(A) (B) (D) (D) (C) (A)
SCL
SDA
Start
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
FIGURE 4-2: ACKNOWLEDGE TIMING
Acknowledge
Bit
SCL
SDA
Data from transmitter
Transmitter must release the SDA line at this point,
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
987654321123
Data from transmitter
Receiver must release the SDA line
at this point so the Transmitter can
continue sending data.
Stop
Condition
DS21191M-page 6 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
5.0 DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consi sts of a 4-bit contro l code. For the
24XX128, this is set as ‘
operations. The next three bits of the control byte are
the Chip Select bits (A2, A1, A0). The Chip Select bits
allow the use of up to eight 24XX128 devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic lev els on the corresp onding A2,
A1 and A0 pins for the device to respond. These bits
are, in effect, the thre e Most Signi ficant bit s of the word
address.
For the MSOP package, the A0 and A1 pins are not
connected. During device addressing, the A0 and A1
Chip Select bits (Fig ures 5-1 and 5-2) should be set to
‘0’. Only two 24XX128 MSOP packages can be
connected to the same bus.
The last bit of the control byte defines the operation to
be performed. When set to a one, a read operation is
selected. When set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because
only A13…A0 are used, t he upper two addres s bit s a re
“don’t care” bits . The upper addre ss bits ar e transferred
first, followed by the less significant bits.
Following the Start condition, the 24XX128 monitors
the SDA bus checking the device type identifier being
transmitted. Upon receiving a ‘
appropriate devic e select b it s, th e slave d evice out put s
an Acknowledge si gnal on the SD A line. Dependi ng on
the state of the R/W
or write operation.
1010’ binary for read and write
1010’ code and
bit, the 24XX128 will select a read
FIGURE 5-1: CONTROL BYTE
FORMAT
Read/Write
Chip Select
Control Code
1 0 1 0 A2 A1 A0SACKR/W
Slave Address
Start Bit
Bit
Bits
Acknowledge Bit
5.1 Contiguous Addressing Across Multiple Devices
The Chip Select bits A2, A1,and A0 can be used to
expand the cont iguous addres s space for up to 1 Mbi t
by adding up to eight 24XX128s on the same bus. In
this case, software can use A0 of the control byte as
address bit A14; A1 as address bit A15; and A2 as
address bit A16. It is not possible to sequentially read
across device boundaries.
For the MSOP package, up to two 24XX128 devices
can be added for up to 256 Kbit of address space. In
this case, software can use A2 of the control byte as
address bit A16. Bits A0 (A14) and A1 (A15) of the
control byte must always be set to logic ‘0’ for the
MSOP.
FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS
Control Byte Address High Byte Address Low Byte
A
1010
Control
Code
2004 Microchip Technology Inc. DS21191M-page 7
A2A1A
Chip
Select
Bits
R/W XX
0
13
A
12
A11A10A
A
8
9
A
••••••
7
A
0
X = don’t care bit
24AA128/24LC128/24FC128
6.0 WRITE OPERATIONS
6.1 Byte Write
Following the Start condition from the master, the
control code (four bits ), the Chi p Selec t (three b its) an d
the R/W bit (which i s a lo gic low) are cloc ked ont o the
bus by the master transmitter. This indicates to the
addressed slave rec eiver that the a ddress high byt e will
follow after it has generated an Acknowled ge bit during
the ninth clock cycle. Therefore, the next byte
transmitted by the master is the high-order byte of the
word address and will be written into the address
pointer of the 24XX128. The next byte is the Least
Significant Address Byte. After receiving another
Acknowledge signal from the 24XX128, the master
device will transmit the data word to be written into the
addressed memory location. The 24XX128 acknowledges again and the master generates a Stop
condition. This initiates the internal write cycle and
during this time, the 24XX128 will not generate
Acknowledge signals (Figure 6-1). If an attempt is
made to write to the arra y with the WP pin held high, the
device will acknowledge the command, but no write
cycle will occur, no data will be written, and the device
will immediately accept a new command. After a byte
Write command, the internal address counter will point
to the address location following the one that was just
written.
6.2 Page Write
The write control byte, w ord add res s, and th e firs t da ta
byte are transmitted to th e 2 4XX1 28 in mu ch th e s am e
way as in a byte write. The exception is that instead of
generating a S t op cond ition, the maste r transm its up to
63 additional bytes, which are temporarily stored in the
on-chip page buffer, and will be written into memory
once the master has transmitted a Stop condition.
Upon receipt of each word, the six lower address
pointer bits are internally incremented by ‘
1’. If the
master should transmit more than 64 bytes prior to
generating the Stop condition, the address counter will
roll over and the previously received data will be overwritten. As with the byte write operation, once the Stop
condition is received, an internal write cycle will begin
(Figure 6-2). If an attempt is made to write to the array
with the WP pin held high, the device w ill acknow ledg e
the command, but no write cy cle w ill occ ur, no data will
be written and the device will immed iately acc ept a new
command.
6.3 Write-Protection
The WP pin a llows t he user to wri te-prot ect the entire
array (0000-3FFF) when the pi n is tied to V
V
SS or left floating, the wri te protect ion i s disabl ed. Th e
WP pin is sampled at the Stop bit for every Write
command (Figure 1-1). Toggling the WP pin after the
Stop bi t wil l hav e no e ffe ct on t he ex ecutio n of th e wri te
cycle.
Note: Page write operations are limited to
writing bytes within a single physical
page, regardless of the number of
bytes actually being written. Physical
page boundaries start at addresses
that are integer multiples of the page
buffer size (or ‘page size’) and end at
addresses that are integer mu lti ple s of
[page size - 1]. If a Page Write
command attempts to write across a
physical page boundary, the result is
that the data wraps around to the
beginning of the current page (overwriting data previously stored there),
instead of being written to the next
page, as might be expected. It is,
therefore, necessary for the application software to prevent page write
operations that would attempt to cross
a page boundary.
CC. If tied to
FIGURE 6-1: BYTE WRITE
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
X = don’t care bit
S
T
Control
A
Byte
R
T
S1010 0
A1A
A
0
2
A
C
K
High Byte
XX
Address
A
C
K
Address
Low Byte
S
Data
A
C
K
T
O
P
P
A
C
K
FIGURE 6-2: PAGE WRITE
S
T
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
X = don’t care bit
DS21191M-page 8 2004 Microchip Technology Inc.
Control
A
Byte
R
T
S1010 0
A2A1A
0
A
C
K
XX
Address
High Byte
A
C
K
Address
Low Byte
Data Byte 0
A
C
K
A
C
K
Data Byte 63
S
T
O
P
P
A
C
K
24AA128/24LC128/24FC128
7.0 ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issu ed from the mas ter , the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition, followed by the control byte
for a Write command (R/W
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the S tart bit an d control byte must
be resent. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next Read or Write command. See Figure 7-1 for
flow diagram.
= 0). If the device is still
FIGURE 7-1: ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
Yes
No
Next
Operation
2004 Microchip Technology Inc. DS21191M-page 9
24AA128/24LC128/24FC128
8.0 READ OPERATION
Read operations are ini tiated i n much the s ame way as
write operations with the exception that the R/W
the control byte is set to ‘
1’. There are three basic types
of read operations: current add ress read , rand om rea d
and sequential read.
8.1 Current Address Read
The 24XX128 contains an address counter that maintains the address of the last word accessed, internally
incremented by ‘1’. Therefore, if the previous read
access was to address ‘
next current address read operati on would access da ta
from address n + 1.
Upon receipt of the control byte with R/W
the 24XX128 issu es an ac knowledge and tran smits the
8-bit data word. The master will not acknowledge the
transfer, but does generate a Stop condition and the
24XX128 discontinues transmission (Figure 8-1).
FIGURE 8-1: CURRENT ADDRESS
S
BUS ACTIVIT Y
MASTER
SDA LINE
BUS ACTIVIT Y
T
A
R
T
n’ (n is any legal address) , th e
READ
Control
Byte
1100
AAA
210
1
A
C
K
Data
Byte
bit of
bit set to ‘1’,
S
T
O
P
PS
N
O
A
C
K
8.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operatio n, th e w ord add res s mus t firs t
be set. This is d one by sending the word a ddress to th e
24XX128 as part of a write operation (R/W
0’). Once the word address is sent, the master gener-
‘
bit set to
ates a Start condition following the acknowledge. This
terminates the write o pera tio n, b ut n ot be fore the internal address pointer is set. The master then issues the
control byte again, b ut wit h the R/W bit se t to a ‘ 1’. The
24XX128 will then issue an acknowledge and transmit
the 8-bit data word. The master will not acknowledge
the transfer but does generate a Stop condition, which
causes the 24XX128 to discontinue transmission
(Figure 8-2). After a random Read command, the
internal address counter will point to the address
location following the one that was just read.
8.3 Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24XX128 transmits
the first data byte, the master issues an acknowledge
as opposed to the Stop condition used in a random
read. This acknowledge directs the 24XX128 to
transmit the next sequentially addressed 8-bit word
(Figure 8-3). Following the final byte transmitted to the
master, the master will NOT generate an acknowledge
but will generate a Stop condition. To provide
sequential reads, the 24XX128 contains an internal
address pointer which is incremented by one at the
completion of each operation. This address pointer
allows the entire memory contents to be serially read
during one operation. The internal address pointer will
automatically roll over from address 3FFF to address
0000 if the master acknowledges the byte received
from the array address 3FFF.
FIGURE 8-2: RANDOM READ
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
X = don’t care bit
S
T
Control
A
Byte
R
T
S1010
AAA
210
Address
High Byte
XX
0
A
C
K
Address
Low Byte
A
C
K
S
T
A
R
T
S1010
A
C
K
Control
Byte
AAA
210
Data
Byte
1
A
C
K
S
T
O
P
P
N
O
A
C
K
FIGURE 8-3: SEQUENTIAL READ
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
DS21191M-page 10 2004 Microchip Technology Inc.
Control
Byte
Data (n) Data (n + 1)
A
C
K
A
C
K
A
C
K
Data (n + 2)
Data (n + X)
A
C
K
S
T
O
P
P
N
O
A
C
K
24AA128/24LC128/24FC128
9.0 PACKAGING INFORMATION
9.1 Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX
T/XXXNNN
YYWW
8-Lead SOIC (150 mil)
XXXXXXXX
T/XXYYWW
NNN
8-Lead SOIC (208 mil)
XXXXXXXX
T/XXXXXX
YYWWNNN
Example:
24AA128
I/P017
0310
Example:
24LC128
I/SN0310
017
Example:
24LC128
I/SM
0310017
8-Lead TSSOP
XXXX
TYWW
NNN
2004 Microchip Technology Inc. DS21191M-page 11
Example:
4LC
I301
017
24AA128/24LC128/24FC128
Package Marking Information (Continued)
8-Lead MSOP Example:
XXXXXT
YWWNNN
8-Lead DFN-S
XXXXXXX
T/XXXXX
YYWW
NNN
14-Lead TSSOP
XXXXXXXT
YYWW
NNN
4L128I
101017
Example
24LC128
I/MF
YYWW
NNN
Example
24LC128I
:
:
0110
017
Legend: XX...X Customer specific information*
T Temperature grade (I, E)
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Note:In the event the full Micr och ip p art n umber cann ot be marke d on one line , it wi ll be
carried over to t he next line thus l imiting the number of available c haracters f or customer
specific information.
*Standard dev ice marking co nsists of Micro chip part num ber , year code, we ek code, and traceabil ity code. For
device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.
TSSOP Package Codes MSOP Package Codes
Part No. STD Pb-free STD Pb-free
24AA128 4AC G4AC 4A128 G4AC
24LC128 4LC G4LC 4L128 G4LC
24FC128 4FC G4FC 4F128 G4FC
DS21191M-page 12 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
E
β
eB
Number of Pins
Pitch
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
Dimension Limits MIN NOM MAX MI N NOM MAX
1
α
A
c
Units INCHES* MILLIMETERS
n
p
c
α
β
.008 .012 .015 0.20 0.29 0.38
A1
B1
B
88
.100 2.54
51015 51015
51015 51015
A2
L
p
2004 Microchip Technology Inc. DS21191M-page 13
24AA128/24LC128/24FC128
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
Number of Pins
Pitch
Standoff §
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
n
45°
c
β
n
p
A1
φ
c
α
β
1
h
A
φ
L
048048
A1
MILLIMETERSINCHES*Units
1.27.050
α
A2
MAXNOMMINMAXNOMMINDimension Limits
88
1.751.551.35.069.061.053AOverall Height
1.551.421.32.061.056.052A2M old ed Packag e Thickness
0.250.180.10.010.007.004
6.206.025.79.244.237.228EOverall Width
3.993.913.71.157.154.146E1Molded Package Width
5.004.904.80.197.193.189DOverall Length
0.510.380.25.020.015.010hChamfer Distance
0.760.620.48.030.025.019LFoot Length
0.250.230.20.010.009.008
0.510.420.33.020.017.013BLead Width
1512015120
1512015120
DS21191M-page 14 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
8-Lead Plastic Small Outline (SM) – Medium, 208 mil (SOIC)
E
E1
p
D
2
n
B
c
β
Number of Pins
Pitch
Foot Angle
Lead Thickne ss
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
Drawing No. C04-056
n
p
φ
c
α
β
1
A
φ
L
.070 .075
.069 .074
048048
A1
MILLIMETERSINCHES*Units
1.78
1.75
1.27.050
1.97
1.88
α
A2
MAXNOMMINMAXNOMMINDimension Limits
88
2.03.080AOverall Height
1.98.078A2Molded Package Thickness
0.250.130.05.010.005.002A1Standoff §
8.267.957.62.325.313.300EOverall Width
5.385.285.11.212.208.201E1Molded Package Width
5.335.215.13.210.205.202DOverall Length
0.760.640.51.030.025.020LFoot Length
0.250.230.20.010.009.008
0.510.430.36.020.017.014BLead Width
1512015120
1512015120
2004 Microchip Technology Inc. DS21191M-page 15
24AA128/24LC128/24FC128
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
n
B
1
A
c
A1
φ
β
A1
n
p
φ
c
α
β
048048
Number of Pins
Pitch
Standoff §
Foot Angle
Lead Thickne ss
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
L
MILLIMETERS*INCHESUnits
0.65.026
α
A2
MAXNOMMINMAXNOMMINDimension Limits
88
1.10.043AOverall Height
0.950.900.85.037.035.033A2Molded Packag e Thick ness
0.150.100.05.006.004.002
6.506.386.25.256.251.246EOverall Width
4.504.404.30.177.173.169E1Molded Package Width
3.103.002.90.122.118.114DMolded Package Length
0.700.600.50.028.024.020LFoot Length
0.200.150.09.008.006.004
0.300.250.19.012.010.007BLead Wid th
10501050
10501050
DS21191M-page 16 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
n
B
1
A
c
φ
β
Number of Pins
Pitch
Molded Package Thickness
Foot Angle
Lead Thickne ss
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
n
p
A2
φ
c
α
β
L
MILLIMETERS*INCHESUnits
0.65.026
α
A2A1
MAXNOMMINMAXNOMMINDimension Limits
1414
1.10.043AOverall Height
0.950.900.85.037.035.033
0.150.100.05.006.004.002A1Standoff §
6.506.386.25.256.251.246EOverall Width
4.504.404.30.177.173.169E1Molded Package Width
5.105.004.90.201.197.193DMolded Package Length
0.700.600.50.028.024.020LFoot Length
840840
0.200.150.09.008.006.004
0.300.250.19.012.010.007BLead Wid th
10501050
10501050
2004 Microchip Technology Inc. DS21191M-page 17
24AA128/24LC128/24FC128
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n 1
α
A
c
(F)
β
Units
Dimension Limits
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
JEDEC Equivalent: MO-187
Drawing No. C04-111
A2
A1
E1
MIN
n
p
A
E
D
L
φ
c
B
α
β
.026 BSC
.030
.000
.193 TYP.
.118 BSC
.118 BSC
.016 .024
.037 REFFFootprint (Reference)
0° - 8°
.003
.009
5°
5° -
L
INCHES
NOM
.033
.006
.012
φ
A1
MAX NOM
8
--
-
-
.043
.037
.006
.031
.009
.016
15°
15°
MIN
0.75
0.00
0.40
0.08
0.22
MILLIMETERS*
MAX
8
0.65 BSC
--
0.85
-
4.90 BSC
3.00 BSC
3.00 BSC
0.60
0.95 REF
0°
-
-
-
A2
1.10
0.95
0.15
0.80
8°
0.23
0.40
15°5° 15°5° -
DS21191M-page 18 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
8-Lead Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN-S)
A1
n
12
TOP VIEW
α
E1
E
B
R
D1 D
EXPOSED
METAL
PADS
BOTTOM VIEW
A2
A3
A
p
L
D2
PIN 1
ID
E2
Units
Dimension Limits
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff
Base Thickness
Overall Length
Molded Package Length
Exposed Pad Length
Molded Package Width
Exposed Pad Width D2 .085 .091 .097 2.16 2.31 2. 46
Lead Width
Lead Length
Tie Bar Width
Mold Draft Angle Top
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
JEDEC equivalent: pending
Drawing No. C04-113
n
p
A
A2
A1
A3
E
E1
E2
DOverall Width
D1
B
L
R
α
MIN
INCHES
NOM
.050 BSC
.033
.026
.000
.152 .158 .163 3.85 4.00 4.15
.014
.020
.0004
.008 REF.
.194 BSC
.184 BSC
.236 BSC
.226 BSC
.016
.024
.014
MAX MIN
8
.039
.031
.002
.019
.030
12
MILLIMETERS*
1.27 BSC
0.00
0.20 REF.
4.92 BSC
4.67 BSC
5.99 BSC
5.74 BSC
0.35
0.50
0.85
0.65
0.01
0.40
0.60
.356
MAXNOM
8
1.00
0.80
0.05
0.47
0.75
12
2004 Microchip Technology Inc. DS21191M-page 19
24AA128/24LC128/24FC128
APPENDIX A: REVISION HISTORY
Revision L
Corrections to Section 1.0, Electrical Characteristics.
Revision M
Added 1.8V 400 kHz option for 24FC128.
DS21191M-page 20 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used b y Mic rochip as a me ans to m ake
files and information easily available to customers. To
view the site, the use r must have access to the Intern et
and a web browser, such as Netscape
Internet Explorer. Files are also available for FTP
download from our FTP site.
Connecting to the Microchip Internet
Web Site
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Micr ochip specific bu siness informatio n is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for p roducts, D evelopment Systems,
technical information and more
• Listing of seminars and events
®
or Microsoft
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
®
Plus, this line provides information on how customers
can receive the most c urrent upgrade kit s. The Hot Line
Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
2004 Microchip Technology Inc. DS21191M-page 21
24AA128/24LC128/24FC128
READER RESPONSE
It is our intentio n to pro vi de you with the best documentation possible to ens ure suc c es sfu l u se of y ou r M ic roc hip product. If you wish to provid e your c omment s on org anizatio n, clarity, subject matter, and ways in w hich o ur docum entatio n
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
RE: Reader Response
From:
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
1. What ar e the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
Technical Publications Manager
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Total Pages Sent ________
FAX: (______) _________ - _________
DS21191M24AA128/24LC128/24FC128
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21191M-page 22 2004 Microchip Technology Inc.
24AA128/24LC128/24FC128
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X /XX
Device
Range
PackageTemperature
Finish
Device: 24AA128: 128 Kbit 1.8V I2C Serial
EEPROM
24AA128T: 128 Kbit 1.8V I2C Serial
EEPROM (Tape and Reel)
24LC128: 128 Kbit 2.5V I2C Serial
EEPROM
24LC128T: 128 Kbit 2.5V I
2
C Serial
EEPROM (Tape and Reel)
24FC128: 128 Kbit High Speed I2C Serial
EEPROM
24FC128T: 128 Kbit High Speed I2C Serial
EEPROM (Tape and Reel)
Temperature
Range:
I= -40°C to +85°C
E= -40°C to +125°C
Package: P = Plastic DIP (300 mil body), 8-lead
SN = Plastic SOIC (150 mil body), 8-lead
SM = Plastic SOIC (208 mil body), 8-lead
ST = Plastic TSSOP (4.4 mm), 8-lead
ST14= Plastic TSSOP (4.4 mm), 14-lead
MF = Dual, Flat, No Lead (DFN)(6x5 mm
body), 8-lead
MS = Plastic Micro Small Outline (MSOP),
8-lead
Lead Finish Blank= Standard 63%/37% Sn/Pb
G = Pb-free (Pure Matte Sn)
X
Lead
Examples:
a) 24AA128-I/P: Industrial Temp.,
1.8V, PDIP package.
b) 24AA128T-I/SN: Tape and Reel,
Industrial Temp., 1.8V, SOIC
package.
c) 24AA128-I/ST: Industrial Temp.,
1.8V, TSSOP package.
d) 24AA128-I/MS: Industrial Temp.,
1.8V, MSOP package.
e) 24LC128-E/P: Extended Temp.,
2.5V, PDIP package.
f) 24LC128-I/SN: Industrial Temp.,
2.5V, SOIC package.
g) 24LC128T-I/SN: Tape and Reel,
Industrial Temp., 2.5V, SOIC
package.
h) 24LC128-I/MS: Industrial Temp.,
2.5V, MSOP package.
i) 24FC128-I/P: Industrial Temp.,
1.8V, High Speed, PDIP package.
j) 24FC128-I/SN: Industrial Temp.,
1.8V, High Speed, SOIC package.
k) 24FC128T-I/SN: Tape and Reel,
Industrial Temp., 1.8V, High Speed,
SOIC package
l) 24LC128T-I/STG:Industrial Temp.,
2.5V , TSSOP pack age, T ape & R eel,
Pb-free
m) 24LC128-I/PG: Industrial Temp.,
2.5V, PDIP package, Pb-free
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2004 Microchip Technology Inc. DS21191M-page23
24AA128/24LC128/24FC128
NOTES:
DS21191M-page24 2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are com mitted to continuously improving the code protect ion f eatures of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digit al Mill ennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
®
8-bit MCUs, KEELOQ
®
code hopping
2004 Microchip Technology Inc. DS21191M-page 25
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
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Taiwan Branch
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EUROPE
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Denmark
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Fax: 44-118-921-5820
05/28/04
DS21191M-page 26 2004 Microchip Technology Inc.
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