MICROCHIP 24AA256, 24LC256, 24FC256 Technical data



查询24FC256供应商

M

256K Bit I

24AA256/24LC256/24FC256

2

™

C

CMOS Serial EEPROM

DEVICE SELECTION TABLE

Part

Number

24AA256 1.8-5.5V 400 kHz
24LC256 2.5-5.5V 400 kHz
24FC256 2.5-5.5V 1 MHz I

†

100 kHz for V

‡

100 kHz for E temperature range.

V

CC

Range

CC

< 2.5V.

Max Clock
Frequency

Temp

Ranges

†
‡

I

I, E

FEATURES

• Low power CMOS technology

- Maximum write current 3 mA at 5.5V

- Maximum read current 400 µA at 5.5V

- Standby current 100 nA typical at 5.5V

• 2-wire serial interface bus, I

• Cascadable for up to eight devices

• Self-timed ERASE/WRITE cycle

• 64-byte page-write mode available

• 5 ms max write-cycle time

• Hardware write protect for entire array

• Output slope control to eliminate ground bounce

• Schmitt trigger inputs for noise suppression

• 100,000 erase/write cycles guaranteed

• Electrostatic discharge protection > 4000V

• Data retention > 200 years

• 8-pin PDIP and SOIC (208 mil) packages

• Temperature ranges:

- Industrial (I): -40 ° C to +85 ° C

- Automotive (E): -40 ° C to +125 ° C

2

C compatible

DESCRIPTION

The Microchip Technology Inc. 24AA256/24LC256/
24FC256 (24XX256*) is a 32K x 8 (256K bit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.8V to 5.5V). It has
been developed for advanced, low power applications
such as personal communications or data acquisition.
This device also has a page-write capability of up to 64
bytes of data. This device is capable of both random
and sequential reads up to the 256K boundary. Func­tional address lines allow up to eight devices on the
same bus, for up to 2M bit address space. This device
is available in the standard 8-pin plastic DIP and 8-pin
SOIC (208 mil) packages.

P ACKA GE TYPE

PDIP

A0

1

A1

2

A2

3

Vss

4

SOIC

1

A0

2

A1

3

A2

SS

V

4

BLOCK DIAGRAM

A0 A1 A2

WP

SCL

MEMORY

CONTROL

LOGIC

CONTROL

LOGIC

I/O

SDA

VCC
VSS

I/O

24XX256

8

24XX256

7
6
5

XDEC

Vcc

8

WP

7

SCL

6

SDA

5

VCC
WP
SCL
SDA

HV GENERATOR

PAGE LATCHES

SENSE AMP

R/W CONTROL

EEPROM

ARRAY

YDEC

2

I

C is a trademark of Philips Corporation.

*24XX256 is used in this document as a generic part number for the 24AA256/24LC256/24FC256 devices.

1998 Microchip Technology Inc.

Preliminary

DS21203D-page 1



µ

µ

24AA256/24LC256/24FC256

1.0 ELECTRICAL
CHARACTERISTICS

1.1 Maxim

V

.................................................................................................7.0V

CC

All inputs and outputs w.r.t. V

Storage temperature...................................................-65°C to +150°C

Ambient temp. with power applied...............................-65°C to +125°C

Soldering temperature of leads (10 seconds)...........................+300°C

ESD protection on all pins........................................................... ≥ 4 kV

*Notice: Stresses above those listed under “Maximum Ratings” may

cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is
not implied. Exposure to maximum rating conditions for extended peri­ods may affect device reliability.

TABLE 1-2 DC CHARACTERISTICS

All parameters apply across the
specified operating ranges, unless
otherwise noted.

SCL, SDA, and WP pins:

High level input voltage V

Low level input voltage V

Hysteresis of Schmitt Trigger

inputs (SDA, SCL pins)

Low level output voltage V

Output leakage current I

Note: This parameter is periodically sampled and not 100% tested.

um Ratings*

SS

............................. -0.6V to V

Industrial (I): V
Automotive (E): V

Parameter Symbol Min Max Units Conditions

A0, A1, A2,

Input leakage current I

Pin capacitance

C

(all inputs/outputs)

Operating current I

Standby current I

CC

+1.0V

= +1.8V to 5.5V Tamb = -40°C to +85°C

CC

= +4.5V to 5.5V Tamb = -40°C to 125°C

CC

0.7 V

IH

IL

CC

— 0.3 V

0.2 V

V

IN

CC

I

CC

0.05 V

HYS

LO

, C

OL

LI

OUT

CC

— 0.40 V I

-10 10

-10 10
—10pFV

Read — 400 µA V

Write — 3 mA V

CCS

—1 µ A SCL = SDA = V

TABLE 1-1 PIN FUNCTION TABLE

Name Function

A0, A1, A2 User Configurable Chip Selects

Ground

SS

V
SDA Serial Data
SCL Serial Clock

WP Write Protect Input

V

+1.8 to 5.5V (24AA256)

CC

+2.5 to 5.5V (24LC256,24FC256)

—V

CC
CC

V
V

—VV

AV

AV

CC

V

2.5V

V

CC

< 2.5V

2.5V (Note)

CC

OL

= 3.0 mA @ V

I

= 2.1 mA @ V

OL

= V

or V

IN

SS

IN

V

= V

OUT

= V

= 5.0V (Note)

CC

Tamb = 25°C, f

CC

= 5.5V, SCL = 400 kHz
= 5.5V

CC

CC

SS

CC

or V

SS

or V

CC

= 1 MHz

c

CC

A0, A1, A2, WP = V

CC
CC

, WP = V
, WP = V

= 5.5V

= 4.5V
= 2.5V

SS
CC

SS

FIGURE 1-1: BUS TIMING DATA

TF

SCL

SDA
IN

SDA
OUT

WP

DS21203D-page 2

TSU:STA

TSP

TLOW

THD:STA

THIGH

THD:DAT TSU:DAT TSU:STO

TAA

(protected)

(unprotected)

VHYS

TR

TSU:WP

Preliminary

TBUF

THD:WP

1998 Microchip Technology Inc.

24AA256/24LC256/24FC256

TABLE 1-3 AC CHARACTERISTICS

All parameters apply across the spec­ified operating ranges unless other­wise noted.

Parameter Symbol Min Max Units Conditions

Clock frequency F

Clock high time T

Clock low time T

SDA and SCL rise time
(Note 1)

SDA and SCL fall time
(Note 1)

START condition hold time THD:STA 4000

START condition setup time TSU:STA 4700

Data input hold time THD:DAT 0 — ns (Note 2)
Data input setup time TSU:DAT 250

STOP condition setup time TSU:STO 4000

WP setup time TSU:WP 4000

WP hold time THD:WP 4700

Output valid from clock
(Note 2)

Bus free time: Time the bus must be
free before a new transmission can
start

Output fall time from VIH
minimum to VIL maximum
CB ≤ 100 pF

Industrial (I): V
Automotive (E): V

CLK

HIGH

LOW

R

T

TF —

TAA —

TBUF 4700

TOF 10 + 0.1CB250

—
—
—
—

4000
4000

600
500

4700
4700
1300

500

—
—
—
—

—

4000

600
250

4700

600
250

250
100
100

4000

600
250

4000

600
600

4700
1300
1300

—
—
—

4700
1300

500

= +1.8V to 5.5V Tamb = -40°C to +85°C

CC

= +4.5V to 5.5V Tamb = -40°C to 125°C

CC

100

kHz 4.5V ≤ V
100
400

1000

—
—
—
—

—
—
—
—

1000
1000

300
300

300
100

—
—
—
—

—
—
—
—

—
—
—
—

—
—
—
—

—
—
—
—

—
—
—
—

3500
3500

900
400

—
—
—
—

1.8V ≤ V

2.5V ≤ V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ V

1.8V ≤ V

2.5V ≤ V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ V

1.8V ≤ V

2.5V ≤ V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ V

1.8V ≤ V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns All except 24FC256

24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)

1.8V ≤ VCC ≤ 2.5V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)

1.8V ≤ VCC ≤ 2.5V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)

1.8V ≤ VCC ≤ 2.5V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)

1.8V ≤ VCC ≤ 2.5V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)

1.8V ≤ VCC ≤ 2.5V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)

1.8V ≤ VCC ≤ 2.5V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ V

1.8V ≤ V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)

1.8V ≤ VCC ≤ 2.5V

2.5V ≤ VCC ≤ 5.5V
24FC256 (2.5 V ≤ Vcc ≤ 5.5 V)

ns All except 24FC256 (Note 1)

250

24FC256 (Note 1)



CC

5.5V (E Temp range)

CC

2.5V

CC

5.5V

CC

5.5V (E Temp range)

CC

2.5V

CC

5.5V

CC

5.5V (E Temp range)

CC

2.5V

CC

5.5V

CC

≤ 5.5V (E Temp range)

CC ≤ 2.5V

CC ≤ 5.5V (E Temp range)
CC ≤ 2.5V

≤

≤

≤

≤

≤

≤

≤

≤

≤

1998 Microchip Technology Inc.

Preliminary

DS21203D-page 3

24AA256/24LC256/24FC256

TABLE 1-3 AC CHARACTERISTICS

All parameters apply across the spec­ified operating ranges unless other­wise noted.

Parameter Symbol Min Max Units Conditions

Input filter spike suppression
(SDA and SCL pins)

Write cycle time (byte or page) TWC —5
Endurance 100K — cycles 25°C, VCC = 5.0V, Block Mode (Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum

300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.

3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs which provide improved noise spike

suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application,

please consult the Total Endurance Model which can be obtained on Microchip’s website @www.microchip.com.

Industrial (I): VCC = +1.8V to 5.5V Tamb = -40°C to +85°C
Automotive (E): V

T

SP — 50 ns All except 24FC256 (Notes 1 and 3)

CC = +4.5V to 5.5V Tamb = -40°C to 125°C

ms

DS21203D-page 4 Preliminary  1998 Microchip Technology Inc.