MICROCHIP 24AA128, 24LC128, 24FC128 Technical data
24AA128/24LC128/24FC128
128K I2C™CMOS Serial EEPROM
DEVICE SELECTION TABLE
Part
Number
24AA128 1.8-5.5V 400 kHz
24LC128 2.5-5.5V 400 kHz
24FC128 2.5-5.5V 1 MHz I
†
100 kHz for VCC < 2.5V.
‡
100 kHz for E temperature range .
VCC
Range
Max Clock
Frequency
†
‡
Temp
Ranges
C
I, E
FEATURES
• Low power CMOS technology
- Maximum write current 3 mA at 5.5V
- Maximum read current 400 µA at 5.5V
- Standby current 100 nA typical at 5.5V
• 2-wire serial interface bus , I2C compatible
• Cascadable for up to eight devices
• Self-timed ERASE/WRITE cycle
• 64-byte page-write mode available
• 5 ms max write-cycle time
• Hardware write protect for entire array
• Output slope control to eliminate ground bounce
• Schmitt trigger inputs for noise suppression
• 100,000 erase/write cycles guaranteed
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP and SOIC (150 a nd 20 8 m il) p ackages
• 14-pin TSSOP package
• Temperature ranges:
- Commercial (C) 0° to +70°C
- Industrial (I): -40°Cto +85°C
- Automotive (E): -40°Cto+125°C
PACKAGE TYPE
PDIP
A0
1
A1
2
A2
3
Vss
4
SOIC
V
TSSOP
A0
A1
A2
SS
A0
A1
NC
NC
NC
A2
Vss
1
2
3
4
1
2
3
4
5
6
7
BLOCK DIAGRAM
A0 A1 A2
WP
24XX128
24XX128
24XX128
8
7
6
5
8
7
6
5
14
13
12
11
10
9
8
Vcc
WP
SCL
SDA
VCC
WP
SCL
SDA
Vcc
WP
NC
NC
NC
SCL
SDA
HV GENERATOR
DESCRIPTION
The Microchip Technology Inc. 24AA128/24LC128/
24FC128 (24XX128*) is a 16K x 8 (128K bit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.8V to 5.5V). It has
been developed for advanced, low power applications
such as personal communications or data acquisition.
This devi ce also ha s a page-write ca pa bility of u p to 64
CONTROL
LOGIC
I/O
SDA
I/O
SCL
MEMORY
CONTROL
LOGIC
XDEC
EEPROM
ARRAY
PAGE LATCHES
YDEC
bytes of data. This device is capable of both random
and sequential reads up to the 128K boundary. Functional address lines allow up to eight devices on the
same bus, for up to 1M bit address space. This device
is avail able in th e standard 8-pin p lastic DIP, 8-pin SOIC
VCC
VSS
SENSE AMP
R/W CONTROL
(150 and 208 mil), and 14-pin TSSOP pa ckages.
I2C is a trademark of Philips Corporation.
*24XX128 is used in this document as a generic part number for the 24AA128/24LC128/24FC128 devices.
1999 Microchip Technology Inc. Preliminary DS21191F-page 1
24AA128/24LC128/24FC128
1.0 ELECTRICAL CHARACTERISTICS
1.1 Maximum Ratings*
VCC........................................................................6.5V
All inputs and outputs w.r.t. V
Storage temperature..........................-65°C to +150°C
Ambient temp. with power applied......-65°C to +125°C
Soldering temperature of leads (10 seconds)..+300°C
ESD protection on all pins ..................................... ≥ 4 kV
*Notice: Stresses above those listed under “Maximum Ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listin gs of this spe cificat ion is
not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
SS .....-0.6V to VCC +1.0V
TABLE 1-1: PIN FUNCTION TABLE
Name Function
A0, A1, A2 User Configurable Chip Selects
V
SS Ground
SDA Serial Data
SCL Serial Clock
WP Write Protect Input
CC +1.8 to 5.5V (24AA128)
V
+2.5 to 5.5V (24LC128)
TABLE 1-2: DC CHARACTERISTICS
All parameters apply across the
specified operating ranges, unless
otherwise noted.
Parameter Symbol Min Max Units Conditions
A0, A1, A2, SCL, SDA, and WP
pins:
High level input voltage V
Low level input voltage V
Hysteresis of Schmitt Trigger
inputs (SDA, SCL pins)
Low level output voltage VOL —0.40VIOL = 3.0 mA @ VCC = 4.5V
Input leakage current I
Output leakage current ILO -10 10 µAVOUT = VSS or VCC
Pin capacitance
(all inputs/outputs)
Operating current
Standby current I
Note: This parameter is periodically sampled and not 100% tested.
Commercial (C): VCC = +1.8V to 5.5V Tamb = 0°C to +70°C
Industrial (I): V
Automotive (E): V
IH 0.7 VCC —V
IL — 0.3 VCC
V
HYS 0.05 VCC —VVCC ≥ 2.5V (Note)
LI -10 10 µA
CC = +2.5V to 5.5V Tamb = -40°C to +85°C
CC = +4.5V to 5.5V Tamb = -40°C to 125°C
V
VCC ≥ 2.5V
0.2 VCC
V
CC < 2.5V
V
I
OL = 2.1 mA @ VCC = 2.5V
IN = VSS or VCC, WP = VSS
V
VIN = VSS or VCC, WP = VCC
CIN, COUT —10pFVCC = 5.0V (Note)
Tamb = 25°C, f
I
CC Read — 400 µA VCC = 5.5V, SCL = 400 kHz
I
CC Write — 3 mA VCC = 5.5V
CCS —1 µA
SCL = SDA = V
A0, A1, A2, WP = V
c
= 1 MHz
CC = 5.5V
SS
FIGURE 1-1: BUS TIMING DATA
SCL
SDA
IN
SDA
OUT
WP
DS21191F-page 2 Preliminary 1999 Microchip Technology Inc.
TSU:STA
THD:STA
TLOW
(protected)
(unprotected)
TSU:WP
THD:WP
24AA128/24LC128/24FC128
TABLE 1-3: AC CHARACTERISTICS
All parameters apply across the specified operating ranges unless otherwise noted.
Parameter Symbol Min Max Units Conditions
Clock frequency F
Clock high time T
Clock low time T
SDA and SCL rise time
(Note 1)
SDA and SCL fall time
(Note 1)
START condition hold time T
START condition setup time T
Data input hold time T
Data input setup time T
STOP condition setup time T
WP setup time T
WP hold time T
Note 1: Not 100% tested. C
B
2: As a transmitt er, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined T
SP and VHYS specifications are due to new Schmitt trigger inputs which provide improved noise spike
suppression. This eliminates the need for a TI specification for standard operation.
4: T his parameter is not tested b ut guaranteed b y characterization. F or endurance estimates in a specific application, please
consult the Total Endurance Model which can be obtained on Microchip’s BBS or website.
Commercial (C): VCC = +1.8V to 5.5V Tamb = 0°C to +70°C
Industrial (I): V
Automotive (E): V
CLK —
HIGH 4000
LOW 4700
R —
T
F —
T
HD:STA 4000
SU:STA 4700
HD:DAT 0 — ns (Note 2)
SU:DAT 250
SU:STO 4000
SU:WP 4000
HD:WP 4700
= total capacitance of one bus line in pF.
CC = +2.5V to 5.5V Tamb = -40°C to +85°C
CC = +4.5V to 5.5V Tamb = -40°C to 125°C
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
—
—
—
4000
600
500
4700
1300
500
—
—
—
—
4000
600
250
4700
600
250
250
100
100
4000
600
250
4000
600
600
4700
1300
1300
100
100
400
1000
—
—
—
—
—
—
—
—
1000
1000
300
300
300
100
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
kHz 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns All except 24FC128
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ VCC ≤ 5.5V (E Temp range)
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
1999 Microchip Technology Inc. Preliminary DS21191F-page 3
24AA128/24LC128/24FC128
TABLE 1-3: AC CHARACTERISTICS (CONTINUED)
All parameters apply across the specified operating ranges unless otherwise noted.
Parameter Symbol Min Max Units Conditions
Output valid from clock
(Note 2)
Bus free time: Time the bus must be
free before a new transmission can
start
Output fall time from V
minimum to VIL maximum
≤ 100 pF
C
B
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or page) T
Endurance 100K — cycles 25°C, V
Note 1: Not 100% tested. C
2: As a transmitt er, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined T
suppression. This eliminates the need for a TI specification for standard operation.
4: T his parameter is not tested b ut guaranteed b y characterization. F or endurance estimates in a specific application, please
consult the Total Endurance Model which can be obtained on Microchip’s BBS or website.
IH
B
SP and VHYS specifications are due to new Schmitt trigger inputs which provide improved noise spike
Commercial (C): VCC = +1.8V to 5.5V Tamb = 0°C to +70°C
Industrial (I): V
Automotive (E): V
TAA —
BUF 4700
T
T
OF 10 + 0.1C
SP — 50 ns All except 24FC128 (Notes 1 and 3)
T
WC —5ms
= total capacitance of one bus line in pF.
CC = +2.5V to 5.5V Tamb = -40°C to +85°C
CC = +4.5V to 5.5V Tamb = -40°C to 125°C
CC
CC
CC
CC
CC
CC
CC = 5.0V, Block Mode (Note 4)
—
—
—
4700
1300
500
3500
3500
900
400
—
—
—
—
250
B
250
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns 4.5V ≤ V
1.8V ≤ V
2.5V ≤ V
24FC128 (2.5 V ≤ Vcc ≤ 5.5 V)
ns All except 24FC128 (Note 1)
24FC128 (Note 1)
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
5.5V (E Temp range)
≤
2.5V
≤
5.5V
≤
2.0 PIN DESCRIPTIONS
2.1 A0, A1, A2 Chip Address Inputs
The A0, A1, A2 inputs are used by the 24XX128 for
multiple device operations. The levels on these inputs
are compared with the cor respondi ng bits in t he slave
address. The chip is select ed if the compare is tr ue.
Up to eight devices may be connected to the same bus by
using different chip select bit combinati ons. If left unconnected, these inputs will be pulled down internally to V
2.2 SDA Serial Data
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an opendrain terminal, therefore , the SDA b us requires a pullup
resistor to V
CC (typical 10 kΩ for 100 kHz, 2 kΩ for 400
kHz and 1 MHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are reserved
for indicating the START and STOP conditions.
2.3 SCL Serial Clock
This input is us ed to synch roniz e th e dat a tr ansfer from
and to the device.
SS.
2.4 WP
This pin can be connected to either VSS, VCC or left
floating. A n internal pull-down resistor on this pin will
keep the device in the unprotected state if left floating.
If tied to V
SS or left floating, normal memory operation
is enabled (read/write the entire memory 0000-3FFF).
If tied to V
CC, WRITE operations are inhibited. Read
operations are not affected.
3.0 FUNCTIONAL DESCRIPTION
The 24XX128 supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus must be controlled by a master device which generates the serial
clock (SCL), controls the bus access, and generates
the START and STOP conditions while the 24XX128
works as a slav e. Both m aster and sla ve can o perate as
a transmitter or receiver, but the master device determines which mode is activated.
DS21191F-page 4 Preliminary 1999 Microchip Technology Inc.
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