• 8L PDIP, SOIC, TSSOP, DFN and 5L SOT-23
packages
• Pb-free finish available
• Temperature ranges available:
- Commercial (C):0°Cto+70°C
- Industrial (I): -40°Cto+85°C
- Automotive (E): -40°Cto +125°C
2
C™ compatible
Package Types
8-PIN PDIP/SOIC
NC
NC
NC
Vss
8-PIN TSSOP
1
NC
2
NC
3
NC
SS
4
V
5-PIN SOT-23
SCL
15
SS
V
2
SDA
3
Block Diagram
I/O
Control
Logic
Memory
Control
1
2
3
4
4
Logic
VCC
NC
V
XDEC
NC
NC
NC
CC
V
8
7
NC
6
SCL
5
SDA
8
VCC
7
NC
6
SCL
5
SDA
DFN
1
2
3
SS
4
HV Generator
8
7
6
5
EEPROM
Array
CC
V
NC
SCL
SDA
Description:
SCL
The Microchip Technology Inc. 24AA00/24LC00/
24C00 (24XX00*) is a 128-bit Electrically Erasable
PROM memory organized as 16 x 8 with a 2-wire
serial interface. Low-voltage design permits operation
down to 1.8 volts for th e 24AA00 version, an d every
version maintains a maximum standby current of only
1 μA and typical active current of only 500 μA. This
device was designed for where a small amount of
EEPROM is needed for the storage of calibration
values, ID numbers or manufacturing information, etc.
The 24XX00 is available in 8-pin PDIP, 8-pin SOIC
(150 mil), 8-pin TSS OP, 8-pin 2x3 DFN and the 5-pin
SOT-23 packages.
I2C is a trademark of Philips Corporation.
*24XX00 is used in this document as a generic part number for
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-65°C to +125°C
ESD protection on all pins..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indica ted in the opera tional li stings of this sp ecification is not i mplied. Ex posure to maximum rating
conditions for extended periods may affect device reliability.
(†)
SS ......................................................................................................... -0.6V to VCC +1.0V
TABLE 1-1:DC CHARACTERISTICS
All Parameters apply across the
recommended operating ranges unless
otherwise noted
ParameterSymbolMin.Max.UnitsConditions
SCL and SDA pins:
High-level input voltage
Low-level input voltageVIL—0.3 VCCV(Note)
Hysteresis of Schmitt Trigger
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
400 kHz).
For normal data t ransfer SDA is all owed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
CC (typical 10 kΩ for 100 kHz, 2 kΩ for
2.2SCL Serial Clock
This input is u sed t o sy nchron ize the d ata trans fer fro m
and to the device.
2.3Noise Protection
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
3.0FUNCTIONAL DESCRIPTION
The 24XX00 supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus has to be
controlled by a master device which generates the
Serial Clock (SCL), controls the bus access, and
generates the Start and Stop conditions, while the
24XX00 works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
4.0BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable wheneve r the cl ock lin e is high . Changes i n
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1Bus Not Busy (A)
Both data and clock lines remain high.
4.2Start Data Transfer (B)
A high-to- lo w t ran si t i on of t h e SD A l in e whi l e t h e c lo ck
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
4.4Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a S tart condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is
theoretically unlimited.
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
Note:The 24XX00 does not generate any
Acknowledge bits if an internal programming cycle is in progress.
The device that acknowledges has to pull down the
SDA line during the Acknowl edge cloc k pulse in s uch a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. A master must signal an end of data to the
slave by not gene rati ng an Ac kno w led ge bi t o n th e last
byte that has been clocked out of the slave. In this
case, the slave must leave the data line high to enable
the master to generate the Stop condition (Figur e 4-2).
FIGURE 4-1:DATA TRANSFER SEQUENCE ON THE SERIAL BUS
SCL
SDA
(A)
Condition
(B)
Start
(C)
Address or
Acknowledge
Valid
Data
Allowed
to Change
(D)
FIGURE 4-2:ACKNOWLEDGE TIMING
Acknowledge
Bit
Stop
Condition
(A)(C)
SCL
SDA
Data from transmitter
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
987654321123
Data from transmitter
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
After generating a Start condition, the bus master
transmits a control byte consisting of a slave address
and a Read/Write bit that indicates what type of
operation is to be perfo rmed. The sl ave addres s for the
24XX00 consists of a 4-bit device code ‘1010’ followed
by three “don’t care” bits.
The last bit of the control byte determine s the operation
to be performed. When set to a o ne a read operati on is
selected, and when set to a zero a write operation is
selected (Figure 5-1). The 24XX00 monitors the bus for
its corresponding slave address all the time. It
generates an Ackn owledge bit if the sla ve addres s was
true and it is not in a programming mode.
FIGURE 5-1:CONTROL BYTE FORMAT
Bit
Bits
Start Bit
Read/Write
Device Select
Bits
1010xxxSACKR/W
Slave Address
Don’t Care
Acknowledge Bit
6.0WRITE OPERATIONS
6.1Byte Write
Following the Start signal from the master, the device
code (4 bits), the “don’t care” bits (3 bits), and the R/W
bit (which is a logic low) are placed onto the bus by the
master transmitter. This indicates to the addressed
slave receiver that a byte with a word address will
follow after it has generated an Acknowl edge bit durin g
the ninth clock cycl e. Therefore, the next byte t ransmitted by the master is the word address and will be
written into the Address Pointer of the 24XX00. Only
the lower four address bit s are us ed by t he device , and
the upper four bits are “don’t cares.” The 24XX00 will
acknowledge the address byte and the master device
will then transmit the data word to be written into the
addressed memory location. The 24XX00 acknowledges again and the master generates a Stop
condition. This initiates the internal write cycle, and
during this time the 24XX00 will not ge nerate Ack now ledge signals (Figure7-2). After a by te Wr ite co mmand,
the internal address counter will not be incremented
and will point to the s ame address lo cation that was jus t
written. If a Stop bit is transmitted to the device at any
point in the Write comman d sequenc e before the e ntire
sequence is complete, then the command will abort
and no data will be written. If more than 8 data bits are
transmitted before the Stop bit is sent, then the device
will clear the previously loaded byte and begin loading
the data buffer again. If more than one data byte is
transmitted to the device and a Stop bit is sent before a
full eight data bits have been transmitted, then the
Write command will abort and no data will be written.
The 24XX00 employs a V
which disables the internal erase/write logic if the V
is below 1.5V (24AA00 and 24LC00) or 3.8V (24C00)
at nominal conditions.
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issu ed from the mas ter , the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W
busy with the write cycle, then no ACK will be returned.
If no ACK is returne d, then th e S t art bit and control byte
must be re-sent. If the cycle is complete, then the
device will return the ACK and the master can then
proceed with the next Read or Write command. See
Figure 7-1 for flow diagram.
Read operations are initiated in the same way as write
operations with the exception that the R/W
slave address is set to one. The re are three ba sic types
of read operations: current add ress read , rand om rea d
and sequential read.
8.1Current Address Read
The 24XX00 contains an address counter that maintains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n, the next current address read
operation would acc ess dat a f rom add ress n + 1. Upon
receipt of the slave a ddress with the R/W
the device issues an acknowledge and transmits the
eight-bit data word. The master will not acknowledge
the transfer , but does generate a S top con dition and the
device discontinues transmission (Figure8-1).
8.2Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operatio n, fi rst the word address must
be set. This is d one by sending the word a ddress to the
device as part of a write operation.
bit of the
bit set to one,
After the word address is sent, the master generates a
Start condition following the acknowledge. This terminates the write operation, but not before the internal
Address Pointer is set. Then the master issues the
control byte again, but with the R/W
bit set to a one.
The 24XX00 will then i ssue an ack nowledge a nd transmits the eight bit data word. The master will not
acknowledge the transfer, but does generate a Stop
condition and the device discontinues transmission
(Figure 8-2). After this command, the internal address
counter will point to the address location following the
one that was just read.
8.3Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the device transmits the
first data byte, the master issues an acknowledge as
opposed to a Stop condition in a random read. This
directs the device to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
To provide se quential reads the 2 4XX00 contains an
internal Address Pointer which is incremented by one
at the complet ion o f e ach r ead o peratio n. Thi s Add ress
Pointer allows the entire memory contents to be serially
read during one operation.
Note:For very small packages with no room for the Pb-free JEDEC designator
Note:In the event the full Microchip part num ber can not be ma rked on one line , it wil
TSSOP
TTemperature (I, E)
YYear code (last digit of calendar year)
YYYear code (last 2 digits of calendar year)
WWWeek code (w eek of January 1 is week ‘01’)
NNNAlphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
3
e
, the marking will only appear on the outer carton or reel label.
3
e
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
C Temp.I Temp.E Temp.I Temp.E Temp.
SOT-23DFN
Note:Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
Number of Pins
Pitch
Top to Seating PlaneA.140.155.1703.563.944.32
Molded Package ThicknessA2.115.130.1452.923.303.68
Base to Seating PlaneA1.0150.38
Shoulder to Shoulder WidthE.300.313.3257.627.948.26
Molded Package WidthE1.240.250.2606.106.356.60
Overall LengthD.360.373.3859.149.469.78
Tip to Seating PlaneL.125.130.1353.183.303.43
Lead Thickness
Upper Lead WidthB1.045.058.0701.141.461.78
Lower Lead WidthB.014.018.0220.360.460.56
Overall Row Spacing§eB.310.370.4307.879.4010.92
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
Number of Pins
Pitch
Standoff §
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
n
B
1
A
c
A1
φ
β
Units
A1
n
p
φ
c
α
β
048048
Number of Pins
Pitch
Standoff §
Foot Angle
Lead Thickne ss
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
5-Lead Plastic Small Outline Transistor (OT) (SOT-23)
E
E1
p
B
p1
D
n
c
β
Number of Pins
Pitch
Outside lead pitch (basic)
Foot Angle
Lead Thickne ss
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
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www.m ic roc hi p.c om . Thi s web si te i s us ed as a m ean s
to make files and information easily available to
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Customers should contact their distributor,
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It is our intentio n to pro vi de you with the best documentation possible to ens ure suc c es sfu l u se of y ou r M ic roc hip product. If you wish to provid e your c omment s on org anizatio n, clarity, subject matter, and ways in w hich o ur docum entatio n
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
RE:Reader Response
From:
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
Technical Publications Manager
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Total Pages Sent ________
FAX: (______) _________ - _________
DS21178E24AA00/24LC00/24C00
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X/XX
PackageTemperature
X
Lead Finish
Range
Device:24AA00:= 1.8V, 128 bit I2C™ Serial EEPROM
Temperature
Range:
Package:P= Plastic DIP (300 mil body), 8-lead
Lead Finish Blank= Pb-free – Matte Tin (see Note 1)
24AA00T: = 1.8V, 128 bit I
(Tape and Reel)
24LC00:= 2.5V, 128 bit I
24LC00T: = 2.5V, 128 bit I
(Tape and Reel)
24C00:= 5V, 128 bit I
24C00T:= 5V, 128 bit I
(Tape and Reel)
Blank = 0°C to 70°C
I= -40°C to +85°C
E= -40°C to +125°C
SN = Plastic SOIC (150 mil body), 8-lead
ST = Plastic TSSOP (4.4 mm), 8-lead
OT = SOT-23, 5-lead (Tape and Reel only)
MC = 2x3 DFN, 8-lead
G= Pb-free – Matte Tin only
2
C Serial EEPROM
2
C Serial EEPROM
2
C Serial EEPROM
2
C™ Serial EEPROM
2
C™ Serial EEPROM
Examples:
a)24AA00-I/P: Industrial T emperature,1.8V
PDIP package
b)24AA00-I/SN: Industrial Temperature,
1.8V , SOIC package
c)24AA00T-I/OT: Industrial Temperature,
1.8V , SOT-23 package, tape and reel
d)24LC00-I/P: Industrial Temperature,
2.5V, PDIP package
e)24C00-E/SN: Extended Temperature,
5V, SOIC package
f)24LC00T-I/OT : Industrial Temperature,
2.5V , SOT-23 package, tape and reel
Note 1: Most products manufactured after January 2005 will have a Matte Tin (Pb-free) finish. Most products manufactured
before January 2005 will have a finish of approximately 63% Sn and 37% Pb (Sn/Pb).
Please visit www.microchip.com for the latest information on Pb-free conversion, including conversion date codes.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.Your local Microchip sales office
2.The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3.The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today , when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•Microchip is willing to work with the customer who is concerned about the integrity of their code.
•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are com mitted to continuously improving the code protect ion f eatures of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digit al Mill ennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
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Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, K
EELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
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AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programmin g, IC SP, ICEPIC, MPASM, MPLIB, MPL I N K ,
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,
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Chandler and Tempe, Arizona and Mountain View, California in
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procedures are for its PICmicro
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
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