MICREL SY100S366 Datasheet

B6B7B
8
V
EE
A8A
7
A
5
A
4
A
3
A
1
A
2
B
5
B
3
B
1
B
4
B
0
B
2
17
16
15
14
13
1
2
3
4
5
6724823922102111201219
Top View
Flatpack
F24-1
V
CC
V
CCA
A = B
A > B
B > A
A
0
COMPARATOR
SY100S366
FEATURES
Max. propagation delay of 1500ps
IEE min. of –120mA
Industry standard 100K ECL levels
Extended supply voltage option:
VEE = –4.2V to –5.5V
Voltage and temperature compensation for improved
noise immunity
Internal 75K input pull-down resistors
120% faster than Fairchild
Approximately 40% lower power than Fairchild
Function and pinout compatible with Fairchild F100K
Available in 24-pin CERPACK and 28-pin PLCC
packages
PIN NAMES
DESCRIPTION
The SY100S366 is an ultra-fast 9-bit magnitude comparator designed for use in high-performance ECL systems. The device compares the arithmetic value of two 9-bit words and indicates whether one word is greater than or equal to the other. The inputs on the device have 75K pull-down resistors.
PIN CONFIGURATIONS
A7 A8
VEE
VEES
B8
A6A5A4
12 13 14 15 16 17
B7 B6
1911201021922823724
B4B2B5
VEES
Top View
PLCC J28-1
B3
VEES
A3A2A1
5
6
25
B1
A0
4 3
A > B V
CCA
2 1
VCC V
CC
28 27
A = B
2618
B > A
B0
Pin Function
A0 – A8 A Data Inputs B0 – B8 B Data Inputs A > B A Greater Than B Output B > A B Greater Than A Output A = B Complement A Equal to B Output
(Active LOW)
VEES VEE Substrate
CCA VCCO for ECL Outputs
V
18
A
6
1
Rev.: G Amendment: /0 Issue Date: July, 1999
Micrel
BLOCK DIAGRAM
SY100S366
A
8
B
8
A
7
B
7
A
6
B
6
A
5
A > B
B
5
A
4
B
4
A
3
B
3
A
2
B
2
A
1
A = B
B > A
B
1
A
0
B
0
2
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