MICREL SY10EL16VA-VF, SY100EL16VA-VF Datasheet

ENHANCED
DIFFERENTIAL
RECEIVER

SY10EL16VA-VF

SY100EL16VA-VF

FEATURES

■ 3.3V and 5V power supply options

■ 250ps propagation delay

■ Very high voltage gain vs. standard EL16 or EL16V

■ Ideal for Pulse Amplifier and Limiting Amplifier

applications

■ Data synchronous Enable/Disable (/EN) on QHG

HG provides for complete glitchless gating of the

/Q
outputs

■ Ideal for gating timing signals

■ Complete solution for high quality, high frequency

crystal oscillator applications

■ Internal 75K Ohm input pull-down resistors

■ Available in both 8 and 16-pin SOIC package; 8 and

10-pin (3mm) MSOP and in DIE form

and

PIN NAMES

Pin Function

D Data Inputs
Q Data Outputs
QHG Data Outputs w/High Gain
VBB Reference Voltage Output
/EN Enable Input

TRUTH TABLE

/EN QHG Output

0 Data
1 Logic Low

DESCRIPTION

The SY10/100EL16VA-VF are differential receivers.
The devices are equivalent to SY10/100EL16 or SY10/
100EL16V with enhanced capabilities. The QHG, /QHG
outputs have a DC gain several times larger than the DC
gain of the Q output.

The SY10/100EL16VA have an identical pinout to the
SY10/100EL16 or SY10/100EL16V. It provides a VBB
output for either single-ended application or as a DC
bias for AC coupling to the device.

The SY10/100EL16VB are very similar to the SY10/
100EL16VA. The /Q output is provided for feedback
purposes.

The SY10/100EL16VC provides an /EN input which is
synchronized with the data input (D) signal in a way that
provides glitchless gating of the QHG and /QHG outputs. When
the /EN signal is LOW, the input is passed to the outputs and
the data output equals the data input. When the data input is
HIGH and the /EN goes HIGH, it will force the QHG
the /QHG HIGH on the next negative transition of the data
input. If the data input is LOW when the /EN goes HIGH, the
next data transition to a HIGH is ignored and QHG remains
LOW and /QHG remains HIGH. The next positive transition of
the data input is not passed on to the data outputs under these
conditions. The QHG and /QHG outputs remain in their dis­abled state as long as the /EN input is held HIGH. The /EN
input has no influence on the /Q output and the data input is
passed on (inverted) to this output whether /EN is HIGH or
LOW. This configuration is ideal for crystal oscillator applica­tions, where the oscillator can be free running and gated on
and off synchronously without adding extra counts to the
output.

The SY10/100EL16VD provides the flexibility of all the
combinations in DIE form, in 16-pin 150mil SOIC package or
in 10-pin MSOP package. The 16-pin SOIC and 10-pin MSOP
packages are ideal for prototyping DIE applications.

The SY10/100EL16VE are similar to the SY10/100EL16VB
where the Q, /Q output is made available differently. In this
package option, VBB is no longer provided.

The SY10/100EL16VF are similar to the SY10/100EL16VC,
offering the D, /D inputs rather than the VBB output.

LOW and

Rev.: L Amendment: /1

1

Issue Date: July 2000

Micrel

PIN CONFIGURATION/BLOCK DIAGRAM

SY10EL16VA-VF

SY100EL16VA-VF

NC

/D

VBB

1

2

D

3

4

8

VCC

7

QHG

6

/QHG

5

VEE

SY10/100EL16VA

5V/3.3V Differential Receiver w/High Gain

(Available in 8-pin SOIC or 8-pin MSOP)

8

1

1

Q

/Q

2

2

D

D

/D

3

3

D

V

BB

BB

V

4

4

8

VCC

VCC

7

7

QHG

QHG

6

6

/QHG

5

5

VEE

VEE

8

V

CC

7

QHG

6

/QHG

5

VEE

/Q

/D

1

Q

2

3

D

4

SY10/100EL16VE

EL16VB w/Differential Q, QB output (no VBB)

(Available in 8-pin SOIC or 8-pin MSOP)

SY10/100EL16VB

EL16VA w/Extra QB output

(Available in 8-pin SOIC or 8-pin MSOP)

/Q

V

BB

/EN

1

2

D

3

V

BB

4

LEN Q

LATCH

D

OE

8

7

6

5

SY10/100EL16VC

EL16VB w/Enable Input

(Available in 8-pin SOIC or 8-pin MSOP)

V

Q

/Q

V

CC

HG

EE

HG

/Q

/D

/EN

1

2

D

3

BB

4

LEN Q

LATCH

D

OE

8

7

6

5

SY10/100EL16VF

EL16VC w/Differential Data Input

(Available in 8-pin SOIC or 8-pin MSOP)

V

Q

/Q

V

CC

HG

HG

EE

2

Micrel

PIN CONFIGURATION/BLOCK DIAGRAM

SY10EL16VA-VF

SY100EL16VA-VF

Q

/Q

D

/D

VBB

EL16VDXC packaged in 10-pin MSOP

DIE LAYOUT

1
2

3

4

5

MSOP

K10-1

SY10/100EL16VDKC

All options in DIE form w/Extra Q output and VBB output

VCC

10

QHG

9

/QHG

8

VEE

7

/EN

6

Die Size (mils) 39. X 52. X 14.5

V

NC

/Q

/D

BB

NC

NC

1

2

Q

3

4

D

5

6

7

8

SOIC

Z16-2

NC

16

V

CC

15

Q

HG

14

13

/Q

HG

V

EE

12

11

/EN

NC

10

NC

9

SY10/100EL16VDZC

EL16VDXC packaged in 16-pin SOIC

V

/EN

/Q

/D

BB

Q

V

CC

Q

HG

D

OE

LENDQ

LATCH

V

BB

/Q

HG

EE

V

SY10/100EL16VDXC

DIE

TOP VIEW

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