MICREL SY100EL15L Datasheet
3.3V 1:4 CLOCK
DISTRIBUTION
Synergy™ High-Speed Products
FEATURES DESCRIPTION
ClockWorks™
ClockWorks™
SY100EL15LMicrel
SY100EL15L
■ 3.3V power supply
■ 50ps output-to-output skew
■ Low power
■ Synchronous enable/disable
■ Multiplexed clock input
■ 75KΩ internal input pull-down resistors
■ ESD protection of 2000V
■ Available in 16-pin SOIC package
PIN CONFIGURATION/BLOCK DIAGRAM
EN
CC
V
16 15 14 13 12 11 10 9
D
Q
2
1
Q
0Q0
CLK
SCLK
1 0
34567
Q
Q
1
1
CLK
Q
BB
V
2
Q
2
SEL
Q
V
EE
8
3
3
Q
The SY100EL15L is a low skew 1:4 clock distribution
IC designed explicitly for low skew clock distribution
applications. The device can be driven by either a
differential or single-ended ECL or, if positive power
supplies are used, PECL input signal. If a single-ended
input is to be used the VBB output should be connected
to the CLK input and bypassed to ground via a 0.01µF
capacitor. The VBB output is designed to act as the
switching reference for the input of the EL15 under singleended input conditions. As a result, this pin can only
source/sink up to 0.5mA of current.
The EL15 features a multiplexed clock input to allow
for the distribution of a lower speed scan or test clock
along with the high speed system clock. When LOW (or
left open and pulled LOW by the input pull-down resistor)
the SEL pin will select the differential clock input.
The common enable (EN) is synchronous so that the
outputs will only be enabled/disabled when they are
already in the LOW state. This avoids any chance of
generating a runt clock pulse when the device is enabled/
disabled as can happen with an asynchronous control.
The internal flip flop is clocked on the falling edge of the
input clock, therefore all associated specification limits
are referenced to the negative edge of the clock input.
When both differential inputs are left open, CLK input
will pull down to VEE and CLK input will bias around
VCC/2.
Pin Function
CLK Differential Clock Inputs
SCLK Synchronous Clock Input
EN Synchronous Enable
SEL Clock Select Input
VBB Reference Output
Q0-3 Differential Clock Outputs
© 1999 Micrel
SOIC
TOP VIEW
TRUTH TABLEPIN NAMES
CLK SCLK SEL EN Q
L XLLL
HXLLH
XLHLL
XHHLH
XXXHL*
* On next negative transition of CLK or SCLK
1
Rev.: A Amendment: /0
Issue Date: December 1999
ClockWorks™
SY100EL15LMicrel
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Rating Value Unit
VEE Power Supply (VCC = 0V) –8.0 to 0 VDC
VI Input Voltage (VCC = 0V) 0 to –6.0 VDC
OUT Output Current
I
–Continuous 50 mA
–Surge 100
A Operating Temperature Range –40 to +85 °C
T
NOTES:
1. Absolute maximum rating, beyond which, device life may be impaired, unless otherwise specified on an individual data sheet.
2. Parametric values specified at: 3 volt Power Supply Range 100EL15L Series –3.0V to –3.8V.
DC ELECTRICAL CHARACTERISTICS
VEE = 3.3V ±10%; VCC = GND
Symbol Parameter Min. Max. Min. Max. Min. Typ. Max. Min. Max. Unit
VOH Output HIGH Voltage
VOL Output LOW Voltage
VOHA Output HIGH Voltage
VOLA Output LOW Voltage
VIH Input HIGH Voltage –1165 –880 –1165 –880 –1165 — –880 –1165 –880 mV
VIL Input LOW Voltage –1810 –1475 –1810 –1475 –1810 — –1475 –1810 –1475 mV
IIH Input High Current — 150 — 150 — — 150 — 150 µA
I
IL Input LOW Current
IEE Power Supply Current — 35 — 35 — 25 35 — 38 mA
BB Output Reference Voltage –1.38 –1.26 –1.38 –1.26 –1.38 — –1.26 –1.38 –1.26 V
V
NOTES:
1. This table replaces the three traditionally seen in ECL 100K data books. Outputs are terminated through a 50Ω resistor to –2.0V.
2. VIN = VIH(Max) or VIL(Min).
3. VIN = VIH(Min) or VIL(Max).
4. VIN = VIL(Max).
(1)
TA = –40°CTA = 0°CTA = +25°CTA = +85°C
(2)
(2)
(3)
(3)
(4)
–1085 –880 –1025 –880 –1025 –955 –880 –1025 –880 mV
–1830 –1555 –1810 –1620 –1810 –1705 –1620 –1810 –1620 mV
–1095 — –1035 — –1035 — — –1035 — mV
— –1555 — –1610 — — –1610 — –1610 mV
0.5 — 0.5 — 0.5 — 0.5 — µA
CLK –300 — –300 — –300 — — –300 —
2
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