Micrel SY100E137 User Manual

查询SY100E137JZTR供应商
Micrel, Inc.
8-BIT RIPPLE COUNTER
SY10E137
SY100E137
SY10E137
SY100E137
FEATURES
1.8GHz min. count frequency
Extended 100E V
EE range of –4.2V to –5.5V
Synchronous and asynchronous enable pins
Differential clock input and data output pins
VBB output for single-ended use
Asynchronous Master Reset
Internal 75K input pull-down resistors
Available in 28-pin PLCC packge
PIN NAMES
Pin Function
CLK, CLK Differential Clock Inputs Q0–Q7, Q0–Q7 Differential Q Outputs A_Start Asynchronous Enable Input EN1, EN2 Synchronous Enable Inputs MR Asynchronous Master Reset VBB Switching Reference Output VCCO VCC to Output
DESCRIPTION
The SY10/100E137 are very high speed binary ripple counters. The two least significant bits were designed with very fast edge rates, while the more significant bits maintain standard ECLinPS output edge rates. This allows the counters to operate at very high frequencies, while maintaining a moderate power dissipation level.
The devices are ideally suited for multiple frequency clock generation, as well as for counters in high­performance ATE time measurement boards.
Both asynchronous and synchronous enables are available to maximize the device's flexibility for various applications. The asynchronous enable input, A_Start, when asserted, enables the counter while overriding any synchronous enable signals. The E137 features XOR'ed enable inputs, EN the CLK input. When only one synchronous enable is asserted, the counter becomes disabled on the next CLK transition. All outputs remain in the previous state poised for the other synchronous enable or A_Start to be asserted in order to re-enable the counter. Asserting both synchronous enables causes the counter to become enabled on the next transition of the CLK. EN1 (or EN2) and CLK edges are coincident. Sufficient delay has been inserted in the CLK path (to compensate for the XOR gate delay and the internal D-flip-flop set-up time) to ensure that the synchronous enable signal is clocked correctly; hence, the counter is disabled.
The E137 can also be driven single-endedly utilizing the VBB output supply as the voltage reference for the CLK input signal. If a single-ended signal is to be used, the VBB pin should be connected to the CLK input and bypassed to ground via a 0.01µF capacitor. VBB can only source/sink 0.5mA; therefore, it should be used as a switching reference for the E137 only.
All input pins left open will be pulled LOW via an input pull-down resistor. Therefore, do not leave the differential CLK inputs open. Doing so causes the current source transistor of the input clock gate to become saturated, thus upsetting the internal bias regulators and jeopardizing the stability of the device.
The asynchronous Master Reset resets the counter to an all zero state upon assertion.
1 and EN2, which are synchronous to
M9999-032006 hbwhelp@micrel.com or (408) 955-1690
1
Rev.: E Amendment: /0 Issue Date: March 2006
Micrel, Inc.
K
PACKAGE/ORDERING INFORMATION
SY10E137
SY100E137
A_Start
EN EN
V CL CLK
V
7
7
Q
Q
25 24 23 22 21 20 19
26
1
27
2
28
EE
1 2 3
BB
4
TOP VIEW
567891011
MR
CCO
V
28-Pin PLCC (J28-1)
6
Q
PLCC J28-1
0
Q
Ordering Information
6
Q
CCO
V
5
5
Q
Q
(1)
Package Operating Package Lead
Part Number Type Range Marking Finish
18 17 16 15 14 13 12
1
1
0
Q
Q
Q
CCO
V
SY10E137JC J28-1 Commercial SY10E137JC Sn-Pb
Q
4
SY10E137JCTR
Q
4
V
CC
SY100E137JC J28-1 Commercial SY100E137JC Sn-Pb
Q
3
SY100E137JCTR
Q
3
Q
2
SY10E137JZ
Q
2
SY10E137JZTR
(3)
(2)
(2)
(2, 3)
J28-1 Commercial SY10E137JC Sn-Pb
J28-1 Commercial SY100E137JC Sn-Pb J28-1 Commercial SY10E137JZ with Matte-Sn
Pb-Free bar-line indicator
J28-1 Commercial SY10E137JZ with Matte-Sn
Pb-Free bar-line indicator
SY100E137JZ
(3)
J28-1 Commercial SY100E137JZ with Matte-Sn
Pb-Free bar-line indicator
SY100E137JZTR
(2, 3)
J28-1 Commercial SY100E137JZ with Matte-Sn
Pb-Free bar-line indicator
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
M9999-032006 hbwhelp@micrel.com or (408) 955-1690
2
Loading...
+ 3 hidden pages