MICREL MIC58P01BN, MIC58P01BV, MIC58P01BWM Datasheet
MIC58P01 Micrel
MIC58P01
8-Bit Parallel-Input Protected Latched Driver
General Description
The MIC58P01 parallel-input latched driver is a high-voltage
(80V), high-current (500mA) integrated circuit comprised of
eight CMOS data latches, a bipolar Darlington transistor
driver for each latch, and CMOS control circuitry for the
common CLEAR, STROBE, and OUTPUT ENABLE functions.
Similar to the MIC5801, additional protection circuitry supplied
on this device includes thermal shutdown, under voltage
lockout (UVLO), and overcurrent shutdown.
The bipolar/CMOS combination provides an extremely lowpower latch with maximum interface flexibility. The MIC58P01
has open-collector outputs capable of sinking 500 mA and
integral diodes for inductive load transient suppression with a
minimum output breakdown voltage rating of 80V (50V
sustaining). The drivers may be paralleled for higher load
current capability.
With a 5V logic supply, the MIC58P01 will typically operate at
better than 5MHz. With a 12V logic supply, significantly higher
speeds are obtained. The CMOS inputs are compatible with
standard CMOS, PMOS, and NMOS circuits. TTL circuits
may require pull-up resistors.
Each of these eight outputs has an independent overcurrent
shutdown of 500mA. Upon current shutdown, the affected
channel will turn OFF until VDD is cycled or the ENABLE/
RESET pin is pulsed high. Current pulses less than 2µs will
not activate current shutdown. Temperatures above 165°C
will shut down all outputs. The UVLO circuit disables the
outputs at low VDD; hysteresis of 0.5V is provided.
Features
• 4.4MHz Minimum Data Input Rate
• High-Voltage, High-Current Outputs
• Per-Output Overcurrent Shutdown (500mA typical)
• Under Voltage Lockout
• Thermal Shutdown
• Output Transient Protection Diodes
• CMOS, PMOS, NMOS, and TTL Compatible Inputs
• Internal Pull-Down Resistors
• Low-Power CMOS Latches
Ordering Information
Part Number Temperature Range Package
MIC58P01BN –40°C to +85°C 22-Pin Plastic DIP
MIC58P01BV –40°C to +85°C 28-Pin PLCC
MIC58P01BWM –40°C to +85°C 24-Pin Wide SOIC
7
Functional Diagram
ENABLE/RESET
+
–
UVLO
CLEAR
THERMAL
SHUTDOWN
I
SHUTDOWN
SRQ
Circuitry below dashed line is
included in each of the 8 channels.
STROBE
V
DD
2.2R
1.25V
R
IN
October 1998 7-17
-
+
R1
70k
COMMON
V
EE
I
I
REF
OUT
R2
3k
/ N
OUTPUT
Pin Configuration
(DIP)
1
CLEAR
STROBE
IN
IN
IN
IN
IN
IN
IN
IN
GROUND
2
3
1
4
2
5
3
6
4
7
5
8
6
9
7
10
8
11 12
THERMAL
SHUTDOWN
LATCHES
UVLO
I
LIMIT
AND
OUTPUT
22
ENABLE/RESET
21
V
DD
20
OUT
19
OUT
18
OUT
17
OUT
16
OUT
15
OUT
OUT
14
OUT
13
COMMON
1
2
3
4
5
6
7
8
MIC58P01 Micrel
Pin Configuration, Continued
CLEAR
OE/RESET
28 27 26
1
1615
GROUND
17
NC
DD
V
NC
18
OUT 8
COMMON
24
23
22
21
20
19
18
17
16
15
14
13
STROBE
NC
NC
2
4
3
5
IN 1
6
IN 2
IN 3
7
MIC58P01BV
8
IN 4
9
IN 5
10
IN 6
11
IN 7
12 13
14
NC
NC
IN 8
MIC58P01BV, 28–Pin PLCC
GROUND
CLEAR
STROBE
GROUND
1
2
3
IN
4
1
IN
5
2
IN
6
3
4
7
5
8
9
6
7
10
8
11
12
MIC58P01BWM
IN
IN
IN
IN
IN
MIC58P01BWM, 24–Pin SOIC
(not pin compatible with MIC5801BWM)
Pin Description
25
OUT 1
24
OUT 2
23
OUT 3
22
OUT 4
OUT 5
21
20
OUT 6
OUT 7
19
NC
OUTPUT
ENABLE/RESET
V
DD
OUT
1
OUT
2
OUT
3
OUT
4
OUT
5
OUT
6
OUT
7
OUT
8
COMMON
Absolute Maximum Ratings: (Note 1)
at +25°C Free-Air Temperature
Output Voltage, V
Supply Voltage, V
CE
DD
Input Voltage Range, V
IN
–0.3V to VDD + 0.3V
80V
15V
Package Power Dissipation:
MIC58P01BN 2.25W
Derate above TA = +25°C 22.5mW/°C
MIC58P01BV 1.6W
Derate above TA = +25°C 16mW/°C
MIC58P01BWM 1.4W
Derate above TA = +25°C 14mW/°C
Operating Temperature Range, T
Storage Temperature Range, T
A
S
Note 1: Micrel CMOS devices have input-static protection but are
susceptible to damage when exposed to extremely high static
electrical charges.
Typical Input
IN
V
DD
–55°C to +85°C
–65°C to +125°C
Allowable Output Current As A Function
of Duty Cycle
450
400
350
300
250
200
NUMBER OF OUTPUTS
150
CONDUCTING
SIMULTANEOUSLY
100
0102030405060708090100
ALLOWABLE COLLECTOR CURRENT IN mA AT 50°C
MIC58P01BN
5
6
7
8
PERCENT DUTY CYCLE
1 or 2
3
4
Pin (DIP) Name Description
1 CLEAR Resets all Latches and turns all outputs OFF (open).
2 STROBE Input Strobe Pin. Loads output latches when High.
3–10 INPUT Parallel Inputs, 1 through 8
11 GROUND Logic and Output Ground pin.
12 COMMON Transient suppression diode common cathode pin.
13–20 OUTPUT Parallel Outputs, 8 through 1.
21 V
DD
Logic Supply voltage.
22 OUTPUT When Low, Outputs are active. When High, outputs are inactive and device is reset
ENABLE/RESET from a fault condition. An undervoltage condition emulates a high OE input.
7-18 October 1998
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